Rekai Nyangadzayi Musuka
7b146ad7ca
fix(bios): set addr_latch even if bios is skipped
2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka
822eed1f3a
fix(bus): make open bus impl aware of CPU pipeline
2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka
b37a14900c
style(bus): cpu ptr doesn't need to be optional
2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka
f5bd20bc2a
style: code cleanup
2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka
d3514b14f3
fix: resolve timing regressions
...
make sure to use fetch timings when fetching instructions
2022-10-13 00:35:20 -03:00
Rekai Nyangadzayi Musuka
06c60dad74
fix: rename Pipline to Pipeline
2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka
870e991862
feat: working pipeline implementation
2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka
5bb5bdf389
chore: refactor ARM/THUMB data processing instructions
2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka
a3996cbc58
fix: don't flush pipeline when reloading CPSR in ARM Data Processing
2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka
a948c6f900
chore: don't write to CPSR + swap with SPSR at the same time
2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka
014180cbd0
chore: update README.md
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
e4451738b5
fix: advance r15, even when the pipeline is reloaded from the scheduler
...
The PC would fall behind whenever an IRQ was called because the pipeline
was reloaded (+8 to PC), however that was never actually done by any code
Now, the PC is always incremented when the pipeline is reloaded
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
48b81c8e7a
chore: dump pipeline state on cpu panic
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
3cf1bf54e9
fix: reimpl THUMB.5 instructions
...
pipeline branch now passes arm.gba and thumb.gba again
(TODO: Stop rewriting my commits away)
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
1f9eeedfe8
fix: impl workaround for stage2 miscompilation
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
72a63eeb98
chore: instantly refill the pipeline on flush
...
I believe this to be necessary in order to get hardware interrupts
working.
thumb.gba test 108 fails but I'm committing anyways (despite the
regression) because this is kind of rebase/merge hell and I have
something that at least sort of works rn
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
2799c3f202
fix: reimpl handleInterrupt code
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
b3ada64e64
feat: implement basic pipeline
...
passes arm.gba, thumb.gb and armwrestler, fails in actual games
TODO: run FuzzARM debug specific titles
2022-10-13 00:33:11 -03:00
Rekai Nyangadzayi Musuka
62162ba492
feat: resolve off-by-{word, halfword} errors when printing debug info
2022-10-13 00:31:47 -03:00
Rekai Nyangadzayi Musuka
aa100de581
feat: reimplement cpu logging
2022-10-13 00:31:47 -03:00
