Rekai Nyangadzayi Musuka
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faa8f724a0
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chore(barrel_shifter): remove panic from ASR
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2022-01-18 14:16:39 -04:00 |
Rekai Nyangadzayi Musuka
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25c57a4cc7
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fix(barrel_shifter): should not modify cpsr when amount == 0
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2022-01-18 13:30:41 -04:00 |
Rekai Nyangadzayi Musuka
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a7a44c4463
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chore(cpu): refactor the barrel shifter once again
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2022-01-17 15:55:55 -04:00 |
Rekai Nyangadzayi Musuka
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d4d2fedfbe
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feat(cpu): implement ADC
ADC interacting w/ the Barrel Shifter is not working though
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2022-01-17 14:29:34 -04:00 |
Rekai Nyangadzayi Musuka
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483e149b32
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feat(cpu): implement RRX for Barrel Shifter
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2022-01-17 14:19:40 -04:00 |
Rekai Nyangadzayi Musuka
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85ffdf44f5
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feat(cpu): implement SUB in THUMB format 3
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2022-01-17 11:36:02 -04:00 |
Rekai Nyangadzayi Musuka
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9098a55ae3
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feat(cpu): implement ARM SUB in data processing
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2022-01-17 11:35:41 -04:00 |
Rekai Nyangadzayi Musuka
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c0d956ea95
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feat(cpu): implement MVN
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2022-01-17 11:30:59 -04:00 |
Rekai Nyangadzayi Musuka
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1025500407
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chore(cpu): refactor barrel shifter
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2022-01-17 11:17:04 -04:00 |
Rekai Nyangadzayi Musuka
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d05a924420
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fix(cpu): use barrel shifter in data processing immediates
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2022-01-17 11:02:34 -04:00 |
Rekai Nyangadzayi Musuka
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2a416fb2c6
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feat(cpu): implement format 12 thumb instructions
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2022-01-17 10:07:50 -04:00 |
Rekai Nyangadzayi Musuka
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ea5f0ce552
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feat(cpu): implement some already decoded format 3 instructions
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2022-01-17 09:29:11 -04:00 |
Rekai Nyangadzayi Musuka
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e55d2dc323
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feat(cpu): implement THUMB format 5 instructions
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2022-01-17 09:28:46 -04:00 |
Rekai Nyangadzayi Musuka
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3037407ebe
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chore: mgba log now supports printing THUMB instructions
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2022-01-17 07:18:44 -04:00 |
Rekai Nyangadzayi Musuka
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1915d98bdd
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feat(cpu): implement like 1 THUMB instruction
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2022-01-16 12:46:59 -04:00 |
Rekai Nyangadzayi Musuka
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4606a1ab25
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chore: distinguish between undefined ARM and THUMB instr
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2022-01-14 05:30:32 -04:00 |
Rekai Nyangadzayi Musuka
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0cf052838d
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chore(cpu): lay groundwork for THUMB instruction decoding and execution
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2022-01-14 05:23:16 -04:00 |
Rekai Nyangadzayi Musuka
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ae37b1218b
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chore(cpu): refactor ARM functions to make room for THUMB
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2022-01-14 04:26:09 -04:00 |
Rekai Nyangadzayi Musuka
|
070322064d
|
fix(cpu): fix conditions for GT cond
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2022-01-14 04:19:54 -04:00 |
Rekai Nyangadzayi Musuka
|
37bd6758fb
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fix(cpu): fix imm value calculation in MSR
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2022-01-14 04:08:04 -04:00 |
Rekai Nyangadzayi Musuka
|
7f6ab626d9
|
fix(cpu): resolve off-by-one error when executing LDM
|
2022-01-14 03:43:03 -04:00 |
Rekai Nyangadzayi Musuka
|
77dba68a0b
|
feat(cpu): implement branch and exchange
If I want to continue with armwrestler, I'll have to implement
THUMB instructions now
|
2022-01-12 07:20:24 -04:00 |
Rekai Nyangadzayi Musuka
|
7adc7c8802
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fix(cpu): make Data Processing instructions r15-aware
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2022-01-12 07:20:24 -04:00 |
Rekai Nyangadzayi Musuka
|
229f7c3388
|
fix(cpu): make LDRH and STRH aware of r15
|
2022-01-12 07:20:21 -04:00 |
Rekai Nyangadzayi Musuka
|
5812b9713c
|
fix(cpu): account for r15 in LDR and STR instructions
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2022-01-12 06:16:59 -04:00 |
Rekai Nyangadzayi Musuka
|
98c5803208
|
fix(cpu): flip two branches in PSR Transfer execution
|
2022-01-12 06:16:34 -04:00 |
Rekai Nyangadzayi Musuka
|
74abd3df4d
|
feat(cpu): implement MSR and MRS
|
2022-01-12 04:48:57 -04:00 |
Rekai Nyangadzayi Musuka
|
7531af7f2b
|
feat(cpu): stub PSR Transfer instructions
|
2022-01-12 03:40:51 -04:00 |
Rekai Nyangadzayi Musuka
|
1c173eb4b8
|
chore(io): implement IE and IME
|
2022-01-12 02:19:26 -04:00 |
Rekai Nyangadzayi Musuka
|
769c67b9d4
|
chore: remove some magic constants
|
2022-01-12 00:46:20 -04:00 |
Rekai Nyangadzayi Musuka
|
3596caf106
|
Merge branch 'main' of ssh://musuka.dev:2222/paoda/zba
|
2022-01-11 02:36:37 -04:00 |
Rekai Nyangadzayi Musuka
|
3be084cb82
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chore: ignores for building on windows
|
2022-01-11 01:42:26 -04:00 |
Rekai Nyangadzayi Musuka
|
c1be53bcb2
|
fix(bus): remove accidental recursion
|
2022-01-10 21:25:45 -04:00 |
Rekai Nyangadzayi Musuka
|
072a66cfdb
|
fix(cpu): write results of ORR to destination register
|
2022-01-10 10:56:41 -04:00 |
Rekai Nyangadzayi Musuka
|
ed3bdd90fb
|
feat(cpu): implement TEQ
|
2022-01-10 08:09:02 -04:00 |
Rekai Nyangadzayi Musuka
|
e9c1c94cae
|
feat(cpu): Implement ORR
|
2022-01-10 08:06:00 -04:00 |
Rekai Nyangadzayi Musuka
|
0f08ad05be
|
feat(bus): implement IWRAM and EWRAM
|
2022-01-10 07:59:21 -04:00 |
Rekai Nyangadzayi Musuka
|
fd5006b29d
|
fix(ppu): properly access Mode 4 palette
|
2022-01-10 07:23:54 -04:00 |
Rekai Nyangadzayi Musuka
|
22b95b2a74
|
feat(cpu): refactor LDM/STM
|
2022-01-10 06:51:32 -04:00 |
Rekai Nyangadzayi Musuka
|
7d79a0bee2
|
feat(cpu): implement LDM/STM
|
2022-01-10 06:27:36 -04:00 |
Rekai Nyangadzayi Musuka
|
6c0651ca08
|
chore(io): DISPSTAT bits 3 and 4 better match GBATEK documentation
|
2022-01-10 06:26:42 -04:00 |
Rekai Nyangadzayi Musuka
|
0d8c5e6882
|
fix(cpu): fix off-by-word bug in BL
|
2022-01-10 06:26:02 -04:00 |
Rekai Nyangadzayi Musuka
|
89a8fe403b
|
feat(bus): have VCOUNT be addressable on the bus
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2022-01-10 03:35:28 -04:00 |
Rekai Nyangadzayi Musuka
|
7c5d2d2389
|
feat(ppu): implement Mode 4
Implementation is not tested. Pending on LDM and STM so that I can
run beeg.gba
|
2022-01-10 03:35:24 -04:00 |
Rekai Nyangadzayi Musuka
|
2467b94dbd
|
chore(io): rename some io bitfield fields
|
2022-01-10 02:13:25 -04:00 |
Rekai Nyangadzayi Musuka
|
0d4c850218
|
chore: remove premature inlines
|
2022-01-10 01:24:14 -04:00 |
Rekai Nyangadzayi Musuka
|
bbe2ecfa53
|
chore: add FPS counter
|
2022-01-10 01:22:55 -04:00 |
Rekai Nyangadzayi Musuka
|
c54145ce3c
|
chore: improve code clarity
|
2022-01-09 23:34:33 -04:00 |
Rekai Nyangadzayi Musuka
|
ead6d1ce49
|
feat(ppu): improve timings + implement BG mode 3 bitmap
|
2022-01-09 22:16:34 -04:00 |
Rekai Nyangadzayi Musuka
|
581285a434
|
fix: allocate framebuf on heap
|
2022-01-08 20:30:57 -04:00 |