chore(cpu): refactor ARM functions to make room for THUMB
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16
src/cpu.zig
16
src/cpu.zig
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@ -1,19 +1,19 @@
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const std = @import("std");
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const util = @import("util.zig");
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const BarrelShifter = @import("cpu/barrel_shifter.zig");
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const BarrelShifter = @import("cpu/arm/barrel_shifter.zig");
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const Bus = @import("Bus.zig");
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const Bit = @import("bitfield").Bit;
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const Bitfield = @import("bitfield").Bitfield;
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const Scheduler = @import("scheduler.zig").Scheduler;
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const dataProcessing = @import("cpu/data_processing.zig").dataProcessing;
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const psrTransfer = @import("cpu/psr_transfer.zig").psrTransfer;
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const singleDataTransfer = @import("cpu/single_data_transfer.zig").singleDataTransfer;
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const halfAndSignedDataTransfer = @import("cpu/half_signed_data_transfer.zig").halfAndSignedDataTransfer;
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const blockDataTransfer = @import("cpu/block_data_transfer.zig").blockDataTransfer;
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const branch = @import("cpu/branch.zig").branch;
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const branchAndExchange = @import("cpu/branch.zig").branchAndExchange;
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const dataProcessing = @import("cpu/arm/data_processing.zig").dataProcessing;
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const psrTransfer = @import("cpu/arm/psr_transfer.zig").psrTransfer;
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const singleDataTransfer = @import("cpu/arm/single_data_transfer.zig").singleDataTransfer;
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const halfAndSignedDataTransfer = @import("cpu/arm/half_signed_data_transfer.zig").halfAndSignedDataTransfer;
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const blockDataTransfer = @import("cpu/arm/block_data_transfer.zig").blockDataTransfer;
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const branch = @import("cpu/arm/branch.zig").branch;
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const branchAndExchange = @import("cpu/arm/branch.zig").branchAndExchange;
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pub const InstrFn = fn (*Arm7tdmi, *Bus, u32) void;
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const arm_lut: [0x1000]InstrFn = populate();
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@ -1,7 +1,7 @@
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const std = @import("std");
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const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
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const CPSR = @import("../cpu.zig").PSR;
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const CPSR = @import("../../cpu.zig").PSR;
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pub fn exec(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
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var shift_amt: u8 = undefined;
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@ -1,8 +1,8 @@
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const std = @import("std");
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const Bus = @import("../Bus.zig");
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const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../cpu.zig").InstrFn;
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const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../../cpu.zig").InstrFn;
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pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, comptime W: bool, comptime L: bool) InstrFn {
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return struct {
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@ -1,9 +1,9 @@
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const std = @import("std");
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const util = @import("../util.zig");
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const util = @import("../../util.zig");
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const Bus = @import("../Bus.zig");
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const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../cpu.zig").InstrFn;
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const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../../cpu.zig").InstrFn;
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pub fn branch(comptime L: bool) InstrFn {
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return struct {
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@ -1,9 +1,9 @@
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const std = @import("std");
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const BarrelShifter = @import("barrel_shifter.zig");
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const Bus = @import("../Bus.zig");
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const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../cpu.zig").InstrFn;
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const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../../cpu.zig").InstrFn;
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pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn {
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return struct {
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@ -1,9 +1,9 @@
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const std = @import("std");
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const util = @import("../util.zig");
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const util = @import("../../util.zig");
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const Bus = @import("../Bus.zig");
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const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../cpu.zig").InstrFn;
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const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../../cpu.zig").InstrFn;
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pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn {
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return struct {
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@ -1,8 +1,8 @@
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const std = @import("std");
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const Bus = @import("../Bus.zig");
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const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../cpu.zig").InstrFn;
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const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../../cpu.zig").InstrFn;
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pub fn psrTransfer(comptime I: bool, comptime isSpsr: bool) InstrFn {
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return struct {
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@ -1,11 +1,11 @@
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const std = @import("std");
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const util = @import("../util.zig");
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const util = @import("../../util.zig");
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const BarrelShifter = @import("barrel_shifter.zig");
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const Bus = @import("../Bus.zig");
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const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
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const CPSR = @import("../cpu.zig").PSR;
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const InstrFn = @import("../cpu.zig").InstrFn;
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const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const CPSR = @import("../../cpu.zig").PSR;
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const InstrFn = @import("../../cpu.zig").InstrFn;
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pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn {
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return struct {
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