 Rekai Nyangadzayi Musuka
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1915d98bdd
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feat(cpu): implement like 1 THUMB instruction
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2022-01-16 12:46:59 -04:00 |
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Rekai Nyangadzayi Musuka
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4606a1ab25
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chore: distinguish between undefined ARM and THUMB instr
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2022-01-14 05:30:32 -04:00 |
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Rekai Nyangadzayi Musuka
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0cf052838d
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chore(cpu): lay groundwork for THUMB instruction decoding and execution
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2022-01-14 05:23:16 -04:00 |
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Rekai Nyangadzayi Musuka
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ae37b1218b
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chore(cpu): refactor ARM functions to make room for THUMB
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2022-01-14 04:26:09 -04:00 |
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Rekai Nyangadzayi Musuka
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070322064d
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fix(cpu): fix conditions for GT cond
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2022-01-14 04:19:54 -04:00 |
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Rekai Nyangadzayi Musuka
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37bd6758fb
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fix(cpu): fix imm value calculation in MSR
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2022-01-14 04:08:04 -04:00 |
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Rekai Nyangadzayi Musuka
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7f6ab626d9
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fix(cpu): resolve off-by-one error when executing LDM
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2022-01-14 03:43:03 -04:00 |
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Rekai Nyangadzayi Musuka
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77dba68a0b
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feat(cpu): implement branch and exchange
If I want to continue with armwrestler, I'll have to implement
THUMB instructions now
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2022-01-12 07:20:24 -04:00 |
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Rekai Nyangadzayi Musuka
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7adc7c8802
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fix(cpu): make Data Processing instructions r15-aware
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2022-01-12 07:20:24 -04:00 |
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Rekai Nyangadzayi Musuka
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229f7c3388
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fix(cpu): make LDRH and STRH aware of r15
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2022-01-12 07:20:21 -04:00 |
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Rekai Nyangadzayi Musuka
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5812b9713c
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fix(cpu): account for r15 in LDR and STR instructions
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2022-01-12 06:16:59 -04:00 |
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Rekai Nyangadzayi Musuka
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98c5803208
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fix(cpu): flip two branches in PSR Transfer execution
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2022-01-12 06:16:34 -04:00 |
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Rekai Nyangadzayi Musuka
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74abd3df4d
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feat(cpu): implement MSR and MRS
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2022-01-12 04:48:57 -04:00 |
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Rekai Nyangadzayi Musuka
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7531af7f2b
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feat(cpu): stub PSR Transfer instructions
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2022-01-12 03:40:51 -04:00 |
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Rekai Nyangadzayi Musuka
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1c173eb4b8
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chore(io): implement IE and IME
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2022-01-12 02:19:26 -04:00 |
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Rekai Nyangadzayi Musuka
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769c67b9d4
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chore: remove some magic constants
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2022-01-12 00:46:20 -04:00 |
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Rekai Nyangadzayi Musuka
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3596caf106
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Merge branch 'main' of ssh://musuka.dev:2222/paoda/zba
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2022-01-11 02:36:37 -04:00 |
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Rekai Nyangadzayi Musuka
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3be084cb82
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chore: ignores for building on windows
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2022-01-11 01:42:26 -04:00 |
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Rekai Nyangadzayi Musuka
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c1be53bcb2
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fix(bus): remove accidental recursion
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2022-01-10 21:25:45 -04:00 |
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Rekai Nyangadzayi Musuka
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072a66cfdb
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fix(cpu): write results of ORR to destination register
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2022-01-10 10:56:41 -04:00 |
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Rekai Nyangadzayi Musuka
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ed3bdd90fb
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feat(cpu): implement TEQ
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2022-01-10 08:09:02 -04:00 |
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Rekai Nyangadzayi Musuka
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e9c1c94cae
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feat(cpu): Implement ORR
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2022-01-10 08:06:00 -04:00 |
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Rekai Nyangadzayi Musuka
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0f08ad05be
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feat(bus): implement IWRAM and EWRAM
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2022-01-10 07:59:21 -04:00 |
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Rekai Nyangadzayi Musuka
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fd5006b29d
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fix(ppu): properly access Mode 4 palette
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2022-01-10 07:23:54 -04:00 |
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Rekai Nyangadzayi Musuka
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22b95b2a74
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feat(cpu): refactor LDM/STM
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2022-01-10 06:51:32 -04:00 |
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Rekai Nyangadzayi Musuka
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7d79a0bee2
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feat(cpu): implement LDM/STM
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2022-01-10 06:27:36 -04:00 |
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Rekai Nyangadzayi Musuka
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6c0651ca08
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chore(io): DISPSTAT bits 3 and 4 better match GBATEK documentation
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2022-01-10 06:26:42 -04:00 |
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Rekai Nyangadzayi Musuka
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0d8c5e6882
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fix(cpu): fix off-by-word bug in BL
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2022-01-10 06:26:02 -04:00 |
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Rekai Nyangadzayi Musuka
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89a8fe403b
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feat(bus): have VCOUNT be addressable on the bus
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2022-01-10 03:35:28 -04:00 |
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Rekai Nyangadzayi Musuka
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7c5d2d2389
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feat(ppu): implement Mode 4
Implementation is not tested. Pending on LDM and STM so that I can
run beeg.gba
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2022-01-10 03:35:24 -04:00 |
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Rekai Nyangadzayi Musuka
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2467b94dbd
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chore(io): rename some io bitfield fields
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2022-01-10 02:13:25 -04:00 |
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Rekai Nyangadzayi Musuka
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0d4c850218
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chore: remove premature inlines
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2022-01-10 01:24:14 -04:00 |
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Rekai Nyangadzayi Musuka
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bbe2ecfa53
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chore: add FPS counter
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2022-01-10 01:22:55 -04:00 |
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Rekai Nyangadzayi Musuka
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c54145ce3c
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chore: improve code clarity
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2022-01-09 23:34:33 -04:00 |
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Rekai Nyangadzayi Musuka
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ead6d1ce49
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feat(ppu): improve timings + implement BG mode 3 bitmap
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2022-01-09 22:16:34 -04:00 |
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Rekai Nyangadzayi Musuka
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581285a434
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fix: allocate framebuf on heap
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2022-01-08 20:30:57 -04:00 |
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Rekai Nyangadzayi Musuka
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0d203543ca
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chore: add code for heap alloc of white texture
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2022-01-08 18:52:11 -04:00 |
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Rekai Nyangadzayi Musuka
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eb6c00f0ac
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chore(gui): switch from RGBA8888 to BGR5555 to match BG Mode 3
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2022-01-08 04:54:39 -04:00 |
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Rekai Nyangadzayi Musuka
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da7f21f47e
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feat: draw white texture using SDL2
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2022-01-07 22:46:17 -04:00 |
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Rekai Nyangadzayi Musuka
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8fb666624f
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fix(ppu): deallocate palette RAM on cleanup
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2022-01-07 22:27:08 -04:00 |
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Rekai Nyangadzayi Musuka
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568c374131
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chore: code cleanup
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2022-01-07 20:00:42 -04:00 |
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Rekai Nyangadzayi Musuka
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910745f442
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chore(bus): refactor bus.zig
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2022-01-07 19:49:58 -04:00 |
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Rekai Nyangadzayi Musuka
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f8c6af3247
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chore: refactor instruction exec code
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2022-01-07 19:44:48 -04:00 |
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Rekai Nyangadzayi Musuka
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a407671de2
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chore(io): alias @This() to Self in io.zig
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2022-01-07 19:34:54 -04:00 |
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Rekai Nyangadzayi Musuka
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e9ec124e33
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chore: refactor bios.zig and pak.zig
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2022-01-07 19:33:49 -04:00 |
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Rekai Nyangadzayi Musuka
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9f64804763
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fix: by convention deinit() should not take pointers to self
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2022-01-07 19:16:23 -04:00 |
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Rekai Nyangadzayi Musuka
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c6123d8a6d
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feat: implement PPU Timings in Scheduler
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2022-01-05 21:18:33 -04:00 |
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Rekai Nyangadzayi Musuka
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f709458638
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feat(sched): add HBlank and VBlank events to the scheduler
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2022-01-05 17:34:59 -05:00 |
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Rekai Nyangadzayi Musuka
|
5037b8f0cc
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feat: implement S (when rd != 15) for several data processing instructions
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2022-01-05 15:45:52 -05:00 |
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Rekai Nyangadzayi Musuka
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28a70d0112
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feat: implement dedicated Barrel Shifter SHL and SHR
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2022-01-05 13:58:11 -05:00 |