Commit Graph

554 Commits

Author SHA1 Message Date
Rekai Nyangadzayi Musuka fc53a40b3c feat(config): add option to skip BIOS 2022-10-17 17:31:07 -03:00
Rekai Nyangadzayi Musuka 7097e21361 feat(cli): Add option to skip BIOS 2022-10-17 17:25:04 -03:00
Rekai Nyangadzayi Musuka a9fe24b1b4 chore: Update README.md 2022-10-17 17:00:54 -03:00
Rekai Nyangadzayi Musuka f38c840d32 Merge pull request 'Draft: Implement Instruction Pipeline' (#3) from pipeline into main
Reviewed-on: #3
2022-10-17 19:42:42 +00:00
Rekai Nyangadzayi Musuka 19e70c39d1 feat(config): add config option to mute ZBA 2022-10-13 00:54:15 -03:00
Rekai Nyangadzayi Musuka 5a72a8e7f3 chore(config): add example config file 2022-10-13 00:46:18 -03:00
Rekai Nyangadzayi Musuka 7b146ad7ca fix(bios): set addr_latch even if bios is skipped 2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka 822eed1f3a fix(bus): make open bus impl aware of CPU pipeline 2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka b37a14900c style(bus): cpu ptr doesn't need to be optional 2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka f5bd20bc2a style: code cleanup 2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka d3514b14f3 fix: resolve timing regressions
make sure to use fetch timings when fetching instructions
2022-10-13 00:35:20 -03:00
Rekai Nyangadzayi Musuka 06c60dad74 fix: rename Pipline to Pipeline 2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka 870e991862 feat: working pipeline implementation 2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka 5bb5bdf389 chore: refactor ARM/THUMB data processing instructions 2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka a3996cbc58 fix: don't flush pipeline when reloading CPSR in ARM Data Processing 2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka a948c6f900 chore: don't write to CPSR + swap with SPSR at the same time 2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka 014180cbd0 chore: update README.md 2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka e4451738b5 fix: advance r15, even when the pipeline is reloaded from the scheduler
The PC would fall behind whenever an IRQ was called because the pipeline
was reloaded (+8 to PC), however that was never actually done by any code

Now, the PC is always incremented when the pipeline is reloaded
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka 48b81c8e7a chore: dump pipeline state on cpu panic 2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka 3cf1bf54e9 fix: reimpl THUMB.5 instructions
pipeline branch now passes arm.gba and thumb.gba again

(TODO: Stop rewriting my commits away)
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka 1f9eeedfe8 fix: impl workaround for stage2 miscompilation 2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka 72a63eeb98 chore: instantly refill the pipeline on flush
I believe this to be necessary in order to get hardware interrupts
working.

thumb.gba test 108 fails but I'm committing anyways (despite the
regression) because this is kind of rebase/merge hell and I have
something that at least sort of works rn
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka 2799c3f202 fix: reimpl handleInterrupt code 2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka b3ada64e64 feat: implement basic pipeline
passes arm.gba, thumb.gb and armwrestler, fails in actual games
TODO: run FuzzARM debug specific titles
2022-10-13 00:33:11 -03:00
Rekai Nyangadzayi Musuka 62162ba492 feat: resolve off-by-{word, halfword} errors when printing debug info 2022-10-13 00:31:47 -03:00
Rekai Nyangadzayi Musuka aa100de581 feat: reimplement cpu logging 2022-10-13 00:31:47 -03:00
Rekai Nyangadzayi Musuka 7142831284 Merge pull request 'Add TOML Support' (#2) from toml into main
Reviewed-on: #2
2022-10-13 03:30:26 +00:00
Rekai Nyangadzayi Musuka 97f48c730e chore(emu): refactor code 2022-10-13 00:29:51 -03:00
Rekai Nyangadzayi Musuka 293fbd9f55 feat(config): add support for (and read from) TOML config file 2022-10-13 00:29:48 -03:00
Rekai Nyangadzayi Musuka 622f479e07 feat: parse config.toml in data folder
Also took the chance to rework parts of the logic that determines
ZBA's save path
2022-10-13 00:27:18 -03:00
Rekai Nyangadzayi Musuka 0204eb6f94 chore: add zig-toml dependency 2022-10-13 00:27:18 -03:00
Rekai Nyangadzayi Musuka 86d2224cfc chore: update dependencies 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka 21eddac31e style: improve code quality 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka 785135a074 feat: rewrite device ticks 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka fd38fd6506 style(scheduler): rename scheduler event handlers 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka bcacac64df style: code refactoring 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka dc7cad9691 style(apu): split apu.zig into multiple files + refactor 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka b5d8a65e69 style(backup): refactor code 2022-10-10 12:01:49 -03:00
Rekai Nyangadzayi Musuka 8028394105 style(flash): move flash code into it's own file 2022-10-10 12:01:49 -03:00
Rekai Nyangadzayi Musuka cb0eb67e4b style(eeprom): move eeprom code to it's own file 2022-10-10 12:00:45 -03:00
Rekai Nyangadzayi Musuka 13f6ee8ec4 style(bus): refactor several hardware abstractions 2022-10-10 11:57:57 -03:00
Rekai Nyangadzayi Musuka c71e954748 chore: SDL2.zig expects target to be set before link() is called 2022-09-25 18:59:55 -03:00
Rekai Nyangadzayi Musuka c697dec716 chore: update dependencies 2022-09-23 07:21:46 -03:00
Rekai Nyangadzayi Musuka 92cfc763c0 chore: move util.zig 2022-09-19 16:07:19 -03:00
Rekai Nyangadzayi Musuka e192c6712f chore: disable audio sync by default
forgot SDL2 AudioStream doesn't work well for my use-case
2022-09-18 09:20:01 -03:00
Rekai Nyangadzayi Musuka 3466bf6c0a chore: change default settings 2022-09-18 06:30:39 -03:00
Rekai Nyangadzayi Musuka fbe3de0eb3 chore: reimpl util.escape
should make use of stdlib when I can
2022-09-18 06:23:30 -03:00
Rekai Nyangadzayi Musuka 4af144fca2 fix: Detect FRAM ROMs 2022-09-18 06:19:05 -03:00
Rekai Nyangadzayi Musuka 9a8aaba1ab chore: improve util and Gui API 2022-09-18 05:55:15 -03:00
Rekai Nyangadzayi Musuka fa3b9c21b9 chore: move Gpio and Clock structs to separate file 2022-09-18 00:37:45 -03:00