Rekai Nyangadzayi Musuka
599e068c7e
feat(cpu): implement format2 THUMB instructions
2022-01-29 18:46:27 -04:00
Rekai Nyangadzayi Musuka
4ca65caef0
feat(cpu): implement format19 THUMB instructions
2022-01-29 18:25:50 -04:00
Rekai Nyangadzayi Musuka
0c49bf2288
chore: account for THUMB BL instruction when mimicking mGBA logs
2022-01-29 18:14:00 -04:00
Rekai Nyangadzayi Musuka
44dbdba48c
feat(cpu): implement format16 THUMB instructions
2022-01-29 17:44:04 -04:00
Rekai Nyangadzayi Musuka
d85e0c8d05
feat(cpu): implement format 1 THUMB instructions
2022-01-29 17:29:30 -04:00
Rekai Nyangadzayi Musuka
cfbd292edc
feat(cpu): implement format 6 THUMB instructions
2022-01-29 01:18:41 -04:00
Rekai Nyangadzayi Musuka
19359f7ee4
chore: mark indexing methods as inline
2022-01-28 17:11:29 -04:00
Rekai Nyangadzayi Musuka
24f0922f86
feat: create emulator thread
2022-01-28 16:33:38 -04:00
Rekai Nyangadzayi Musuka
b1cc985230
chore: disable logging by default
2022-01-25 18:20:30 -04:00
Rekai Nyangadzayi Musuka
e5c8f0ce07
chore: revert fastboot changes
2022-01-25 18:20:01 -04:00
Rekai Nyangadzayi Musuka
fbc5b309b0
chore: binary logging + file logging + DP chanes + fastBoot changes
2022-01-25 18:18:52 -04:00
Rekai Nyangadzayi Musuka
540fbf739a
chore: rename skipBios to fastBoot
2022-01-25 11:15:17 -04:00
Rekai Nyangadzayi Musuka
0546b1c308
chore: set correct values for select banked registers on fast boot
2022-01-25 11:14:15 -04:00
Rekai Nyangadzayi Musuka
997dc1314c
feat(cpu): implement SWI
2022-01-25 10:34:21 -04:00
Rekai Nyangadzayi Musuka
bf36a23722
feat(cpu): implement banked registers
2022-01-19 07:29:49 -04:00
Rekai Nyangadzayi Musuka
fc5a3460dd
fix(cpu): improve MRS and MSR instructions
2022-01-18 20:17:00 -04:00
Rekai Nyangadzayi Musuka
2a416fb2c6
feat(cpu): implement format 12 thumb instructions
2022-01-17 10:07:50 -04:00
Rekai Nyangadzayi Musuka
e55d2dc323
feat(cpu): implement THUMB format 5 instructions
2022-01-17 09:28:46 -04:00
Rekai Nyangadzayi Musuka
3037407ebe
chore: mgba log now supports printing THUMB instructions
2022-01-17 07:18:44 -04:00
Rekai Nyangadzayi Musuka
1915d98bdd
feat(cpu): implement like 1 THUMB instruction
2022-01-16 12:46:59 -04:00
Rekai Nyangadzayi Musuka
4606a1ab25
chore: distinguish between undefined ARM and THUMB instr
2022-01-14 05:30:32 -04:00
Rekai Nyangadzayi Musuka
0cf052838d
chore(cpu): lay groundwork for THUMB instruction decoding and execution
2022-01-14 05:23:16 -04:00
Rekai Nyangadzayi Musuka
ae37b1218b
chore(cpu): refactor ARM functions to make room for THUMB
2022-01-14 04:26:09 -04:00
Rekai Nyangadzayi Musuka
070322064d
fix(cpu): fix conditions for GT cond
2022-01-14 04:19:54 -04:00
Rekai Nyangadzayi Musuka
77dba68a0b
feat(cpu): implement branch and exchange
...
If I want to continue with armwrestler, I'll have to implement
THUMB instructions now
2022-01-12 07:20:24 -04:00
Rekai Nyangadzayi Musuka
74abd3df4d
feat(cpu): implement MSR and MRS
2022-01-12 04:48:57 -04:00
Rekai Nyangadzayi Musuka
7531af7f2b
feat(cpu): stub PSR Transfer instructions
2022-01-12 03:40:51 -04:00
Rekai Nyangadzayi Musuka
7d79a0bee2
feat(cpu): implement LDM/STM
2022-01-10 06:27:36 -04:00
Rekai Nyangadzayi Musuka
0d4c850218
chore: remove premature inlines
2022-01-10 01:24:14 -04:00
Rekai Nyangadzayi Musuka
c54145ce3c
chore: improve code clarity
2022-01-09 23:34:33 -04:00
Rekai Nyangadzayi Musuka
568c374131
chore: code cleanup
2022-01-07 20:00:42 -04:00
Rekai Nyangadzayi Musuka
910745f442
chore(bus): refactor bus.zig
2022-01-07 19:49:58 -04:00
Rekai Nyangadzayi Musuka
f8c6af3247
chore: refactor instruction exec code
2022-01-07 19:44:48 -04:00
Rekai Nyangadzayi Musuka
f709458638
feat(sched): add HBlank and VBlank events to the scheduler
2022-01-05 17:34:59 -05:00
Rekai Nyangadzayi Musuka
28a70d0112
feat: implement dedicated Barrel Shifter SHL and SHR
2022-01-05 13:58:11 -05:00
Rekai Nyangadzayi Musuka
172f3e8efe
chore: comment-out logging by default
2022-01-04 03:58:11 -06:00
Rekai Nyangadzayi Musuka
8d8cedea59
chore: add mgba compatible (minus disasm) log function
2022-01-04 01:11:53 -06:00
Rekai Nyangadzayi Musuka
0f827fca96
chore: rename CPSR u32 from val to raw
2022-01-03 22:25:11 -06:00
Rekai Nyangadzayi Musuka
1fefd4de5c
chore: remove print statements
2022-01-03 21:30:08 -06:00
Rekai Nyangadzayi Musuka
dee0e113d8
feat(cpu): implement skipBios method
2022-01-02 14:58:39 -06:00
Rekai Nyangadzayi Musuka
1c42d1795a
feat(bus): add Io Struct
...
Also, add more information to all panic messages
2022-01-02 14:40:49 -06:00
Rekai Nyangadzayi Musuka
01d6399dfb
chore: rename consturctors to fit convention
2022-01-02 13:58:57 -06:00
Rekai Nyangadzayi Musuka
f09f814dc3
chore: move bitfield library to lib director
...
I'd presonally prefer to use a git submodule here but It doesn't quite
seem like git submodules are possible for individual files. I'll have to
check with FlorenceOS every once and a while to ensure that there are no
lingering soundness issues with the library.
Thanks to @N00byEdge for this wonderful library!
2022-01-02 13:19:09 -06:00
Rekai Nyangadzayi Musuka
de9045fba3
chore: use bitfield library
2022-01-02 13:01:11 -06:00
Rekai Nyangadzayi Musuka
e144261e07
feat(bus): emu is now able to read from user-provided BIOS
2022-01-02 03:16:03 -06:00
Rekai Nyangadzayi Musuka
65c3dd722c
feat(bus): implement Gameboy Advance MMIO
2022-01-02 02:36:06 -06:00
Rekai Nyangadzayi Musuka
52e367d24a
fix(cpu): purposely overflow when calculating PC during branch
2022-01-01 21:57:52 -06:00
Rekai Nyangadzayi Musuka
cc7e42efd8
feat(cpu): implement condition field behaviour
2022-01-01 21:56:58 -06:00
Rekai Nyangadzayi Musuka
c40a1af534
chore: conform to zig style guides
2022-01-01 21:08:47 -06:00
Rekai Nyangadzayi Musuka
f2cc0721c7
chore: run zig fmt
2022-01-01 03:42:20 -06:00
Rekai Nyangadzayi Musuka
92a06e49c3
chore(cpu): iron out some false assumptions
2022-01-01 03:41:50 -06:00
Rekai Nyangadzayi Musuka
c660ca8922
feat: implement LDR STR
2021-12-29 17:16:32 -06:00
Rekai Nyangadzayi Musuka
7cc3f40a85
chore: run zig fmt
2021-12-29 15:13:50 -06:00
Rekai Nyangadzayi Musuka
5b3b81e4dc
Initial Commit
2021-12-29 15:09:00 -06:00
