chore: add test for RingBuffer

This reverts commit 96a9ae2ca5.

.github/workflows/main.yml

@@ -0,0 +1,58 @@
+name: Nightly
+
+on:
+  push:
+    paths:
+      - "**.zig"
+    branches:
+      - main
+  schedule:
+    - cron: '0 0 * * *'
+  workflow_dispatch:
+
+jobs:
+  build:
+    strategy:
+      matrix:
+        os: [ubuntu-latest, windows-latest, macos-latest]
+    runs-on: ${{matrix.os}}
+    steps:
+      - uses: goto-bus-stop/setup-zig@v2
+        with:
+          version: master
+      - name: prepare-linux
+        if: runner.os == 'Linux'
+        run: |
+            sudo apt-get update
+            sudo apt-get install libsdl2-dev
+      - name: prepare-windows
+        if: runner.os == 'Windows'
+        run: |
+            vcpkg integrate install
+            vcpkg install sdl2:x64-windows
+            git config --global core.autocrlf false
+      - name: prepare-macos
+        if: runner.os == 'macOS'
+        run: |
+            brew install sdl2
+      - uses: actions/checkout@v3
+        with:
+          submodules: true
+      - name: build 
+        run: zig build -Drelease-safe
+      - name: upload
+        uses: actions/upload-artifact@v3
+        with:
+          name: zba-${{matrix.os}}
+          path: zig-out/bin
+  lint:
+    runs-on: ubuntu-latest
+    steps: 
+      - uses: actions/checkout@v3
+        with:
+          submodules: true
+      - uses: goto-bus-stop/setup-zig@v2
+        with:
+          version: master
+      - run: zig fmt src/**/*.zig
+  

README.md

@@ -1,80 +1,110 @@
 # ZBA (working title)
+
 A Game Boy Advance Emulator written in Zig ⚡!
 
 ## Scope
-I'm hardly the first to write a Game Boy Advance Emulator nor will I be the last. This project isn't going to compete with the GOATs like 
-[mGBA](https://github.com/mgba-emu) or [NanoBoyAdvance](https://github.com/nba-emu/NanoBoyAdvance). There aren't any interesting
-ideas either like in [DSHBA](https://github.com/DenSinH/DSHBA). 
 
-This is a simple (read: incomplete) for-fun long-term project. I hope to get "mostly there", which to me means that I'm not missing any major hardware
-features and the set of possible improvements would be in memory timing or in UI/UX. With respect to that goal, here's what's outstanding: 
+I'm hardly the first to write a Game Boy Advance Emulator nor will I be the last. This project isn't going to compete with the GOATs like [mGBA](https://github.com/mgba-emu) or [NanoBoyAdvance](https://github.com/nba-emu/NanoBoyAdvance). There aren't any interesting ideas either like in [DSHBA](https://github.com/DenSinH/DSHBA).
+
+This is a simple (read: incomplete) for-fun long-term project. I hope to get "mostly there", which to me means that I'm not missing any major hardware features and the set of possible improvements would be in memory timing or in UI/UX. With respect to that goal, here's what's outstanding:
 
 ### TODO
+
 - [ ] Affine Sprites
 - [ ] Windowing (see [this branch](https://git.musuka.dev/paoda/zba/src/branch/window))
 - [ ] Audio Resampler (Having issues with SDL2's)
 - [ ] Immediate Mode GUI
 - [ ] Refactoring for easy-ish perf boosts
 
+## Usage
+
+As it currently exists, ZBA is run from the terminal. In your console of choice, type `./zba --help` to see what you can do.
+
+I typically find myself typing `./zba -b ./bin/bios.bin ./bin/test/suite.gba` to see how badly my "cool new feature" broke everything else.
+
+Need a BIOS? Why not try using the open-source [Cult-Of-GBA BIOS](https://github.com/Cult-of-GBA/BIOS) written by [fleroviux](https://github.com/fleroviux) and [DenSinH](https://github.com/DenSinH)?
+
+Finally it's worth noting that ZBA uses a TOML config file it'll store in your OS's data directory. See `example.toml` to learn about the defaults and what exactly you can mess around with.
+
 ## Tests
-- [x] [jsmolka's GBA Test Collection](https://github.com/jsmolka/gba-tests)
-    - [x] `arm.gba` and `thumb.gba`
-    - [x] `flash64.gba`, `flash128.gba`, `none.gba`, and `sram.gba`
-    - [x] `hello.gba`, `shades.gba`, and `stripes.gba`
-    - [x] `memory.gba`
-    - [x] `bios.gba`
-    - [x] `nes.gba`
-- [ ] [DenSinH's GBA ROMs](https://github.com/DenSinH/GBARoms)
-    - [x] `eeprom-test` and `flash-test`
-    - [x] `midikey2freq`
-    - [ ] `swi-tests-random`
-- [ ] [destoer's GBA Tests](https://github.com/destoer/gba_tests)
-    - [x] `cond_invalid.gba`
-    - [x] `dma_priority.gba`
-    - [x] `hello_world.gba`
-    - [x] `if_ack.gba`
-    - [ ] `line_timing.gba`
-    - [ ] `lyc_midline.gba`
-    - [ ] `window_midframe.gba`
-- [x] [ladystarbreeze's GBA Test Collection](https://github.com/ladystarbreeze/GBA-Test-Collection)
-    - [x] `retAddr.gba`
-    - [x] `helloWorld.gba`
-    - [x] `helloAudio.gba`
-- [x] [`armwrestler-gba-fixed.gba`](https://github.com/destoer/armwrestler-gba-fixed)
-- [x] [FuzzARM](https://github.com/DenSinH/FuzzARM)
+
+GBA Tests | [jsmolka](https://github.com/jsmolka/)
+--- | ---
+`arm.gba`,  `thumb.gba` | PASS
+`memory.gba`, `bios.gba` | PASS
+`flash64.gba`, `flash128.gba` | PASS
+`sram.gba` | PASS
+`none.gba` | PASS
+`hello.gba`, `shades.gba`, `stripes.gba` | PASS
+`nes.gba` | PASS
+
+GBARoms | [DenSinH](https://github.com/DenSinH/)
+--- | ---
+`eeprom-test`, `flash-test` | PASS
+`midikey2freq` | PASS
+`swi-tests-random` | FAIL
+
+gba_tests | [destoer](https://github.com/destoer/)
+--- | ---
+`cond_invalid.gba` | PASS
+`dma_priority.gba` | PASS
+`hello_world.gba` | PASS
+`if_ack.gba` | PASS
+`line_timing.gba` | FAIL
+`lyc_midline.gba` | FAIL
+`window_midframe.gba` | FAIL
+
+GBA Test Collection | [ladystarbreeze](https://github.com/ladystarbreeze)
+--- | ---
+`retAddr.gba` | PASS
+`helloWorld.gba` | PASS
+`helloAudio.gba` | PASS
+
+FuzzARM | [DenSinH](https://github.com/DenSinH/)
+--- | ---
+`main.gba` | PASS
+
+arm7wrestler GBA Fixed | [destoer](https://github.com/destoer)
+--- | ---
+`armwrestler-gba-fixed.gba` | PASS
 
 ## Resources
-* [GBATEK](https://problemkaputt.de/gbatek.htm)
-* [TONC](https://coranac.com/tonc/text/toc.htm)
-* [ARM Architecture Reference Manual](https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/third-party/ddi0100e_arm_arm.pdf)
-* [ARM7TDMI Data Sheet](https://www.dca.fee.unicamp.br/cursos/EA871/references/ARM/ARM7TDMIDataSheet.pdf)
+
+- [GBATEK](https://problemkaputt.de/gbatek.htm)
+- [TONC](https://coranac.com/tonc/text/toc.htm)
+- [ARM Architecture Reference Manual](https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/third-party/ddi0100e_arm_arm.pdf)
+- [ARM7TDMI Data Sheet](https://www.dca.fee.unicamp.br/cursos/EA871/references/ARM/ARM7TDMIDataSheet.pdf)
 
 ## Compiling
-Most recently built on Zig [0.10.0-dev.4474+b41b35f57](https://github.com/ziglang/zig/tree/b41b35f57)
+
+Most recently built on Zig [0.11.0-dev.368+1829b6eab](https://github.com/ziglang/zig/tree/1829b6eab)
 
 ### Dependencies
-* [SDL.zig](https://github.com/MasterQ32/SDL.zig)
-    * [SDL2](https://www.libsdl.org/download-2.0.php)
-* [zig-clap](https://github.com/Hejsil/zig-clap)
-* [known-folders](https://github.com/ziglibs/known-folders)
-* [zig-toml](https://github.com/aeronavery/zig-toml)
-* [zig-datetime](https://github.com/frmdstryr/zig-datetime)
-* [`bitfields.zig`](https://github.com/FlorenceOS/Florence/blob/aaa5a9e568/lib/util/bitfields.zig)
 
-`bitfields.zig` from [FlorenceOS](https://github.com/FlorenceOS) is included under `lib/util/bitfield.zig`.
+Dependency | Source
+--- | ---
+SDL.zig | <https://github.com/MasterQ32/SDL.zig>
+zig-clap | <https://github.com/Hejsil/zig-clap>
+known-folders | <https://github.com/ziglibs/known-folders>
+zig-toml | <https://github.com/aeronavery/zig-toml>
+zig-datetime | <https://github.com/frmdstryr/zig-datetime>
+`bitfields.zig` | [https://github.com/FlorenceOS/Florence](https://github.com/FlorenceOS/Florence/blob/aaa5a9e568/lib/util/bitfields.zig)
+`gl.zig` | <https://github.com/MasterQ32/zig-opengl>
 
 Use `git submodule update --init` from the project root to pull the git submodules `SDL.zig`, `zig-clap`, `known-folders`, `zig-toml` and `zig-datetime`
 
 Be sure to provide SDL2 using:
-* Linux: Your distro's package manager
-* MacOS: ¯\\\_(ツ)_/¯
-* Windows: [`vcpkg`](https://github.com/Microsoft/vcpkg) (install `sdl2:x64-windows`)
+
+- Linux: Your distro's package manager
+- MacOS: ¯\\\_(ツ)_/¯
+- Windows: [`vcpkg`](https://github.com/Microsoft/vcpkg) (install `sdl2:x64-windows`)
 
 `SDL.zig` will provide a helpful compile error if the zig compiler is unable to find SDL2.
 
 Once you've got all the dependencies, execute `zig build -Drelease-fast`. The executable is located at `zig-out/bin/`.
 
 ## Controls
+
 Key | Button
 --- | ---
 <kbd>X</kbd> | A

build.zig

@@ -1,7 +1,15 @@
 const std = @import("std");
+const builtin = @import("builtin");
 const Sdk = @import("lib/SDL.zig/Sdk.zig");
 
 pub fn build(b: *std.build.Builder) void {
+    // Minimum Zig Version
+    const min_ver = std.SemanticVersion.parse("0.11.0-dev.323+30eb2a175") catch return; // https://github.com/ziglang/zig/commit/30eb2a175
+    if (builtin.zig_version.order(min_ver).compare(.lt)) {
+        std.log.err("{s}", .{b.fmt("Zig v{} does not meet the minimum version requirement. (Zig v{})", .{ builtin.zig_version, min_ver })});
+        std.os.exit(1);
+    }
+
     // Standard target options allows the person running `zig build` to choose
     // what target to build for. Here we do not override the defaults, which
     // means any target is allowed, and the default is native. Other options

src/config.zig

@@ -49,16 +49,19 @@ pub fn config() *const Config {
 }
 
 /// Reads a config file and then loads it into the global state
-pub fn load(allocator: Allocator, config_path: []const u8) !void {
-    var config_file = try std.fs.cwd().openFile(config_path, .{});
+pub fn load(allocator: Allocator, file_path: []const u8) !void {
+    var config_file = try std.fs.cwd().openFile(file_path, .{});
     defer config_file.close();
 
-    log.info("loaded from {s}", .{config_path});
+    log.info("loaded from {s}", .{file_path});
 
     const contents = try config_file.readToEndAlloc(allocator, try config_file.getEndPos());
     defer allocator.free(contents);
 
-    const table = try toml.parseContents(allocator, contents, null);
+    var parser = try toml.parseFile(allocator, file_path);
+    defer parser.deinit();
+
+    const table = try parser.parse();
     defer table.deinit();
 
     // TODO: Report unknown config options

src/core/Bus.zig

@@ -33,6 +33,11 @@ pub const fetch_timings: [2][0x10]u8 = [_][0x10]u8{
     [_]u8{ 1, 1, 6, 1, 1, 2, 2, 1, 4, 4, 4, 4, 4, 4, 8, 8 }, // 32-bit
 };
 
+// Fastmem Related
+const page_size = 1 * 0x400; // 1KiB
+const address_space_size = 0x1000_0000;
+const table_len = address_space_size / page_size;
+
 const Self = @This();
 
 pak: GamePak,
@@ -48,7 +53,17 @@ io: Io,
 cpu: *Arm7tdmi,
 sched: *Scheduler,
 
+read_table: *const [table_len]?*const anyopaque,
+write_tables: [2]*const [table_len]?*anyopaque,
+allocator: Allocator,
+
 pub fn init(self: *Self, allocator: Allocator, sched: *Scheduler, cpu: *Arm7tdmi, paths: FilePaths) !void {
+    const tables = try allocator.alloc(?*anyopaque, 3 * table_len); // Allocate all tables
+
+    const read_table: *[table_len]?*const anyopaque = tables[0..table_len];
+    const left_write: *[table_len]?*anyopaque = tables[table_len .. 2 * table_len];
+    const right_write: *[table_len]?*anyopaque = tables[2 * table_len .. 3 * table_len];
+
     self.* = .{
         .pak = try GamePak.init(allocator, cpu, paths.rom, paths.save),
         .bios = try Bios.init(allocator, paths.bios),
@@ -61,7 +76,20 @@ pub fn init(self: *Self, allocator: Allocator, sched: *Scheduler, cpu: *Arm7tdmi
         .io = Io.init(),
         .cpu = cpu,
         .sched = sched,
+
+        .read_table = read_table,
+        .write_tables = .{ left_write, right_write },
+        .allocator = allocator,
     };
+
+    // read_table, write_tables, and *Self are not restricted to the lifetime
+    // of this init function so we can initialize our tables here
+    fillReadTable(self, read_table);
+
+    // Internal Display Memory behavious unusually on 8-bit reads
+    // so we have two different tables depending on whether there's an 8-bit read or not
+    fillWriteTable(u32, self, left_write);
+    fillWriteTable(u8, self, right_write);
 }
 
 pub fn deinit(self: *Self) void {
@@ -70,34 +98,131 @@ pub fn deinit(self: *Self) void {
     self.pak.deinit();
     self.bios.deinit();
     self.ppu.deinit();
+
+    // This is so I can deallocate the original `allocator.alloc`. I have to re-make the type
+    // since I'm not keeping it around, This is very jank and bad though
+    // FIXME: please figure out another way
+    self.allocator.free(@ptrCast([*]const ?*anyopaque, self.read_table[0..])[0 .. 3 * table_len]);
     self.* = undefined;
 }
 
-pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
-    const page = @truncate(u8, address >> 24);
-    const aligned_addr = forceAlign(T, address);
+fn fillReadTable(bus: *Self, table: *[table_len]?*const anyopaque) void {
+    const vramMirror = @import("ppu.zig").Vram.mirror;
+
+    for (table) |*ptr, i| {
+        const addr = page_size * i;
+
+        ptr.* = switch (addr) {
+            // General Internal Memory
+            0x0000_0000...0x0000_3FFF => null, // BIOS has it's own checks
+            0x0200_0000...0x02FF_FFFF => &bus.ewram.buf[addr & 0x3FFFF],
+            0x0300_0000...0x03FF_FFFF => &bus.iwram.buf[addr & 0x7FFF],
+            0x0400_0000...0x0400_03FF => null, // I/O
+
+            // Internal Display Memory
+            0x0500_0000...0x05FF_FFFF => &bus.ppu.palette.buf[addr & 0x3FF],
+            0x0600_0000...0x06FF_FFFF => &bus.ppu.vram.buf[vramMirror(addr)],
+            0x0700_0000...0x07FF_FFFF => &bus.ppu.oam.buf[addr & 0x3FF],
+
+            // External Memory (Game Pak)
+            0x0800_0000...0x0DFF_FFFF => fillTableExternalMemory(bus, addr),
+            0x0E00_0000...0x0FFF_FFFF => null, // SRAM
+            else => null,
+        };
+    }
+}
+
+fn fillWriteTable(comptime T: type, bus: *Self, table: *[table_len]?*const anyopaque) void {
+    comptime std.debug.assert(T == u32 or T == u16 or T == u8);
+    const vramMirror = @import("ppu.zig").Vram.mirror;
+
+    for (table) |*ptr, i| {
+        const addr = page_size * i;
+
+        ptr.* = switch (addr) {
+            // General Internal Memory
+            0x0000_0000...0x0000_3FFF => null, // BIOS has it's own checks
+            0x0200_0000...0x02FF_FFFF => &bus.ewram.buf[addr & 0x3FFFF],
+            0x0300_0000...0x03FF_FFFF => &bus.iwram.buf[addr & 0x7FFF],
+            0x0400_0000...0x0400_03FF => null, // I/O
+
+            // Internal Display Memory
+            0x0500_0000...0x05FF_FFFF => if (T != u8) &bus.ppu.palette.buf[addr & 0x3FF] else null,
+            0x0600_0000...0x06FF_FFFF => if (T != u8) &bus.ppu.vram.buf[vramMirror(addr)] else null,
+            0x0700_0000...0x07FF_FFFF => if (T != u8) &bus.ppu.oam.buf[addr & 0x3FF] else null,
+
+            // External Memory (Game Pak)
+            0x0800_0000...0x0DFF_FFFF => null, // ROM
+            0x0E00_0000...0x0FFF_FFFF => null, // SRAM
+            else => null,
+        };
+    }
+}
+
+fn fillTableExternalMemory(bus: *Self, addr: usize) ?*anyopaque {
+    // see `GamePak.zig` for more information about what conditions need to be true
+    // so that a simple pointer dereference isn't possible
+
+    const start_addr = addr;
+    const end_addr = addr + page_size;
+
+    const gpio_data = start_addr <= 0x0800_00C4 and 0x0800_00C4 < end_addr;
+    const gpio_direction = start_addr <= 0x0800_00C6 and 0x0800_00C6 < end_addr;
+    const gpio_control = start_addr <= 0x0800_00C8 and 0x0800_00C8 < end_addr;
+
+    if (bus.pak.gpio.device.kind != .None and (gpio_data or gpio_direction or gpio_control)) {
+        // We found a GPIO device, and this page a GPIO register. We want to handle this in slowmem
+        return null;
+    }
+
+    if (bus.pak.backup.kind == .Eeprom) {
+        if (bus.pak.buf.len > 0x100_000) {
+            // We are using a "large" EEPROM which means that if the below check is true
+            // this page has an address that's reserved for the EEPROM and therefore must
+            // be handled in slowmem
+            if (addr & 0x1FF_FFFF > 0x1FF_FEFF) return null;
+        } else {
+            // We are using a "small" EEPROM which means that if the below check is true
+            // (that is, we're in the 0xD address page) then we must handle at least one
+            // address in this page in slowmem
+            if (@truncate(u4, addr >> 24) == 0xD) return null;
+        }
+    }
+
+    // Finally, the GamePak has some unique behaviour for reads past the end of the ROM,
+    // so those will be handled by slowmem as well
+    const masked_addr = addr & 0x1FF_FFFF;
+    if (masked_addr >= bus.pak.buf.len) return null;
+
+    return &bus.pak.buf[masked_addr];
+}
+
+// TODO: Take advantage of fastmem here too?
+pub fn dbgRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
+    const page = @truncate(u8, unaligned_address >> 24);
+    const address = forceAlign(T, unaligned_address);
 
     return switch (page) {
         // General Internal Memory
         0x00 => blk: {
             if (address < Bios.size)
-                break :blk self.bios.dbgRead(T, self.cpu.r[15], aligned_addr);
+                break :blk self.bios.dbgRead(T, self.cpu.r[15], address);
 
             break :blk self.openBus(T, address);
         },
-        0x02 => self.ewram.read(T, aligned_addr),
-        0x03 => self.iwram.read(T, aligned_addr),
+        0x02 => self.ewram.read(T, address),
+        0x03 => self.iwram.read(T, address),
         0x04 => self.readIo(T, address),
 
         // Internal Display Memory
-        0x05 => self.ppu.palette.read(T, aligned_addr),
-        0x06 => self.ppu.vram.read(T, aligned_addr),
-        0x07 => self.ppu.oam.read(T, aligned_addr),
+        0x05 => self.ppu.palette.read(T, address),
+        0x06 => self.ppu.vram.read(T, address),
+        0x07 => self.ppu.oam.read(T, address),
 
         // External Memory (Game Pak)
-        0x08...0x0D => self.pak.dbgRead(T, aligned_addr),
+        0x08...0x0D => self.pak.dbgRead(T, address),
         0x0E...0x0F => blk: {
-            const value = self.pak.backup.read(address);
+            const value = self.pak.backup.read(unaligned_address);
 
             const multiplier = switch (T) {
                 u32 => 0x01010101,
@@ -112,17 +237,22 @@ pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
     };
 }
 
-/// TODO: Should open bus read addresses be force-aligned?
-fn readIo(self: *const Self, comptime T: type, unaligned_address: u32) T {
-    const maybe_value = io.read(self, T, forceAlign(T, unaligned_address));
-    return if (maybe_value) |value| value else self.openBus(T, unaligned_address);
+fn readIo(self: *const Self, comptime T: type, address: u32) T {
+    return io.read(self, T, address) orelse self.openBus(T, address);
 }
 
 fn openBus(self: *const Self, comptime T: type, address: u32) T {
+    @setCold(true);
     const r15 = self.cpu.r[15];
 
     const word = blk: {
         // If Arm, get the most recently fetched instruction (PC + 8)
+        //
+        // FIXME: This is most likely a faulty assumption.
+        // I think what *actually* happens is that the Bus has a latch for the most
+        // recently fetched piece of data, which is then returned during Open Bus (also DMA open bus?)
+        // I can "get away" with this because it's very statistically likely that the most recently latched value is
+        // the most recently fetched instruction by the pipeline
         if (!self.cpu.cpsr.t.read()) break :blk self.cpu.pipe.stage[1].?;
 
         const page = @truncate(u8, r15 >> 24);
@@ -172,33 +302,58 @@ fn openBus(self: *const Self, comptime T: type, address: u32) T {
     return @truncate(T, word);
 }
 
-pub fn read(self: *Self, comptime T: type, address: u32) T {
-    const page = @truncate(u8, address >> 24);
-    const aligned_addr = forceAlign(T, address);
+pub fn read(self: *Self, comptime T: type, unaligned_address: u32) T {
+    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
+    const page = unaligned_address >> bits;
+    const offset = unaligned_address & (page_size - 1);
 
-    self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
+    // whether or not we do this in slowmem or fastmem, we should advance the scheduler
+    self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, unaligned_address >> 24)];
+
+    // We're doing some serious out-of-bounds open-bus reads
+    if (page >= table_len) return self.openBus(T, unaligned_address);
+
+    if (self.read_table[page]) |some_ptr| {
+        // We have a pointer to a page, cast the pointer to it's underlying type
+        const Ptr = [*]const T;
+        const alignment = @alignOf(std.meta.Child(Ptr));
+        const ptr = @ptrCast(Ptr, @alignCast(alignment, some_ptr));
+
+        // Note: We don't check array length, since we force align the
+        // lower bits of the address as the GBA would
+        return ptr[forceAlign(T, offset) / @sizeOf(T)];
+    }
+
+    return self.slowRead(T, unaligned_address);
+}
+
+fn slowRead(self: *Self, comptime T: type, unaligned_address: u32) T {
+    @setCold(true);
+
+    const page = @truncate(u8, unaligned_address >> 24);
+    const address = forceAlign(T, unaligned_address);
 
     return switch (page) {
         // General Internal Memory
         0x00 => blk: {
             if (address < Bios.size)
-                break :blk self.bios.read(T, self.cpu.r[15], aligned_addr);
+                break :blk self.bios.read(T, self.cpu.r[15], address);
 
             break :blk self.openBus(T, address);
         },
-        0x02 => self.ewram.read(T, aligned_addr),
-        0x03 => self.iwram.read(T, aligned_addr),
+        0x02 => unreachable, // completely handled by fastmeme
+        0x03 => unreachable, // completely handled by fastmeme
         0x04 => self.readIo(T, address),
 
         // Internal Display Memory
-        0x05 => self.ppu.palette.read(T, aligned_addr),
-        0x06 => self.ppu.vram.read(T, aligned_addr),
-        0x07 => self.ppu.oam.read(T, aligned_addr),
+        0x05 => unreachable, // completely handled by fastmeme
+        0x06 => unreachable, // completely handled by fastmeme
+        0x07 => unreachable, // completely handled by fastmeme
 
         // External Memory (Game Pak)
-        0x08...0x0D => self.pak.read(T, aligned_addr),
+        0x08...0x0D => self.pak.read(T, address),
         0x0E...0x0F => blk: {
-            const value = self.pak.backup.read(address);
+            const value = self.pak.backup.read(unaligned_address);
 
             const multiplier = switch (T) {
                 u32 => 0x01010101,
@@ -213,44 +368,71 @@ pub fn read(self: *Self, comptime T: type, address: u32) T {
     };
 }
 
-pub fn write(self: *Self, comptime T: type, address: u32, value: T) void {
-    const page = @truncate(u8, address >> 24);
-    const aligned_addr = forceAlign(T, address);
+pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
+    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
+    const page = unaligned_address >> bits;
+    const offset = unaligned_address & (page_size - 1);
 
-    self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
+    // whether or not we do this in slowmem or fastmem, we should advance the scheduler
+    self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, unaligned_address >> 24)];
+
+    // We're doing some serious out-of-bounds open-bus writes, they do nothing though
+    if (page >= table_len) return;
+
+    if (self.write_tables[@boolToInt(T == u8)][page]) |some_ptr| {
+        // We have a pointer to a page, cast the pointer to it's underlying type
+        const Ptr = [*]T;
+        const alignment = @alignOf(std.meta.Child(Ptr));
+        const ptr = @ptrCast(Ptr, @alignCast(alignment, some_ptr));
+
+        // Note: We don't check array length, since we force align the
+        // lower bits of the address as the GBA would
+        ptr[forceAlign(T, offset) / @sizeOf(T)] = value;
+    } else {
+        // we can return early if this is an 8-bit OAM write
+        if (T == u8 and @truncate(u8, unaligned_address >> 24) == 0x07) return;
+
+        self.slowWrite(T, unaligned_address, value);
+    }
+}
+
+pub fn slowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
+    // @setCold(true);
+    const page = @truncate(u8, unaligned_address >> 24);
+    const address = forceAlign(T, unaligned_address);
 
     switch (page) {
         // General Internal Memory
-        0x00 => self.bios.write(T, aligned_addr, value),
-        0x02 => self.ewram.write(T, aligned_addr, value),
-        0x03 => self.iwram.write(T, aligned_addr, value),
-        0x04 => io.write(self, T, aligned_addr, value),
+        0x00 => self.bios.write(T, address, value),
+        0x02 => unreachable, // completely handled by fastmem
+        0x03 => unreachable, // completely handled by fastmem
+        0x04 => io.write(self, T, address, value),
 
         // Internal Display Memory
-        0x05 => self.ppu.palette.write(T, aligned_addr, value),
-        0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, aligned_addr, value),
-        0x07 => self.ppu.oam.write(T, aligned_addr, value),
+        0x05 => self.ppu.palette.write(T, address, value),
+        0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, address, value),
+        0x07 => unreachable, // completely handled by fastmem
 
         // External Memory (Game Pak)
-        0x08...0x0D => self.pak.write(T, self.dma[3].word_count, aligned_addr, value),
-        0x0E...0x0F => {
-            const rotate_by = switch (T) {
+        0x08...0x0D => self.pak.write(T, self.dma[3].word_count, address, value),
+        0x0E...0x0F => self.pak.backup.write(unaligned_address, @truncate(u8, rotr(T, value, 8 * rotateBy(T, unaligned_address)))),
+        else => {},
+    }
+}
+
+inline fn rotateBy(comptime T: type, address: u32) u32 {
+    return switch (T) {
         u32 => address & 3,
         u16 => address & 1,
         u8 => 0,
         else => @compileError("Backup: Unsupported write width"),
     };
-
-            self.pak.backup.write(address, @truncate(u8, rotr(T, value, 8 * rotate_by)));
-        },
-        else => {},
-    }
 }
 
-fn forceAlign(comptime T: type, address: u32) u32 {
+inline fn forceAlign(comptime T: type, address: u32) u32 {
     return switch (T) {
-        u32 => address & 0xFFFF_FFFC,
-        u16 => address & 0xFFFF_FFFE,
+        u32 => address & ~@as(u32, 3),
+        u16 => address & ~@as(u32, 1),
         u8 => address,
         else => @compileError("Bus: Invalid read/write type"),
     };

src/core/apu.zig

@@ -15,12 +15,10 @@ const SoundFifo = std.fifo.LinearFifo(u8, .{ .Static = 0x20 });
 const getHalf = util.getHalf;
 const setHalf = util.setHalf;
 const intToBytes = util.intToBytes;
+const RingBuffer = util.RingBuffer;
 
 const log = std.log.scoped(.APU);
 
-pub const host_rate = @import("../platform.zig").sample_rate;
-pub const host_format = @import("../platform.zig").sample_format;
-
 pub fn read(comptime T: type, apu: *const Apu, addr: u32) ?T {
     const byte_addr = @truncate(u8, addr);
 
@@ -108,8 +106,14 @@ pub fn read(comptime T: type, apu: *const Apu, addr: u32) ?T {
 pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
     const byte_addr = @truncate(u8, addr);
 
+    if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
+
     switch (T) {
-        u32 => switch (byte_addr) {
+        u32 => {
+            // 0x80 and 0x81 handled in setSoundCnt
+            if (byte_addr < 0x80 and !apu.cnt.apu_enable.read()) return;
+
+            switch (byte_addr) {
                 0x60 => apu.ch1.setSound1Cnt(value),
                 0x64 => apu.ch1.setSound1CntX(&apu.fs, @truncate(u16, value)),
 
@@ -131,8 +135,12 @@ pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
                 0xA0 => apu.chA.push(value), // FIFO_A
                 0xA4 => apu.chB.push(value), // FIFO_B
                 else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
+            }
         },
-        u16 => switch (byte_addr) {
+        u16 => {
+            if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
+
+            switch (byte_addr) {
                 0x60 => apu.ch1.setSound1CntL(@truncate(u8, value)), // SOUND1CNT_L
                 0x62 => apu.ch1.setSound1CntH(value),
                 0x64 => apu.ch1.setSound1CntX(&apu.fs, value),
@@ -164,8 +172,12 @@ pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
                 0xA0, 0xA2 => log.err("Tried to write 0x{X:0>4}{} to FIFO_A", .{ value, T }),
                 0xA4, 0xA6 => log.err("Tried to write 0x{X:0>4}{} to FIFO_B", .{ value, T }),
                 else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
+            }
         },
-        u8 => switch (byte_addr) {
+        u8 => {
+            if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
+
+            switch (byte_addr) {
                 0x60 => apu.ch1.setSound1CntL(value),
                 0x61 => {},
                 0x62 => apu.ch1.setNr11(value),
@@ -208,6 +220,7 @@ pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
                 0xA0...0xA3 => log.err("Tried to write 0x{X:0>2}{} to FIFO_A", .{ value, T }),
                 0xA4...0xA7 => log.err("Tried to write 0x{X:0>2}{} to FIFO_B", .{ value, T }),
                 else => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
+            }
         },
         else => @compileError("APU: Unsupported write width"),
     }
@@ -231,17 +244,20 @@ pub const Apu = struct {
 
     sampling_cycle: u2,
 
-    stream: *SDL.SDL_AudioStream,
+    sample_queue: RingBuffer(u16),
     sched: *Scheduler,
 
     fs: FrameSequencer,
     capacitor: f32,
 
-    is_buffer_full: bool,
-
     pub const Tick = enum { Length, Envelope, Sweep };
 
     pub fn init(sched: *Scheduler) Self {
+        const NUM_CHANNELS: usize = 2;
+
+        const allocator = std.heap.c_allocator;
+        const sample_buf = allocator.alloc(u16, 0x800 * NUM_CHANNELS) catch @panic("failed to allocate sample buffer");
+
         const apu: Self = .{
             .ch1 = ToneSweep.init(sched),
             .ch2 = Tone.init(sched),
@@ -256,12 +272,11 @@ pub const Apu = struct {
             .bias = .{ .raw = 0x0200 },
 
             .sampling_cycle = 0b00,
-            .stream = SDL.SDL_NewAudioStream(SDL.AUDIO_U16, 2, 1 << 15, host_format, 2, host_rate).?,
+            .sample_queue = RingBuffer(u16).init(sample_buf),
             .sched = sched,
 
             .capacitor = 0,
             .fs = FrameSequencer.init(),
-            .is_buffer_full = false,
         };
 
         sched.push(.SampleAudio, apu.interval());
@@ -275,15 +290,20 @@ pub const Apu = struct {
     }
 
     fn reset(self: *Self) void {
+        // All PSG Registers between 0x0400_0060..0x0400_0081 are zeroed
+        // 0x0400_0082 and 0x0400_0088 retain their values
         self.ch1.reset();
         self.ch2.reset();
         self.ch3.reset();
         self.ch4.reset();
+
+        // GBATEK says 4000060h..4000081h I take this to mean inclusive
+        self.psg_cnt.raw = 0x0000;
     }
 
     /// SOUNDCNT
     fn setSoundCnt(self: *Self, value: u32) void {
-        self.setSoundCntL(@truncate(u16, value));
+        if (self.cnt.apu_enable.read()) self.setSoundCntL(@truncate(u16, value));
         self.setSoundCntH(@truncate(u16, value >> 16));
     }
 
@@ -322,11 +342,14 @@ pub const Apu = struct {
             self.fs.step = 0; // Reset Frame Sequencer
 
             // Reset Square Wave Offsets
-            self.ch1.square.pos = 0;
-            self.ch2.square.pos = 0;
+            self.ch1.square.reset();
+            self.ch2.square.reset();
 
-            // Reset Wave Device Offsets
-            self.ch3.wave_dev.offset = 0;
+            // Reset Wave
+            self.ch3.wave_dev.reset();
+
+            // Rest Noise
+            self.ch4.lfsr.reset();
         } else {
             self.reset();
         }
@@ -347,11 +370,6 @@ pub const Apu = struct {
     pub fn sampleAudio(self: *Self, late: u64) void {
         self.sched.push(.SampleAudio, self.interval() -| late);
 
-        // Whether the APU is busy or not is determined  by the main loop in emu.zig
-        // This should only ever be true (because this side of the emu is single threaded)
-        // When audio sync is disaabled
-        if (self.is_buffer_full) return;
-
         var left: i16 = 0;
         var right: i16 = 0;
 
@@ -395,8 +413,8 @@ pub const Apu = struct {
         right += if (self.dma_cnt.chB_right.read()) chB_sample else 0;
 
         // Add SOUNDBIAS
-        // FIXME: Is SOUNDBIAS 9-bit or 10-bit?
-        const bias = @as(i16, self.bias.level.read()) << 1;
+        // FIXME: SOUNDBIAS is 10-bit but The waveform is centered around 0 if I treat it as 11-bit
+        const bias = @as(i16, self.bias.level.read()) << 2;
         left += bias;
         right += bias;
 
@@ -407,24 +425,7 @@ pub const Apu = struct {
         const ext_left = (clamped_left << 5) | (clamped_left >> 6);
         const ext_right = (clamped_right << 5) | (clamped_right >> 6);
 
-        // FIXME: This rarely happens
-        if (self.sampling_cycle != self.bias.sampling_cycle.read()) self.replaceSDLResampler();
-
-        _ = SDL.SDL_AudioStreamPut(self.stream, &[2]u16{ ext_left, ext_right }, 2 * @sizeOf(u16));
-    }
-
-    fn replaceSDLResampler(self: *Self) void {
-        @setCold(true);
-        const sample_rate = Self.sampleRate(self.bias.sampling_cycle.read());
-        log.info("Sample Rate changed from {}Hz to {}Hz", .{ Self.sampleRate(self.sampling_cycle), sample_rate });
-
-        // Sampling Cycle (Sample Rate) changed, Craete a new SDL Audio Resampler
-        // FIXME: Replace SDL's Audio Resampler with either a custom or more reliable one
-        const old_stream = self.stream;
-        defer SDL.SDL_FreeAudioStream(old_stream);
-
-        self.sampling_cycle = self.bias.sampling_cycle.read();
-        self.stream = SDL.SDL_NewAudioStream(SDL.AUDIO_U16, 2, @intCast(c_int, sample_rate), host_format, 2, host_rate).?;
+        self.sample_queue.push(ext_left, ext_right) catch {};
     }
 
     fn interval(self: *const Self) u64 {
@@ -473,11 +474,15 @@ pub const Apu = struct {
         if (!self.cnt.apu_enable.read()) return;
 
         if (@boolToInt(self.dma_cnt.chA_timer.read()) == tim_id) {
+            if (!self.chA.enabled) return;
+
             self.chA.updateSample();
             if (self.chA.len() <= 15) cpu.bus.dma[1].requestAudio(0x0400_00A0);
         }
 
         if (@boolToInt(self.dma_cnt.chB_timer.read()) == tim_id) {
+            if (!self.chB.enabled) return;
+
             self.chB.updateSample();
             if (self.chB.len() <= 15) cpu.bus.dma[2].requestAudio(0x0400_00A4);
         }
@@ -491,19 +496,28 @@ pub fn DmaSound(comptime kind: DmaSoundKind) type {
         fifo: SoundFifo,
         kind: DmaSoundKind,
         sample: i8,
+        enabled: bool,
 
         fn init() Self {
             return .{
                 .fifo = SoundFifo.init(),
                 .kind = kind,
                 .sample = 0,
+                .enabled = false,
             };
         }
 
         pub fn push(self: *Self, value: u32) void {
+            if (!self.enabled) self.enable();
+
             self.fifo.write(&intToBytes(u32, value)) catch |e| log.err("{} Error: {}", .{ kind, e });
         }
 
+        fn enable(self: *Self) void {
+            @setCold(true);
+            self.enabled = true;
+        }
+
         pub fn len(self: *const Self) usize {
             return self.fifo.readableLength();
         }

src/core/apu/Noise.zig

@@ -49,10 +49,13 @@ pub fn init(sched: *Scheduler) Self {
 }
 
 pub fn reset(self: *Self) void {
-    self.len = 0;
-    self.envelope.raw = 0;
-    self.poly.raw = 0;
-    self.cnt.raw = 0;
+    self.len = 0; // NR41
+    self.envelope.raw = 0; // NR42
+    self.poly.raw = 0; // NR43
+    self.cnt.raw = 0; // NR44
+
+    self.len_dev.reset();
+    self.env_dev.reset();
 
     self.sample = 0;
     self.enabled = false;

src/core/apu/Tone.zig

@@ -43,9 +43,12 @@ pub fn init(sched: *Scheduler) Self {
 }
 
 pub fn reset(self: *Self) void {
-    self.duty.raw = 0;
-    self.envelope.raw = 0;
-    self.freq.raw = 0;
+    self.duty.raw = 0; // NR21
+    self.envelope.raw = 0; // NR22
+    self.freq.raw = 0; // NR32, NR24
+
+    self.len_dev.reset();
+    self.env_dev.reset();
 
     self.sample = 0;
     self.enabled = false;

src/core/apu/ToneSweep.zig

@@ -50,12 +50,14 @@ pub fn init(sched: *Scheduler) Self {
 }
 
 pub fn reset(self: *Self) void {
-    self.sweep.raw = 0;
-    self.sweep_dev.calc_performed = false;
+    self.sweep.raw = 0; // NR10
+    self.duty.raw = 0; // NR11
+    self.envelope.raw = 0; // NR12
+    self.freq.raw = 0; // NR13, NR14
 
-    self.duty.raw = 0;
-    self.envelope.raw = 0;
-    self.freq.raw = 0;
+    self.len_dev.reset();
+    self.sweep_dev.reset();
+    self.env_dev.reset();
 
     self.sample = 0;
     self.enabled = false;
@@ -92,10 +94,9 @@ pub fn sound1CntL(self: *const Self) u8 {
 pub fn setSound1CntL(self: *Self, value: u8) void {
     const new = io.Sweep{ .raw = value };
 
-    if (self.sweep.direction.read() and !new.direction.read()) {
-        // Sweep Negate bit has been cleared
-        // If At least 1 Sweep Calculation has been made since
-        // the last trigger, the channel is immediately disabled
+    if (!new.direction.read()) {
+        // If at least one (1) sweep calculation has been made with
+        // the negate bit set (since last trigger), disable the channel
 
         if (self.sweep_dev.calc_performed) self.enabled = false;
     }

src/core/apu/Wave.zig

@@ -42,10 +42,13 @@ pub fn init(sched: *Scheduler) Self {
 }
 
 pub fn reset(self: *Self) void {
-    self.select.raw = 0;
-    self.length = 0;
-    self.vol.raw = 0;
-    self.freq.raw = 0;
+    self.select.raw = 0; // NR30
+    self.length = 0; // NR31
+    self.vol.raw = 0; // NR32
+    self.freq.raw = 0; // NR33, NR34
+
+    self.len_dev.reset();
+    self.wave_dev.reset();
 
     self.sample = 0;
     self.enabled = false;

src/core/apu/device/Envelope.zig

@@ -11,6 +11,11 @@ pub fn create() Self {
     return .{ .timer = 0, .vol = 0 };
 }
 
+pub fn reset(self: *Self) void {
+    self.timer = 0;
+    self.vol = 0;
+}
+
 pub fn tick(self: *Self, nrx2: io.Envelope) void {
     if (nrx2.period.read() != 0) {
         if (self.timer != 0) self.timer -= 1;

src/core/apu/device/Length.zig

@@ -6,6 +6,10 @@ pub fn create() Self {
     return .{ .timer = 0 };
 }
 
+pub fn reset(self: *Self) void {
+    self.timer = 0;
+}
+
 pub fn tick(self: *Self, enabled: bool, ch_enable: *bool) void {
     if (enabled) {
         if (self.timer == 0) return;

src/core/apu/device/Sweep.zig

@@ -18,13 +18,19 @@ pub fn create() Self {
     };
 }
 
+pub fn reset(self: *Self) void {
+    self.timer = 0;
+    self.enabled = false;
+    self.shadow = 0;
+    self.calc_performed = false;
+}
+
 pub fn tick(self: *Self, ch1: *ToneSweep) void {
     if (self.timer != 0) self.timer -= 1;
 
     if (self.timer == 0) {
         const period = ch1.sweep.period.read();
         self.timer = if (period == 0) 8 else period;
-        if (!self.calc_performed) self.calc_performed = true;
 
         if (self.enabled and period != 0) {
             const new_freq = self.calculate(ch1.sweep, &ch1.enabled);
@@ -45,7 +51,10 @@ pub fn calculate(self: *Self, sweep: io.Sweep, ch_enable: *bool) u12 {
     const shadow_shifted = shadow >> sweep.shift.read();
     const decrease = sweep.direction.read();
 
-    const freq = if (decrease) shadow - shadow_shifted else shadow + shadow_shifted;
+    const freq = if (decrease) blk: {
+        self.calc_performed = true;
+        break :blk shadow - shadow_shifted;
+    } else shadow + shadow_shifted;
     if (freq > 0x7FF) ch_enable.* = false;
 
     return freq;

src/core/apu/signal/Lfsr.zig

@@ -19,6 +19,11 @@ pub fn create(sched: *Scheduler) Self {
     };
 }
 
+pub fn reset(self: *Self) void {
+    self.shift = 0;
+    self.timer = 0;
+}
+
 pub fn sample(self: *const Self) i8 {
     return if ((~self.shift & 1) == 1) 1 else -1;
 }
@@ -33,7 +38,7 @@ pub fn reload(self: *Self, poly: io.PolyCounter) void {
 }
 
 /// Scheduler Event Handler for LFSR Timer Expire
-/// FIXME: This gets called a lot, clogging up the Scheduler
+/// FIXME: This gets called a lot, slowing down the scheduler
 pub fn onLfsrTimerExpire(self: *Self, poly: io.PolyCounter, late: u64) void {
     // Obscure: "Using a noise channel clock shift of 14 or 15
     // results in the LFSR receiving no clocks."

src/core/apu/signal/Square.zig

@@ -20,6 +20,11 @@ pub fn init(sched: *Scheduler) Self {
     };
 }
 
+pub fn reset(self: *Self) void {
+    self.timer = 0;
+    self.pos = 0;
+}
+
 /// Scheduler Event Handler for Square Synth Timer Expire
 pub fn onSquareTimerExpire(self: *Self, comptime T: type, nrx34: io.Frequency, late: u64) void {
     comptime std.debug.assert(T == ToneSweep or T == Tone);

src/core/apu/signal/Wave.zig

@@ -38,6 +38,13 @@ pub fn init(sched: *Scheduler) Self {
     };
 }
 
+pub fn reset(self: *Self) void {
+    self.timer = 0;
+    self.offset = 0;
+
+    // sample buffer isn't reset because it's outside of the range of what NR52{7}'s effects
+}
+
 /// Reload internal Wave Timer
 pub fn reload(self: *Self, value: u11) void {
     self.sched.removeScheduledEvent(.{ .ApuChannel = 2 });

src/core/bus/GamePak.zig

@@ -105,14 +105,13 @@ pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
 
         switch (T) {
             u32 => switch (address) {
-                // TODO: Do I even need to implement these?
+                // FIXME: Do I even need to implement these?
                 0x0800_00C4 => std.debug.panic("Handle 32-bit GPIO Data/Direction Reads", .{}),
                 0x0800_00C6 => std.debug.panic("Handle 32-bit GPIO Direction/Control Reads", .{}),
                 0x0800_00C8 => std.debug.panic("Handle 32-bit GPIO Control Reads", .{}),
                 else => {},
             },
             u16 => switch (address) {
-                // FIXME: What do 16-bit GPIO Reads look like?
                 0x0800_00C4 => return self.gpio.read(.Data),
                 0x0800_00C6 => return self.gpio.read(.Direction),
                 0x0800_00C8 => return self.gpio.read(.Control),

src/core/bus/backup.zig

@@ -6,7 +6,6 @@ const Eeprom = @import("backup/eeprom.zig").Eeprom;
 const Flash = @import("backup/Flash.zig");
 
 const escape = @import("../../util.zig").escape;
-const span = @import("../../util.zig").span;
 
 const Needle = struct { str: []const u8, kind: Backup.Kind };
 const backup_kinds = [6]Needle{
@@ -151,8 +150,8 @@ pub const Backup = struct {
         const file_path = try self.savePath(allocator, path);
         defer allocator.free(file_path);
 
-        // FIXME: Don't rely on this lol
-        if (std.mem.eql(u8, file_path[file_path.len - 12 .. file_path.len], "untitled.sav")) {
+        const expected = "untitled.sav";
+        if (std.mem.eql(u8, file_path[file_path.len - expected.len .. file_path.len], expected)) {
             return log.err("ROM header lacks title, no save loaded", .{});
         }
 
@@ -195,7 +194,7 @@ pub const Backup = struct {
     }
 
     fn saveName(self: *const Self, allocator: Allocator) ![]const u8 {
-        const title_str = span(&escape(self.title));
+        const title_str = std.mem.sliceTo(&escape(self.title), 0);
         const name = if (title_str.len != 0) title_str else "untitled";
 
         return try std.mem.concat(allocator, u8, &[_][]const u8{ name, ".sav" });

src/core/bus/backup/eeprom.zig

@@ -63,7 +63,7 @@ pub const Eeprom = struct {
         }
 
         if (self.state == .RequestEnd) {
-            if (bit != 0) log.debug("EEPROM Request did not end in 0u1. TODO: is this ok?", .{});
+            // if (bit != 0) log.debug("EEPROM Request did not end in 0u1. TODO: is this ok?", .{});
             self.state = .Ready;
             return;
         }

src/core/bus/dma.zig

@@ -5,7 +5,7 @@ const DmaControl = @import("io.zig").DmaControl;
 const Bus = @import("../Bus.zig");
 const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
 
-pub const DmaTuple = std.meta.Tuple(&[_]type{ DmaController(0), DmaController(1), DmaController(2), DmaController(3) });
+pub const DmaTuple = struct { DmaController(0), DmaController(1), DmaController(2), DmaController(3) };
 const log = std.log.scoped(.DmaTransfer);
 
 const getHalf = util.getHalf;
@@ -256,12 +256,16 @@ fn DmaController(comptime id: u2) type {
                 cpu.bus.write(u16, dad_addr, @truncate(u16, rotr(u32, self.data_latch, 8 * (dad_addr & 3))));
             }
 
-            switch (sad_adj) {
+            switch (@truncate(u8, sad_addr >> 24)) {
+                // according to fleroviux, DMAs with a source address in ROM misbehave
+                // the resultant behaviour is that the source address will increment despite what DMAXCNT says
+                0x08...0x0D => self.sad_latch +%= offset, // obscure behaviour
+                else => switch (sad_adj) {
                     .Increment => self.sad_latch +%= offset,
                     .Decrement => self.sad_latch -%= offset,
-                // FIXME: Is just ignoring this ok?
                     .IncrementReload => log.err("{} is a prohibited adjustment on SAD", .{sad_adj}),
                     .Fixed => {},
+                },
             }
 
             switch (dad_adj) {
@@ -335,10 +339,10 @@ fn DmaController(comptime id: u2) type {
 }
 
 pub fn pollDmaOnBlank(bus: *Bus, comptime kind: DmaKind) void {
-    bus.dma[0].poll(kind);
-    bus.dma[1].poll(kind);
-    bus.dma[2].poll(kind);
-    bus.dma[3].poll(kind);
+    comptime var i: usize = 0;
+    inline while (i < 4) : (i += 1) {
+        bus.dma[i].poll(kind);
+    }
 }
 
 const Adjustment = enum(u2) {

src/core/bus/gpio.zig

@@ -71,7 +71,7 @@ pub const Gpio = struct {
 
         self.* = .{
             .data = 0b0000,
-            .direction = 0b1111, // TODO: What is GPIO DIrection set to by default?
+            .direction = 0b1111, // TODO: What is GPIO Direction set to by default?
             .cnt = 0b0,
 
             .device = switch (kind) {

src/core/bus/io.zig

@@ -9,6 +9,9 @@ const Bit = @import("bitfield").Bit;
 const Bitfield = @import("bitfield").Bitfield;
 const Bus = @import("../Bus.zig");
 
+const getHalf = util.getHalf;
+const setHalf = util.setHalf;
+
 const log = std.log.scoped(.@"I/O");
 
 pub const Io = struct {
@@ -19,15 +22,17 @@ pub const Io = struct {
     ie: InterruptEnable,
     irq: InterruptRequest,
     postflg: PostFlag,
+    waitcnt: WaitControl,
     haltcnt: HaltControl,
-    keyinput: KeyInput,
+    keyinput: AtomicKeyInput,
 
     pub fn init() Self {
         return .{
             .ime = false,
             .ie = .{ .raw = 0x0000 },
             .irq = .{ .raw = 0x0000 },
-            .keyinput = .{ .raw = 0x03FF },
+            .keyinput = AtomicKeyInput.init(.{ .raw = 0x03FF }),
+            .waitcnt = .{ .raw = 0x0000_0000 }, // Bit 15 == 0 for GBA
             .postflg = .FirstBoot,
             .haltcnt = .Execute,
         };
@@ -64,8 +69,10 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
             0x0400_0150 => util.io.read.todo(log, "Read {} from JOY_RECV", .{T}),
 
             // Interrupts
-            0x0400_0200 => @as(T, bus.io.irq.raw) << 16 | bus.io.ie.raw,
+            0x0400_0200 => @as(u32, bus.io.irq.raw) << 16 | bus.io.ie.raw,
+            0x0400_0204 => bus.io.waitcnt.raw,
             0x0400_0208 => @boolToInt(bus.io.ime),
+            0x0400_0300 => @enumToInt(bus.io.postflg),
             else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
         },
         u16 => switch (address) {
@@ -85,16 +92,23 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
             0x0400_0128 => util.io.read.todo(log, "Read {} from SIOCNT", .{T}),
 
             // Keypad Input
-            0x0400_0130 => bus.io.keyinput.raw,
+            0x0400_0130 => bus.io.keyinput.load(.Monotonic).raw,
 
             // Serial Communication 2
             0x0400_0134 => util.io.read.todo(log, "Read {} from RCNT", .{T}),
+            0x0400_0136 => 0x0000,
+            0x0400_0142 => 0x0000,
+            0x0400_015A => 0x0000,
 
             // Interrupts
             0x0400_0200 => bus.io.ie.raw,
             0x0400_0202 => bus.io.irq.raw,
-            0x0400_0204 => util.io.read.todo(log, "Read {} from WAITCNT", .{T}),
+            0x0400_0204 => bus.io.waitcnt.raw,
+            0x0400_0206 => 0x0000,
             0x0400_0208 => @boolToInt(bus.io.ime),
+            0x0400_020A => 0x0000,
+            0x0400_0300 => @enumToInt(bus.io.postflg),
+            0x0400_0302 => 0x0000,
             else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
         },
         u8 => return switch (address) {
@@ -118,10 +132,20 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
 
             // Serial Communication 2
             0x0400_0135 => util.io.read.todo(log, "Read {} from RCNT_H", .{T}),
+            0x0400_0136, 0x0400_0137 => 0x00,
+            0x0400_0142, 0x0400_0143 => 0x00,
+            0x0400_015A, 0x0400_015B => 0x00,
 
             // Interrupts
-            0x0400_0200 => @truncate(T, bus.io.ie.raw),
+            0x0400_0200, 0x0400_0201 => @truncate(T, bus.io.ie.raw >> getHalf(@truncate(u8, address))),
+            0x0400_0202, 0x0400_0203 => @truncate(T, bus.io.irq.raw >> getHalf(@truncate(u8, address))),
+            0x0400_0204, 0x0400_0205 => @truncate(T, bus.io.waitcnt.raw >> getHalf(@truncate(u8, address))),
+            0x0400_0206, 0x0400_0207 => 0x00,
+            0x0400_0208, 0x0400_0209 => @truncate(T, @as(u16, @boolToInt(bus.io.ime)) >> getHalf(@truncate(u8, address))),
+            0x0400_020A, 0x0400_020B => 0x00,
             0x0400_0300 => @enumToInt(bus.io.postflg),
+            0x0400_0301 => null,
+            0x0400_0302, 0x0400_0303 => 0x00,
             else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
         },
         else => @compileError("I/O: Unsupported read width"),
@@ -168,9 +192,12 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
 
             // Interrupts
             0x0400_0200 => bus.io.setIrqs(value),
-            0x0400_0204 => log.debug("Wrote 0x{X:0>8} to WAITCNT", .{value}),
+            0x0400_0204 => bus.io.waitcnt.set(@truncate(u16, value)),
             0x0400_0208 => bus.io.ime = value & 1 == 1,
-            0x0400_020C...0x0400_021C => {}, // Unused
+            0x0400_0300 => {
+                bus.io.postflg = @intToEnum(PostFlag, value & 1);
+                bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
+            },
             else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, address }),
         },
         u16 => switch (address) {
@@ -186,7 +213,7 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
 
             // Timers
             0x0400_0100...0x0400_010E => timer.write(T, &bus.tim, address, value),
-            0x0400_0114 => {}, // TODO: Gyakuten Saiban writes 0x8000 to 0x0400_0114
+            0x0400_0114 => {},
             0x0400_0110 => {}, // Not Used,
 
             // Serial Communication 1
@@ -210,9 +237,14 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
             // Interrupts
             0x0400_0200 => bus.io.ie.raw = value,
             0x0400_0202 => bus.io.irq.raw &= ~value,
-            0x0400_0204 => log.debug("Wrote 0x{X:0>4} to WAITCNT", .{value}),
+            0x0400_0204 => bus.io.waitcnt.set(value),
+            0x0400_0206 => {},
             0x0400_0208 => bus.io.ime = value & 1 == 1,
-            0x0400_0206, 0x0400_020A => {}, // Not Used
+            0x0400_020A => {},
+            0x0400_0300 => {
+                bus.io.postflg = @intToEnum(PostFlag, value & 1);
+                bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
+            },
             else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, address }),
         },
         u8 => switch (address) {
@@ -237,9 +269,16 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
             0x0400_0140 => log.debug("Wrote 0x{X:0>2} to JOYCNT_L", .{value}),
 
             // Interrupts
+            0x0400_0200, 0x0400_0201 => bus.io.ie.raw = setHalf(u16, bus.io.ie.raw, @truncate(u8, address), value),
             0x0400_0202 => bus.io.irq.raw &= ~@as(u16, value),
+            0x0400_0203 => bus.io.irq.raw &= ~@as(u16, value) << 8, // TODO: Is this good?
+            0x0400_0204, 0x0400_0205 => bus.io.waitcnt.set(setHalf(u16, @truncate(u16, bus.io.waitcnt.raw), @truncate(u8, address), value)),
+            0x0400_0206, 0x0400_0207 => {},
             0x0400_0208 => bus.io.ime = value & 1 == 1,
-            0x0400_0300 => bus.io.postflg = std.meta.intToEnum(PostFlag, value & 1) catch unreachable,
+            0x0400_0209 => {},
+            0x0400_020A, 0x0400_020B => {},
+
+            0x0400_0300 => bus.io.postflg = @intToEnum(PostFlag, value & 1),
             0x0400_0301 => bus.io.haltcnt = if (value >> 7 & 1 == 0) .Halt else std.debug.panic("TODO: Implement STOP", .{}),
 
             0x0400_0410 => log.debug("Wrote 0x{X:0>2} to the common yet undocumented 0x{X:0>8}", .{ value, address }),
@@ -278,14 +317,22 @@ pub const DisplayControl = extern union {
 
 /// Read / Write
 pub const DisplayStatus = extern union {
+    /// read-only
     vblank: Bit(u16, 0),
+    /// read-only
     hblank: Bit(u16, 1),
+    // read-only
     coincidence: Bit(u16, 2),
     vblank_irq: Bit(u16, 3),
     hblank_irq: Bit(u16, 4),
     vcount_irq: Bit(u16, 5),
     vcount_trigger: Bitfield(u16, 8, 8),
     raw: u16,
+
+    pub fn set(self: *DisplayStatus, value: u16) void {
+        const mask: u16 = 0x00C7; // set bits are read-only
+        self.raw = (self.raw & mask) | (value & ~mask);
+    }
 };
 
 /// Read Only
@@ -329,6 +376,31 @@ const KeyInput = extern union {
     raw: u16,
 };
 
+const AtomicKeyInput = struct {
+    const Self = @This();
+    const Ordering = std.atomic.Ordering;
+
+    inner: KeyInput,
+
+    pub fn init(value: KeyInput) Self {
+        return .{ .inner = value };
+    }
+
+    pub inline fn load(self: *const Self, comptime ordering: Ordering) KeyInput {
+        return .{ .raw = switch (ordering) {
+            .AcqRel, .Release => @compileError("not supported for atomic loads"),
+            else => @atomicLoad(u16, &self.inner.raw, ordering),
+        } };
+    }
+
+    pub inline fn store(self: *Self, value: u16, comptime ordering: Ordering) void {
+        switch (ordering) {
+            .AcqRel, .Acquire => @compileError("not supported for atomic stores"),
+            else => @atomicStore(u16, &self.inner.raw, value, ordering),
+        }
+    }
+};
+
 // Read / Write
 pub const BackgroundControl = extern union {
     priority: Bitfield(u16, 0, 2),
@@ -576,3 +648,24 @@ pub const SoundBias = extern union {
     sampling_cycle: Bitfield(u16, 14, 2),
     raw: u16,
 };
+
+/// Read / Write
+pub const WaitControl = extern union {
+    sram_cnt: Bitfield(u16, 0, 2),
+    s0_first: Bitfield(u16, 2, 2),
+    s0_second: Bit(u16, 4),
+    s1_first: Bitfield(u16, 5, 2),
+    s1_second: Bit(u16, 7),
+    s2_first: Bitfield(u16, 8, 2),
+    s2_second: Bit(u16, 10),
+    phi_out: Bitfield(u16, 11, 2),
+
+    prefetch_enable: Bit(u16, 14),
+    pak_kind: Bit(u16, 15),
+    raw: u16,
+
+    pub fn set(self: *WaitControl, value: u16) void {
+        const mask: u16 = 0x8000; // set bits are read-only
+        self.raw = (self.raw & mask) | (value & ~mask);
+    }
+};

src/core/bus/timer.zig

@@ -5,7 +5,7 @@ const TimerControl = @import("io.zig").TimerControl;
 const Scheduler = @import("../scheduler.zig").Scheduler;
 const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
 
-pub const TimerTuple = std.meta.Tuple(&[_]type{ Timer(0), Timer(1), Timer(2), Timer(3) });
+pub const TimerTuple = struct { Timer(0), Timer(1), Timer(2), Timer(3) };
 const log = std.log.scoped(.Timer);
 
 const getHalf = util.getHalf;
@@ -150,20 +150,35 @@ fn Timer(comptime id: u2) type {
         pub fn setTimcntH(self: *Self, halfword: u16) void {
             const new = TimerControl{ .raw = halfword };
 
-            // If Timer happens to be enabled, It will either be resheduled or disabled
+            if (self.cnt.enabled.read()) {
+                // timer was already enabled
+
+                // If enabled falling edge or cascade falling edge, timer is paused
+                if (!new.enabled.read() or (!self.cnt.cascade.read() and new.cascade.read())) {
                     self.sched.removeScheduledEvent(.{ .TimerOverflow = id });
 
-            if (self.cnt.enabled.read() and (new.cascade.read() or !new.enabled.read())) {
-                // Either through the cascade bit or the enable bit, the timer has effectively been disabled
-                // The Counter should hold whatever value it should have been at when it was disabled
+                    // Counter should hold the value it stopped at meaning we have to calculate it now
                     self._counter +%= @truncate(u16, (self.sched.now() - self._start_timestamp) / self.frequency());
                 }
 
-            // The counter is only reloaded on the rising edge of the enable bit
-            if (!self.cnt.enabled.read() and new.enabled.read()) self._counter = self._reload;
+                // the timer has always been enabled, but the cascade bit which was blocking the timer has been unset
+                if (new.enabled.read() and (self.cnt.cascade.read() and !new.cascade.read())) {
+                    // we want to reschedule the timer event, however we won't reload the counter.
+                    // the invariant here is that self._counter holds the already calculated paused value
 
-            // If Timer is enabled and we're not cascading, we need to schedule an overflow event
-            if (new.enabled.read() and !new.cascade.read()) self.rescheduleTimerExpire(0);
+                    self.rescheduleTimerExpire(0);
+                }
+            } else {
+                // the timer was previously disabeld
+
+                if (new.enabled.read()) {
+                    // timer should start counting (with a reloaded counter value)
+                    self._counter = self._reload;
+
+                    // if cascade happens to be set, the timer doesn't actually do anything though
+                    if (!new.cascade.read()) self.rescheduleTimerExpire(0);
+                }
+            }
 
             self.cnt.raw = halfword;
         }
@@ -190,23 +205,20 @@ fn Timer(comptime id: u2) type {
 
             // Perform Cascade Behaviour
             switch (id) {
-                0 => if (cpu.bus.tim[1].cnt.cascade.read()) {
-                    cpu.bus.tim[1]._counter +%= 1;
-                    if (cpu.bus.tim[1]._counter == 0) cpu.bus.tim[1].onTimerExpire(cpu, late);
+                inline 0, 1, 2 => |idx| {
+                    const next = idx + 1;
+
+                    if (cpu.bus.tim[next].cnt.cascade.read()) {
+                        cpu.bus.tim[next]._counter +%= 1;
+                        if (cpu.bus.tim[next]._counter == 0) cpu.bus.tim[next].onTimerExpire(cpu, late);
+                    }
                 },
-                1 => if (cpu.bus.tim[2].cnt.cascade.read()) {
-                    cpu.bus.tim[2]._counter +%= 1;
-                    if (cpu.bus.tim[2]._counter == 0) cpu.bus.tim[2].onTimerExpire(cpu, late);
-                },
-                2 => if (cpu.bus.tim[3].cnt.cascade.read()) {
-                    cpu.bus.tim[3]._counter +%= 1;
-                    if (cpu.bus.tim[3]._counter == 0) cpu.bus.tim[3].onTimerExpire(cpu, late);
-                },
-                3 => {}, // There is no Timer for TIM3 to "cascade" to,
+                3 => {}, // THere is no timer for TIM3 to cascade to
             }
 
             // Reschedule Timer if we're not cascading
-            if (!self.cnt.cascade.read()) {
+            // TIM0 cascade value is N/A
+            if (id == 0 or !self.cnt.cascade.read()) {
                 self._counter = self._reload;
                 self.rescheduleTimerExpire(late);
             }

src/core/cpu.zig

@@ -7,6 +7,7 @@ const Scheduler = @import("scheduler.zig").Scheduler;
 const Logger = @import("../util.zig").Logger;
 
 const File = std.fs.File;
+const log = std.log.scoped(.Arm7Tdmi);
 
 // ARM Instructions
 pub const arm = struct {
@@ -234,8 +235,6 @@ pub const thumb = struct {
     }
 };
 
-const log = std.log.scoped(.Arm7Tdmi);
-
 pub const Arm7tdmi = struct {
     const Self = @This();
 
@@ -246,34 +245,36 @@ pub const Arm7tdmi = struct {
     cpsr: PSR,
     spsr: PSR,
 
-    /// Storage  for R8_fiq -> R12_fiq and their normal counterparts
-    /// e.g [r[0 + 8], fiq_r[0 + 8], r[1 + 8], fiq_r[1 + 8]...]
-    banked_fiq: [2 * 5]u32,
-
-    /// Storage for r13_<mode>, r14_<mode>
-    /// e.g. [r13, r14, r13_svc, r14_svc]
-    banked_r: [2 * 6]u32,
-
-    banked_spsr: [5]PSR,
+    bank: Bank,
 
     logger: ?Logger,
 
-    pub fn init(sched: *Scheduler, bus: *Bus, log_file: ?std.fs.File) Self {
-        return Self{
-            .r = [_]u32{0x00} ** 16,
-            .pipe = Pipeline.init(),
-            .sched = sched,
-            .bus = bus,
-            .cpsr = .{ .raw = 0x0000_001F },
-            .spsr = .{ .raw = 0x0000_0000 },
-            .banked_fiq = [_]u32{0x00} ** 10,
-            .banked_r = [_]u32{0x00} ** 12,
-            .banked_spsr = [_]PSR{.{ .raw = 0x0000_0000 }} ** 5,
-            .logger = if (log_file) |file| Logger.init(file) else null,
+    /// Bank of Registers from other CPU Modes
+    const Bank = struct {
+        /// Storage for r13_<mode>, r14_<mode>
+        /// e.g. [r13, r14, r13_svc, r14_svc]
+        r: [2 * 6]u32,
+
+        /// Storage  for R8_fiq -> R12_fiq and their normal counterparts
+        /// e.g [r[0 + 8], fiq_r[0 + 8], r[1 + 8], fiq_r[1 + 8]...]
+        fiq: [2 * 5]u32,
+
+        spsr: [5]PSR,
+
+        const Kind = enum(u1) {
+            R13 = 0,
+            R14,
+        };
+
+        pub fn create() Bank {
+            return .{
+                .r = [_]u32{0x00} ** 12,
+                .fiq = [_]u32{0x00} ** 10,
+                .spsr = [_]PSR{.{ .raw = 0x0000_0000 }} ** 5,
             };
         }
 
-    inline fn bankedIdx(mode: Mode, kind: BankedKind) usize {
+        inline fn regIdx(mode: Mode, kind: Kind) usize {
             const idx: usize = switch (mode) {
                 .User, .System => 0,
                 .Supervisor => 1,
@@ -286,7 +287,7 @@ pub const Arm7tdmi = struct {
             return (idx * 2) + if (kind == .R14) @as(usize, 1) else 0;
         }
 
-    inline fn bankedSpsrIndex(mode: Mode) usize {
+        inline fn spsrIdx(mode: Mode) usize {
             return switch (mode) {
                 .Supervisor => 0,
                 .Abort => 1,
@@ -297,9 +298,23 @@ pub const Arm7tdmi = struct {
             };
         }
 
-    inline fn bankedFiqIdx(i: usize, mode: Mode) usize {
+        inline fn fiqIdx(i: usize, mode: Mode) usize {
             return (i * 2) + if (mode == .Fiq) @as(usize, 1) else 0;
         }
+    };
+
+    pub fn init(sched: *Scheduler, bus: *Bus, log_file: ?std.fs.File) Self {
+        return Self{
+            .r = [_]u32{0x00} ** 16,
+            .pipe = Pipeline.init(),
+            .sched = sched,
+            .bus = bus,
+            .cpsr = .{ .raw = 0x0000_001F },
+            .spsr = .{ .raw = 0x0000_0000 },
+            .bank = Bank.create(),
+            .logger = if (log_file) |file| Logger.init(file) else null,
+        };
+    }
 
     pub inline fn hasSPSR(self: *const Self) bool {
         const mode = getModeChecked(self, self.cpsr.mode.read());
@@ -336,14 +351,14 @@ pub const Arm7tdmi = struct {
         switch (idx) {
             8...12 => {
                 if (current == .Fiq) {
-                    self.banked_fiq[bankedFiqIdx(idx - 8, .User)] = value;
+                    self.bank.fiq[Bank.fiqIdx(idx - 8, .User)] = value;
                 } else self.r[idx] = value;
             },
             13, 14 => switch (current) {
                 .User, .System => self.r[idx] = value,
                 else => {
-                    const kind = std.meta.intToEnum(BankedKind, idx - 13) catch unreachable;
-                    self.banked_r[bankedIdx(.User, kind)] = value;
+                    const kind = std.meta.intToEnum(Bank.Kind, idx - 13) catch unreachable;
+                    self.bank.r[Bank.regIdx(.User, kind)] = value;
                 },
             },
             else => self.r[idx] = value, // R0 -> R7  and R15
@@ -354,12 +369,12 @@ pub const Arm7tdmi = struct {
         const current = getModeChecked(self, self.cpsr.mode.read());
 
         return switch (idx) {
-            8...12 => if (current == .Fiq) self.banked_fiq[bankedFiqIdx(idx - 8, .User)] else self.r[idx],
+            8...12 => if (current == .Fiq) self.bank.fiq[Bank.fiqIdx(idx - 8, .User)] else self.r[idx],
             13, 14 => switch (current) {
                 .User, .System => self.r[idx],
                 else => blk: {
-                    const kind = std.meta.intToEnum(BankedKind, idx - 13) catch unreachable;
-                    break :blk self.banked_r[bankedIdx(.User, kind)];
+                    const kind = std.meta.intToEnum(Bank.Kind, idx - 13) catch unreachable;
+                    break :blk self.bank.r[Bank.regIdx(.User, kind)];
                 },
             },
             else => self.r[idx], // R0 -> R7  and R15
@@ -372,38 +387,38 @@ pub const Arm7tdmi = struct {
         // Bank R8 -> r12
         var i: usize = 0;
         while (i < 5) : (i += 1) {
-            self.banked_fiq[bankedFiqIdx(i, now)] = self.r[8 + i];
+            self.bank.fiq[Bank.fiqIdx(i, now)] = self.r[8 + i];
         }
 
         // Bank r13, r14, SPSR
         switch (now) {
             .User, .System => {
-                self.banked_r[bankedIdx(now, .R13)] = self.r[13];
-                self.banked_r[bankedIdx(now, .R14)] = self.r[14];
+                self.bank.r[Bank.regIdx(now, .R13)] = self.r[13];
+                self.bank.r[Bank.regIdx(now, .R14)] = self.r[14];
             },
             else => {
-                self.banked_r[bankedIdx(now, .R13)] = self.r[13];
-                self.banked_r[bankedIdx(now, .R14)] = self.r[14];
-                self.banked_spsr[bankedSpsrIndex(now)] = self.spsr;
+                self.bank.r[Bank.regIdx(now, .R13)] = self.r[13];
+                self.bank.r[Bank.regIdx(now, .R14)] = self.r[14];
+                self.bank.spsr[Bank.spsrIdx(now)] = self.spsr;
             },
         }
 
         // Grab R8 -> R12
         i = 0;
         while (i < 5) : (i += 1) {
-            self.r[8 + i] = self.banked_fiq[bankedFiqIdx(i, next)];
+            self.r[8 + i] = self.bank.fiq[Bank.fiqIdx(i, next)];
         }
 
         // Grab r13, r14, SPSR
         switch (next) {
             .User, .System => {
-                self.r[13] = self.banked_r[bankedIdx(next, .R13)];
-                self.r[14] = self.banked_r[bankedIdx(next, .R14)];
+                self.r[13] = self.bank.r[Bank.regIdx(next, .R13)];
+                self.r[14] = self.bank.r[Bank.regIdx(next, .R14)];
             },
             else => {
-                self.r[13] = self.banked_r[bankedIdx(next, .R13)];
-                self.r[14] = self.banked_r[bankedIdx(next, .R14)];
-                self.spsr = self.banked_spsr[bankedSpsrIndex(next)];
+                self.r[13] = self.bank.r[Bank.regIdx(next, .R13)];
+                self.r[14] = self.bank.r[Bank.regIdx(next, .R14)];
+                self.spsr = self.bank.spsr[Bank.spsrIdx(next)];
             },
         }
 
@@ -424,8 +439,8 @@ pub const Arm7tdmi = struct {
         self.r[13] = 0x0300_7F00;
         self.r[15] = 0x0800_0000;
 
-        self.banked_r[bankedIdx(.Irq, .R13)] = 0x0300_7FA0;
-        self.banked_r[bankedIdx(.Supervisor, .R13)] = 0x0300_7FE0;
+        self.bank.r[Bank.regIdx(.Irq, .R13)] = 0x0300_7FA0;
+        self.bank.r[Bank.regIdx(.Supervisor, .R13)] = 0x0300_7FE0;
 
         // self.cpsr.raw = 0x6000001F;
         self.cpsr.raw = 0x0000_001F;
@@ -455,29 +470,12 @@ pub const Arm7tdmi = struct {
     }
 
     pub fn stepDmaTransfer(self: *Self) bool {
-        const dma0 = &self.bus.dma[0];
-        const dma1 = &self.bus.dma[1];
-        const dma2 = &self.bus.dma[2];
-        const dma3 = &self.bus.dma[3];
-
-        if (dma0.in_progress) {
-            dma0.step(self);
+        comptime var i: usize = 0;
+        inline while (i < 4) : (i += 1) {
+            if (self.bus.dma[i].in_progress) {
+                self.bus.dma[i].step(self);
                 return true;
             }
-
-        if (dma1.in_progress) {
-            dma1.step(self);
-            return true;
-        }
-
-        if (dma2.in_progress) {
-            dma2.step(self);
-            return true;
-        }
-
-        if (dma3.in_progress) {
-            dma3.step(self);
-            return true;
         }
 
         return false;
@@ -532,10 +530,10 @@ pub const Arm7tdmi = struct {
             std.debug.print("R{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\n", .{ i, self.r[i], i_1, self.r[i_1], i_2, self.r[i_2], i_3, self.r[i_3] });
         }
         std.debug.print("cpsr: 0x{X:0>8} ", .{self.cpsr.raw});
-        prettyPrintPsr(&self.cpsr);
+        self.cpsr.toString();
 
         std.debug.print("spsr: 0x{X:0>8} ", .{self.spsr.raw});
-        prettyPrintPsr(&self.spsr);
+        self.spsr.toString();
 
         std.debug.print("pipeline: {??X:0>8}\n", .{self.pipe.stage});
 
@@ -553,97 +551,31 @@ pub const Arm7tdmi = struct {
 
         std.debug.panic(format, args);
     }
-
-    fn prettyPrintPsr(psr: *const PSR) void {
-        std.debug.print("[", .{});
-
-        if (psr.n.read()) std.debug.print("N", .{}) else std.debug.print("-", .{});
-        if (psr.z.read()) std.debug.print("Z", .{}) else std.debug.print("-", .{});
-        if (psr.c.read()) std.debug.print("C", .{}) else std.debug.print("-", .{});
-        if (psr.v.read()) std.debug.print("V", .{}) else std.debug.print("-", .{});
-        if (psr.i.read()) std.debug.print("I", .{}) else std.debug.print("-", .{});
-        if (psr.f.read()) std.debug.print("F", .{}) else std.debug.print("-", .{});
-        if (psr.t.read()) std.debug.print("T", .{}) else std.debug.print("-", .{});
-        std.debug.print("|", .{});
-        if (getMode(psr.mode.read())) |mode| std.debug.print("{s}", .{modeString(mode)}) else std.debug.print("---", .{});
-
-        std.debug.print("]\n", .{});
-    }
-
-    fn modeString(mode: Mode) []const u8 {
-        return switch (mode) {
-            .User => "usr",
-            .Fiq => "fiq",
-            .Irq => "irq",
-            .Supervisor => "svc",
-            .Abort => "abt",
-            .Undefined => "und",
-            .System => "sys",
-        };
-    }
-
-    fn mgbaLog(self: *const Self, file: *const File, opcode: u32) !void {
-        const thumb_fmt = "{X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} cpsr: {X:0>8} | {X:0>4}:\n";
-        const arm_fmt = "{X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} cpsr: {X:0>8} | {X:0>8}:\n";
-        var buf: [0x100]u8 = [_]u8{0x00} ** 0x100; // this is larger than it needs to be
-
-        const r0 = self.r[0];
-        const r1 = self.r[1];
-        const r2 = self.r[2];
-        const r3 = self.r[3];
-        const r4 = self.r[4];
-        const r5 = self.r[5];
-        const r6 = self.r[6];
-        const r7 = self.r[7];
-        const r8 = self.r[8];
-        const r9 = self.r[9];
-        const r10 = self.r[10];
-        const r11 = self.r[11];
-        const r12 = self.r[12];
-        const r13 = self.r[13];
-        const r14 = self.r[14];
-        const r15 = self.r[15] -| if (self.cpsr.t.read()) 2 else @as(u32, 4);
-
-        const c_psr = self.cpsr.raw;
-
-        var log_str: []u8 = undefined;
-        if (self.cpsr.t.read()) {
-            if (opcode >> 11 == 0x1E) {
-                // Instruction 1 of a BL Opcode, print in ARM mode
-                const other_half = self.bus.debugRead(u16, self.r[15] - 2);
-                const bl_opcode = @as(u32, opcode) << 16 | other_half;
-
-                log_str = try std.fmt.bufPrint(&buf, arm_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, bl_opcode });
-            } else {
-                log_str = try std.fmt.bufPrint(&buf, thumb_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, opcode });
-            }
-        } else {
-            log_str = try std.fmt.bufPrint(&buf, arm_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, opcode });
-        }
-
-        _ = try file.writeAll(log_str);
-    }
 };
 
-pub fn checkCond(cpsr: PSR, cond: u4) bool {
-    return switch (cond) {
-        0x0 => cpsr.z.read(), // EQ - Equal
-        0x1 => !cpsr.z.read(), // NE - Not equal
-        0x2 => cpsr.c.read(), // CS - Unsigned higher or same
-        0x3 => !cpsr.c.read(), // CC - Unsigned lower
-        0x4 => cpsr.n.read(), // MI - Negative
-        0x5 => !cpsr.n.read(), // PL - Positive or zero
-        0x6 => cpsr.v.read(), // VS - Overflow
-        0x7 => !cpsr.v.read(), // VC - No overflow
-        0x8 => cpsr.c.read() and !cpsr.z.read(), // HI - unsigned higher
-        0x9 => !cpsr.c.read() or cpsr.z.read(), // LS - unsigned lower or same
-        0xA => cpsr.n.read() == cpsr.v.read(), // GE - Greater or equal
-        0xB => cpsr.n.read() != cpsr.v.read(), // LT - Less than
-        0xC => !cpsr.z.read() and (cpsr.n.read() == cpsr.v.read()), // GT - Greater than
-        0xD => cpsr.z.read() or (cpsr.n.read() != cpsr.v.read()), // LE - Less than or equal
-        0xE => true, // AL - Always
-        0xF => false, // NV - Never (reserved in ARMv3 and up, but seems to have not changed?)
-    };
+const condition_lut = [_]u16{
+    0xF0F0, // EQ - Equal
+    0x0F0F, // NE - Not Equal
+    0xCCCC, // CS - Unsigned higher or same
+    0x3333, // CC - Unsigned lower
+    0xFF00, // MI - Negative
+    0x00FF, // PL - Positive or Zero
+    0xAAAA, // VS - Overflow
+    0x5555, // VC - No Overflow
+    0x0C0C, // HI - unsigned hierh
+    0xF3F3, // LS - unsigned lower or same
+    0xAA55, // GE - greater or equal
+    0x55AA, // LT - less than
+    0x0A05, // GT - greater than
+    0xF5FA, // LE - less than or equal
+    0xFFFF, // AL - always
+    0x0000, // NV - never
+};
+
+pub inline fn checkCond(cpsr: PSR, cond: u4) bool {
+    const flags = @truncate(u4, cpsr.raw >> 28);
+
+    return condition_lut[cond] & (@as(u16, 1) << flags) != 0;
 }
 
 const Pipeline = struct {
@@ -665,9 +597,7 @@ const Pipeline = struct {
     pub fn step(self: *Self, cpu: *Arm7tdmi, comptime T: type) ?u32 {
         comptime std.debug.assert(T == u32 or T == u16);
 
-        // FIXME: https://github.com/ziglang/zig/issues/12642
-        var opcode = self.stage[0];
-
+        const opcode = self.stage[0];
         self.stage[0] = self.stage[1];
         self.stage[1] = cpu.fetch(T, cpu.r[15]);
 
@@ -699,6 +629,22 @@ pub const PSR = extern union {
     z: Bit(u32, 30),
     n: Bit(u32, 31),
     raw: u32,
+
+    fn toString(self: PSR) void {
+        std.debug.print("[", .{});
+
+        if (self.n.read()) std.debug.print("N", .{}) else std.debug.print("-", .{});
+        if (self.z.read()) std.debug.print("Z", .{}) else std.debug.print("-", .{});
+        if (self.c.read()) std.debug.print("C", .{}) else std.debug.print("-", .{});
+        if (self.v.read()) std.debug.print("V", .{}) else std.debug.print("-", .{});
+        if (self.i.read()) std.debug.print("I", .{}) else std.debug.print("-", .{});
+        if (self.f.read()) std.debug.print("F", .{}) else std.debug.print("-", .{});
+        if (self.t.read()) std.debug.print("T", .{}) else std.debug.print("-", .{});
+        std.debug.print("|", .{});
+        if (getMode(self.mode.read())) |m| std.debug.print("{s}", .{m.toString()}) else std.debug.print("---", .{});
+
+        std.debug.print("]\n", .{});
+    }
 };
 
 const Mode = enum(u5) {
@@ -709,11 +655,18 @@ const Mode = enum(u5) {
     Abort = 0b10111,
     Undefined = 0b11011,
     System = 0b11111,
-};
 
-const BankedKind = enum(u1) {
-    R13 = 0,
-    R14,
+    fn toString(self: Mode) []const u8 {
+        return switch (self) {
+            .User => "usr",
+            .Fiq => "fiq",
+            .Irq => "irq",
+            .Supervisor => "svc",
+            .Abort => "abt",
+            .Undefined => "und",
+            .System => "sys",
+        };
+    }
 };
 
 fn getMode(bits: u5) ?Mode {

src/core/cpu/arm/block_data_transfer.zig

@@ -57,7 +57,6 @@ pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, c
                     cpu.r[15] = bus.read(u32, und_addr);
                     cpu.pipe.reload(cpu);
                 } else {
-                    // FIXME: Should r15 on write be +12 ahead?
                     bus.write(u32, und_addr, cpu.r[15] + 4);
                 }
 

src/core/emu.zig

@@ -5,6 +5,7 @@ const config = @import("../config.zig");
 const Scheduler = @import("scheduler.zig").Scheduler;
 const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
 const FpsTracker = @import("../util.zig").FpsTracker;
+const RingBuffer = @import("../util.zig").RingBuffer;
 
 const Timer = std.time.Timer;
 const Atomic = std.atomic.Atomic;
@@ -56,9 +57,9 @@ fn inner(comptime kind: RunKind, audio_sync: bool, quit: *Atomic(bool), schedule
         .Unlimited, .UnlimitedFPS => {
             log.info("Emulation w/out video sync", .{});
 
-            while (!quit.load(.SeqCst)) {
+            while (!quit.load(.Monotonic)) {
                 runFrame(scheduler, cpu);
-                audioSync(audio_sync, cpu.bus.apu.stream, &cpu.bus.apu.is_buffer_full);
+                audioSync(audio_sync, &cpu.bus.apu.sample_queue);
 
                 if (kind == .UnlimitedFPS) tracker.?.tick();
             }
@@ -68,7 +69,7 @@ fn inner(comptime kind: RunKind, audio_sync: bool, quit: *Atomic(bool), schedule
             var timer = Timer.start() catch @panic("failed to initalize std.timer.Timer");
             var wake_time: u64 = frame_period;
 
-            while (!quit.load(.SeqCst)) {
+            while (!quit.load(.Monotonic)) {
                 runFrame(scheduler, cpu);
                 const new_wake_time = videoSync(&timer, wake_time);
 
@@ -77,7 +78,7 @@ fn inner(comptime kind: RunKind, audio_sync: bool, quit: *Atomic(bool), schedule
                 // the amount of time needed for audio to catch up rather than
                 // our expected wake-up time
 
-                audioSync(audio_sync, cpu.bus.apu.stream, &cpu.bus.apu.is_buffer_full);
+                audioSync(audio_sync, &cpu.bus.apu.sample_queue);
                 if (!audio_sync) spinLoop(&timer, wake_time);
                 wake_time = new_wake_time;
 
@@ -104,21 +105,13 @@ pub fn runFrame(sched: *Scheduler, cpu: *Arm7tdmi) void {
     }
 }
 
-fn audioSync(audio_sync: bool, stream: *SDL.SDL_AudioStream, is_buffer_full: *bool) void {
-    const sample_size = 2 * @sizeOf(u16);
-    const max_buf_size: c_int = 0x400;
+fn audioSync(audio_sync: bool, sample_queue: *RingBuffer(u16)) void {
+    comptime std.debug.assert(@import("../platform.zig").sample_format == SDL.AUDIO_U16);
+    // const sample_size = 2 * @sizeOf(u16);
+    // const max_buf_size: c_int = 0x400;
 
-    // Determine whether the APU is busy right at this moment
-    var still_full: bool = SDL.SDL_AudioStreamAvailable(stream) > sample_size * if (is_buffer_full.*) max_buf_size >> 1 else max_buf_size;
-    defer is_buffer_full.* = still_full; // Update APU Busy status right before exiting scope
-
-    // If Busy is false, there's no need to sync here
-    if (!still_full) return;
-
-    while (true) {
-        still_full = SDL.SDL_AudioStreamAvailable(stream) > sample_size * max_buf_size >> 1;
-        if (!audio_sync or !still_full) break;
-    }
+    _ = audio_sync;
+    _ = sample_queue;
 }
 
 fn videoSync(timer: *Timer, wake_time: u64) u64 {

src/core/ppu.zig

@@ -94,7 +94,7 @@ pub fn write(comptime T: type, ppu: *Ppu, addr: u32, value: T) void {
         u32 => switch (byte_addr) {
             0x00 => ppu.dispcnt.raw = @truncate(u16, value),
             0x04 => {
-                ppu.dispstat.raw = @truncate(u16, value);
+                ppu.dispstat.set(@truncate(u16, value));
                 ppu.vcount.raw = @truncate(u16, value >> 16);
             },
             0x08 => ppu.setAdjCnts(0, value),
@@ -130,7 +130,7 @@ pub fn write(comptime T: type, ppu: *Ppu, addr: u32, value: T) void {
         u16 => switch (byte_addr) {
             0x00 => ppu.dispcnt.raw = value,
             0x02 => {}, // Green Swap
-            0x04 => ppu.dispstat.raw = value,
+            0x04 => ppu.dispstat.set(value),
             0x06 => {}, // VCOUNT
 
             0x08 => ppu.bg[0].cnt.raw = value,
@@ -178,7 +178,7 @@ pub fn write(comptime T: type, ppu: *Ppu, addr: u32, value: T) void {
         u8 => switch (byte_addr) {
             0x00, 0x01 => ppu.dispcnt.raw = setHalf(u16, ppu.dispcnt.raw, byte_addr, value),
             0x02, 0x03 => {}, // Green Swap
-            0x04, 0x05 => ppu.dispstat.raw = setHalf(u16, ppu.dispstat.raw, byte_addr, value),
+            0x04, 0x05 => ppu.dispstat.set(setHalf(u16, ppu.dispstat.raw, byte_addr, value)),
             0x06, 0x07 => {}, // VCOUNT
 
             // BGXCNT
@@ -882,7 +882,7 @@ const Palette = struct {
     }
 };
 
-const Vram = struct {
+pub const Vram = struct {
     const vram_size = 0x18000;
     const Self = @This();
 
@@ -933,7 +933,7 @@ const Vram = struct {
         }
     }
 
-    fn mirror(address: usize) usize {
+    pub fn mirror(address: usize) usize {
         // Mirrored in steps of 128K (64K + 32K + 32K) (abcc)
         const addr = address & 0x1FFFF;
 
@@ -1464,7 +1464,7 @@ const FrameBuffer = struct {
 
     layers: [2][]u8,
     buf: []u8,
-    current: u1,
+    current: std.atomic.Atomic(u8),
 
     allocator: Allocator,
 
@@ -1483,7 +1483,7 @@ const FrameBuffer = struct {
             // Front and Back Framebuffers
             .layers = [_][]u8{ buf[0..][0..framebuf_len], buf[framebuf_len..][0..framebuf_len] },
             .buf = buf,
-            .current = 0,
+            .current = std.atomic.Atomic(u8).init(0),
 
             .allocator = allocator,
         };
@@ -1495,10 +1495,12 @@ const FrameBuffer = struct {
     }
 
     pub fn swap(self: *Self) void {
-        self.current = ~self.current;
+        _ = self.current.fetchXor(1, .Release); // fetchNot(.Release)
     }
 
     pub fn get(self: *Self, comptime dev: Device) []u8 {
-        return self.layers[if (dev == .Emulator) self.current else ~self.current];
+        const current = @intCast(u1, self.current.load(.Acquire));
+
+        return self.layers[if (dev == .Emulator) current else ~current];
     }
 };

src/core/scheduler.zig

@@ -46,10 +46,7 @@ pub const Scheduler = struct {
                 },
                 .TimerOverflow => |id| {
                     switch (id) {
-                        0 => cpu.bus.tim[0].onTimerExpire(cpu, late),
-                        1 => cpu.bus.tim[1].onTimerExpire(cpu, late),
-                        2 => cpu.bus.tim[2].onTimerExpire(cpu, late),
-                        3 => cpu.bus.tim[3].onTimerExpire(cpu, late),
+                        inline 0...3 => |idx| cpu.bus.tim[idx].onTimerExpire(cpu, late),
                     }
                 },
                 .ApuChannel => |id| {

src/main.zig

@@ -26,33 +26,44 @@ const params = clap.parseParamsComptime(
     \\
 );
 
-pub fn main() anyerror!void {
+pub fn main() void {
     // Main Allocator for ZBA
     var gpa = std.heap.GeneralPurposeAllocator(.{}){};
     defer std.debug.assert(!gpa.deinit());
 
     const allocator = gpa.allocator();
 
-    // Determine the Data Directory (stores saves, config file, etc.)
+    // Determine the Data Directory (stores saves)
     const data_path = blk: {
         const result = known_folders.getPath(allocator, .data);
-        const option = result catch |e| exitln("interrupted while attempting to find a data directory: {}", .{e});
-        const path = option orelse exitln("no valid data directory could be found", .{});
-        ensureDirectoriesExist(path) catch |e| exitln("failed to create directories under \"{s}\": {}", .{ path, e });
+        const option = result catch |e| exitln("interrupted while determining the data folder: {}", .{e});
+        const path = option orelse exitln("no valid data folder found", .{});
+        ensureDataDirsExist(path) catch |e| exitln("failed to create folders under \"{s}\": {}", .{ path, e });
 
         break :blk path;
     };
     defer allocator.free(data_path);
 
+    // Determine the Config Directory
+    const config_path = blk: {
+        const result = known_folders.getPath(allocator, .roaming_configuration);
+        const option = result catch |e| exitln("interreupted while determining the config folder: {}", .{e});
+        const path = option orelse exitln("no valid config folder found", .{});
+        ensureConfigDirExists(path) catch |e| exitln("failed to create required folder \"{s}\": {}", .{ path, e });
+
+        break :blk path;
+    };
+    defer allocator.free(config_path);
+
     // Parse CLI
     const result = clap.parse(clap.Help, &params, clap.parsers.default, .{}) catch |e| exitln("failed to parse cli: {}", .{e});
     defer result.deinit();
 
     // TODO: Move config file to XDG Config directory?
-    const config_path = configFilePath(allocator, data_path) catch |e| exitln("failed to determine the config file path for ZBA: {}", .{e});
-    defer allocator.free(config_path);
+    const cfg_file_path = configFilePath(allocator, config_path) catch |e| exitln("failed to ready config file for access: {}", .{e});
+    defer allocator.free(cfg_file_path);
 
-    config.load(allocator, config_path) catch |e| exitln("failed to read config file: {}", .{e});
+    config.load(allocator, cfg_file_path) catch |e| exitln("failed to load config file: {}", .{e});
 
     const paths = handleArguments(allocator, data_path, &result) catch |e| exitln("failed to handle cli arguments: {}", .{e});
     defer if (paths.save) |path| allocator.free(path);
@@ -76,7 +87,7 @@ pub fn main() anyerror!void {
         cpu.fastBoot();
     }
 
-    var gui = Gui.init(&bus.pak.title, &bus.apu, width, height);
+    var gui = Gui.init(&bus.pak.title, &bus.apu, width, height) catch |e| exitln("failed to init gui: {}", .{e});
     defer gui.deinit();
 
     gui.run(&cpu, &scheduler) catch |e| exitln("failed to run gui thread: {}", .{e});
@@ -99,8 +110,8 @@ pub fn handleArguments(allocator: Allocator, data_path: []const u8, result: *con
     };
 }
 
-fn configFilePath(allocator: Allocator, data_path: []const u8) ![]const u8 {
-    const path = try std.fs.path.join(allocator, &[_][]const u8{ data_path, "zba", "config.toml" });
+fn configFilePath(allocator: Allocator, config_path: []const u8) ![]const u8 {
+    const path = try std.fs.path.join(allocator, &[_][]const u8{ config_path, "zba", "config.toml" });
     errdefer allocator.free(path);
 
     // We try to create the file exclusively, meaning that we err out if the file already exists.
@@ -109,7 +120,7 @@ fn configFilePath(allocator: Allocator, data_path: []const u8) ![]const u8 {
     std.fs.accessAbsolute(path, .{}) catch |e| {
         if (e != error.FileNotFound) return e;
 
-        const config_file = try std.fs.createFileAbsolute(path, .{});
+        const config_file = std.fs.createFileAbsolute(path, .{}) catch |err| exitln("failed to create \"{s}\": {}", .{ path, err });
         defer config_file.close();
 
         try config_file.writeAll(@embedFile("../example.toml"));
@@ -118,17 +129,21 @@ fn configFilePath(allocator: Allocator, data_path: []const u8) ![]const u8 {
     return path;
 }
 
-fn ensureDirectoriesExist(data_path: []const u8) !void {
+fn ensureDataDirsExist(data_path: []const u8) !void {
     var dir = try std.fs.openDirAbsolute(data_path, .{});
     defer dir.close();
 
-    // We want to make sure: %APPDATA%/zba and %APPDATA%/zba/save exist
-    // (~/.local/share/zba/save for linux, ??? for macOS)
-
     // Will recursively create directories
     try dir.makePath("zba" ++ std.fs.path.sep_str ++ "save");
 }
 
+fn ensureConfigDirExists(config_path: []const u8) !void {
+    var dir = try std.fs.openDirAbsolute(config_path, .{});
+    defer dir.close();
+
+    try dir.makePath("zba");
+}
+
 fn romPath(result: *const clap.Result(clap.Help, &params, clap.parsers.default)) []const u8 {
     return switch (result.positionals.len) {
         1 => result.positionals[0],

src/platform.zig

@@ -9,15 +9,13 @@ const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
 const Scheduler = @import("core/scheduler.zig").Scheduler;
 const FpsTracker = @import("util.zig").FpsTracker;
 
-const span = @import("util.zig").span;
-
 const gba_width = @import("core/ppu.zig").width;
 const gba_height = @import("core/ppu.zig").height;
 
-pub const sample_rate = 44100;
-pub const sample_format = SDL.AUDIO_F32;
+pub const sample_rate = 1 << 16;
+pub const sample_format = SDL.AUDIO_U16;
 
-const default_title: []const u8 = "ZBA";
+const default_title = "ZBA";
 
 pub const Gui = struct {
     const Self = @This();
@@ -46,7 +44,7 @@ pub const Gui = struct {
 
     program_id: gl.GLuint,
 
-    pub fn init(title: *const [12]u8, apu: *Apu, width: i32, height: i32) Self {
+    pub fn init(title: *const [12]u8, apu: *Apu, width: i32, height: i32) !Self {
         if (SDL.SDL_Init(SDL.SDL_INIT_VIDEO | SDL.SDL_INIT_EVENTS | SDL.SDL_INIT_AUDIO) < 0) panic();
         if (SDL.SDL_GL_SetAttribute(SDL.SDL_GL_CONTEXT_PROFILE_MASK, SDL.SDL_GL_CONTEXT_PROFILE_CORE) < 0) panic();
         if (SDL.SDL_GL_SetAttribute(SDL.SDL_GL_CONTEXT_MAJOR_VERSION, 3) < 0) panic();
@@ -55,7 +53,7 @@ pub const Gui = struct {
         const win_scale = @intCast(c_int, config.config().host.win_scale);
 
         const window = SDL.SDL_CreateWindow(
-            default_title.ptr,
+            default_title,
             SDL.SDL_WINDOWPOS_CENTERED,
             SDL.SDL_WINDOWPOS_CENTERED,
             @as(c_int, width * win_scale),
@@ -66,21 +64,21 @@ pub const Gui = struct {
         const ctx = SDL.SDL_GL_CreateContext(window) orelse panic();
         if (SDL.SDL_GL_MakeCurrent(window, ctx) < 0) panic();
 
-        gl.load(ctx, Self.glGetProcAddress) catch @panic("gl.load failed");
+        try gl.load(ctx, Self.glGetProcAddress);
         if (SDL.SDL_GL_SetSwapInterval(@boolToInt(config.config().host.vsync)) < 0) panic();
 
-        const program_id = compileShaders();
+        const program_id = try compileShaders();
 
         return Self{
             .window = window,
-            .title = span(title),
+            .title = std.mem.sliceTo(title, 0),
             .ctx = ctx,
             .program_id = program_id,
             .audio = Audio.init(apu),
         };
     }
 
-    fn compileShaders() gl.GLuint {
+    fn compileShaders() !gl.GLuint {
         // TODO: Panic on Shader Compiler Failure + Error Message
         const vert_shader = @embedFile("shader/pixelbuf.vert");
         const frag_shader = @embedFile("shader/pixelbuf.frag");
@@ -91,12 +89,16 @@ pub const Gui = struct {
         gl.shaderSource(vs, 1, &[_][*c]const u8{vert_shader}, 0);
         gl.compileShader(vs);
 
+        if (!shader.didCompile(vs)) return error.VertexCompileError;
+
         const fs = gl.createShader(gl.FRAGMENT_SHADER);
         defer gl.deleteShader(fs);
 
         gl.shaderSource(fs, 1, &[_][*c]const u8{frag_shader}, 0);
         gl.compileShader(fs);
 
+        if (!shader.didCompile(fs)) return error.FragmentCompileError;
+
         const program = gl.createProgram();
         gl.attachShader(program, vs);
         gl.attachShader(program, fs);
@@ -106,7 +108,7 @@ pub const Gui = struct {
     }
 
     // Returns the VAO ID since it's used in run()
-    fn generateBuffers() [3]c_uint {
+    fn generateBuffers() struct { c_uint, c_uint, c_uint } {
         var vao_id: c_uint = undefined;
         var vbo_id: c_uint = undefined;
         var ebo_id: c_uint = undefined;
@@ -156,13 +158,21 @@ pub const Gui = struct {
         var quit = std.atomic.Atomic(bool).init(false);
         var tracker = FpsTracker.init();
 
+        var buffer_ids = Self.generateBuffers();
+        defer {
+            gl.deleteBuffers(1, &buffer_ids[2]); // EBO
+            gl.deleteBuffers(1, &buffer_ids[1]); // VBO
+            gl.deleteVertexArrays(1, &buffer_ids[0]); // VAO
+        }
+        const vao_id = buffer_ids[0];
+
+        const tex_id = Self.generateTexture(cpu.bus.ppu.framebuf.get(.Renderer));
+        defer gl.deleteTextures(1, &tex_id);
+
         const thread = try std.Thread.spawn(.{}, emu.run, .{ &quit, scheduler, cpu, &tracker });
         defer thread.join();
 
-        var title_buf: [0x100]u8 = [_]u8{0} ** 0x100;
-
-        const vao_id = Self.generateBuffers()[0];
-        _ = Self.generateTexture(cpu.bus.ppu.framebuf.get(.Renderer));
+        var title_buf: [0x100]u8 = undefined;
 
         emu_loop: while (true) {
             var event: SDL.SDL_Event = undefined;
@@ -170,51 +180,50 @@ pub const Gui = struct {
                 switch (event.type) {
                     SDL.SDL_QUIT => break :emu_loop,
                     SDL.SDL_KEYDOWN => {
-                        const io = &cpu.bus.io;
                         const key_code = event.key.keysym.sym;
+                        var keyinput = cpu.bus.io.keyinput.load(.Monotonic);
 
                         switch (key_code) {
-                            SDL.SDLK_UP => io.keyinput.up.unset(),
-                            SDL.SDLK_DOWN => io.keyinput.down.unset(),
-                            SDL.SDLK_LEFT => io.keyinput.left.unset(),
-                            SDL.SDLK_RIGHT => io.keyinput.right.unset(),
-                            SDL.SDLK_x => io.keyinput.a.unset(),
-                            SDL.SDLK_z => io.keyinput.b.unset(),
-                            SDL.SDLK_a => io.keyinput.shoulder_l.unset(),
-                            SDL.SDLK_s => io.keyinput.shoulder_r.unset(),
-                            SDL.SDLK_RETURN => io.keyinput.start.unset(),
-                            SDL.SDLK_RSHIFT => io.keyinput.select.unset(),
+                            SDL.SDLK_UP => keyinput.up.unset(),
+                            SDL.SDLK_DOWN => keyinput.down.unset(),
+                            SDL.SDLK_LEFT => keyinput.left.unset(),
+                            SDL.SDLK_RIGHT => keyinput.right.unset(),
+                            SDL.SDLK_x => keyinput.a.unset(),
+                            SDL.SDLK_z => keyinput.b.unset(),
+                            SDL.SDLK_a => keyinput.shoulder_l.unset(),
+                            SDL.SDLK_s => keyinput.shoulder_r.unset(),
+                            SDL.SDLK_RETURN => keyinput.start.unset(),
+                            SDL.SDLK_RSHIFT => keyinput.select.unset(),
                             else => {},
                         }
+
+                        cpu.bus.io.keyinput.store(keyinput.raw, .Monotonic);
                     },
                     SDL.SDL_KEYUP => {
-                        const io = &cpu.bus.io;
                         const key_code = event.key.keysym.sym;
+                        var keyinput = cpu.bus.io.keyinput.load(.Monotonic);
 
                         switch (key_code) {
-                            SDL.SDLK_UP => io.keyinput.up.set(),
-                            SDL.SDLK_DOWN => io.keyinput.down.set(),
-                            SDL.SDLK_LEFT => io.keyinput.left.set(),
-                            SDL.SDLK_RIGHT => io.keyinput.right.set(),
-                            SDL.SDLK_x => io.keyinput.a.set(),
-                            SDL.SDLK_z => io.keyinput.b.set(),
-                            SDL.SDLK_a => io.keyinput.shoulder_l.set(),
-                            SDL.SDLK_s => io.keyinput.shoulder_r.set(),
-                            SDL.SDLK_RETURN => io.keyinput.start.set(),
-                            SDL.SDLK_RSHIFT => io.keyinput.select.set(),
-                            SDL.SDLK_i => log.err("Sample Count: {}", .{@intCast(u32, SDL.SDL_AudioStreamAvailable(cpu.bus.apu.stream)) / (2 * @sizeOf(u16))}),
-                            SDL.SDLK_j => log.err("Scheduler Capacity: {} | Scheduler Event Count: {}", .{ scheduler.queue.capacity(), scheduler.queue.count() }),
-                            SDL.SDLK_k => {
-                                // Dump IWRAM to file
-                                log.info("PC: 0x{X:0>8}", .{cpu.r[15]});
-                                log.info("LR: 0x{X:0>8}", .{cpu.r[14]});
-                                // const iwram_file = try std.fs.cwd().createFile("iwram.bin", .{});
-                                // defer iwram_file.close();
-
-                                // try iwram_file.writeAll(cpu.bus.iwram.buf);
+                            SDL.SDLK_UP => keyinput.up.set(),
+                            SDL.SDLK_DOWN => keyinput.down.set(),
+                            SDL.SDLK_LEFT => keyinput.left.set(),
+                            SDL.SDLK_RIGHT => keyinput.right.set(),
+                            SDL.SDLK_x => keyinput.a.set(),
+                            SDL.SDLK_z => keyinput.b.set(),
+                            SDL.SDLK_a => keyinput.shoulder_l.set(),
+                            SDL.SDLK_s => keyinput.shoulder_r.set(),
+                            SDL.SDLK_RETURN => keyinput.start.set(),
+                            SDL.SDLK_RSHIFT => keyinput.select.set(),
+                            SDL.SDLK_i => {
+                                comptime std.debug.assert(sample_format == SDL.AUDIO_U16);
+                                log.err("Sample Count: {}", .{cpu.bus.apu.sample_queue.len() / 2});
                             },
+                            // SDL.SDLK_j => log.err("Scheduler Capacity: {} | Scheduler Event Count: {}", .{ scheduler.queue.capacity(), scheduler.queue.count() }),
+                            SDL.SDLK_k => {},
                             else => {},
                         }
+
+                        cpu.bus.io.keyinput.store(keyinput.raw, .Monotonic);
                     },
                     else => {},
                 }
@@ -229,16 +238,15 @@ pub const Gui = struct {
             gl.drawElements(gl.TRIANGLES, 6, gl.UNSIGNED_INT, null);
             SDL.SDL_GL_SwapWindow(self.window);
 
-            const dyn_title = std.fmt.bufPrint(&title_buf, "ZBA | {s} [Emu: {}fps] ", .{ self.title, tracker.value() }) catch unreachable;
+            const dyn_title = std.fmt.bufPrintZ(&title_buf, "ZBA | {s} [Emu: {}fps] ", .{ self.title, tracker.value() }) catch unreachable;
             SDL.SDL_SetWindowTitle(self.window, dyn_title.ptr);
         }
 
-        quit.store(true, .SeqCst); // Terminate Emulator Thread
+        quit.store(true, .Monotonic); // Terminate Emulator Thread
     }
 
     pub fn deinit(self: *Self) void {
         self.audio.deinit();
-        // TODO: Buffer deletions
         gl.deleteProgram(self.program_id);
         SDL.SDL_GL_DeleteContext(self.ctx);
         SDL.SDL_DestroyWindow(self.window);
@@ -268,8 +276,8 @@ const Audio = struct {
         want.callback = Self.callback;
         want.userdata = apu;
 
-        std.debug.assert(sample_format == SDL.AUDIO_F32);
-        log.info("Host Sample Rate: {}Hz, Host Format: SDL.AUDIO_F32", .{sample_rate});
+        std.debug.assert(sample_format == SDL.AUDIO_U16);
+        log.info("Host Sample Rate: {}Hz, Host Format: SDL.AUDIO_U16", .{sample_rate});
 
         const device = SDL.SDL_OpenAudioDevice(null, 0, &want, &have, 0);
         if (device == 0) panic();
@@ -291,7 +299,37 @@ const Audio = struct {
         const T = *Apu;
         const apu = @ptrCast(T, @alignCast(@alignOf(T), userdata));
 
-        _ = SDL.SDL_AudioStreamGet(apu.stream, stream, len);
+        comptime std.debug.assert(sample_format == SDL.AUDIO_U16);
+        const sample_buf = @ptrCast([*]u16, @alignCast(@alignOf(u16), stream))[0 .. @intCast(u32, len) / @sizeOf(u16)];
+
+        var previous: u16 = 0x8000;
+        for (sample_buf) |*sample| {
+            if (apu.sample_queue.pop()) |value| previous = value;
+
+            sample.* = previous;
+        }
+    }
+};
+
+const shader = struct {
+    const Kind = enum { vertex, fragment };
+    const log = std.log.scoped(.Shader);
+
+    fn didCompile(id: gl.GLuint) bool {
+        var success: gl.GLint = undefined;
+        gl.getShaderiv(id, gl.COMPILE_STATUS, &success);
+
+        if (success == 0) err(id);
+
+        return success == 1;
+    }
+
+    fn err(id: gl.GLuint) void {
+        const buf_len = 512;
+        var error_msg: [buf_len]u8 = undefined;
+
+        gl.getShaderInfoLog(id, buf_len, 0, &error_msg);
+        log.err("{s}", .{std.mem.sliceTo(&error_msg, 0)});
     }
 };
 

src/util.zig

@@ -47,7 +47,7 @@ pub const FpsTracker = struct {
 
     pub fn value(self: *Self) u32 {
         if (self.timer.read() >= std.time.ns_per_s) {
-            self.fps = self.count.swap(0, .SeqCst);
+            self.fps = self.count.swap(0, .Monotonic);
             self.timer.reset();
         }
 
@@ -66,57 +66,6 @@ pub fn intToBytes(comptime T: type, value: anytype) [@sizeOf(T)]u8 {
     return result;
 }
 
-/// The Title from the GBA Cartridge is an Uppercase ASCII string which is
-/// null-padded to 12 bytes
-///
-/// This function returns a slice of the ASCII string without the null terminator(s)
-/// (essentially, a proper Zig/Rust/Any modern language String)
-pub fn span(title: *const [12]u8) []const u8 {
-    const end = std.mem.indexOfScalar(u8, title, '\x00');
-    return title[0 .. end orelse title.len];
-}
-
-test "span" {
-    var example: *const [12]u8 = "POKEMON_EMER";
-    try std.testing.expectEqualSlices(u8, "POKEMON_EMER", span(example));
-
-    example = "POKEMON_EME\x00";
-    try std.testing.expectEqualSlices(u8, "POKEMON_EME", span(example));
-
-    example = "POKEMON_EM\x00\x00";
-    try std.testing.expectEqualSlices(u8, "POKEMON_EM", span(example));
-
-    example = "POKEMON_E\x00\x00\x00";
-    try std.testing.expectEqualSlices(u8, "POKEMON_E", span(example));
-
-    example = "POKEMON_\x00\x00\x00\x00";
-    try std.testing.expectEqualSlices(u8, "POKEMON_", span(example));
-
-    example = "POKEMON\x00\x00\x00\x00\x00";
-    try std.testing.expectEqualSlices(u8, "POKEMON", span(example));
-
-    example = "POKEMO\x00\x00\x00\x00\x00\x00";
-    try std.testing.expectEqualSlices(u8, "POKEMO", span(example));
-
-    example = "POKEM\x00\x00\x00\x00\x00\x00\x00";
-    try std.testing.expectEqualSlices(u8, "POKEM", span(example));
-
-    example = "POKE\x00\x00\x00\x00\x00\x00\x00\x00";
-    try std.testing.expectEqualSlices(u8, "POKE", span(example));
-
-    example = "POK\x00\x00\x00\x00\x00\x00\x00\x00\x00";
-    try std.testing.expectEqualSlices(u8, "POK", span(example));
-
-    example = "PO\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00";
-    try std.testing.expectEqualSlices(u8, "PO", span(example));
-
-    example = "P\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00";
-    try std.testing.expectEqualSlices(u8, "P", span(example));
-
-    example = "\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00\x00";
-    try std.testing.expectEqualSlices(u8, "", span(example));
-}
-
 /// Creates a copy of a title with all Filesystem-invalid characters replaced
 ///
 /// e.g. POKEPIN R/S to POKEPIN R_S
@@ -196,7 +145,7 @@ pub const Logger = struct {
         if (cpu.cpsr.t.read()) {
             if (opcode >> 11 == 0x1E) {
                 // Instruction 1 of a BL Opcode, print in ARM mode
-                const low = cpu.bus.dbgRead(u16, cpu.r[15]);
+                const low = cpu.bus.dbgRead(u16, cpu.r[15] - 2);
                 const bl_opcode = @as(u32, opcode) << 16 | low;
 
                 self.print(arm_fmt, Self.fmtArgs(cpu, bl_opcode)) catch @panic("failed to write to log file");
@@ -232,7 +181,7 @@ pub const Logger = struct {
     }
 };
 
-const FmtArgTuple = std.meta.Tuple(&.{ u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 });
+const FmtArgTuple = struct { u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 };
 
 pub const audio = struct {
     const _io = @import("core/bus/io.zig");
@@ -302,8 +251,6 @@ pub inline fn getHalf(byte: u8) u4 {
     return @truncate(u4, byte & 1) << 3;
 }
 
-// TODO: Maybe combine SetLo and SetHi, use addr alignment to deduplicate code
-
 pub inline fn setHalf(comptime T: type, left: T, addr: u8, right: HalfInt(T)) T {
     const offset = @truncate(u1, addr >> if (T == u32) 1 else 0);
 
@@ -314,32 +261,12 @@ pub inline fn setHalf(comptime T: type, left: T, addr: u8, right: HalfInt(T)) T
         },
         u16 => switch (offset) {
             0b0 => (left & 0xFF00) | right,
-            0b1 => (right & 0x00FF) | @as(u16, right) << 8,
+            0b1 => (left & 0x00FF) | @as(u16, right) << 8,
         },
         else => @compileError("unsupported type"),
     };
 }
 
-/// Sets the high bits of an integer to a value
-pub inline fn setLo(comptime T: type, left: T, right: HalfInt(T)) T {
-    return switch (T) {
-        u32 => (left & 0xFFFF_0000) | right,
-        u16 => (left & 0xFF00) | right,
-        u8 => (left & 0xF0) | right,
-        else => @compileError("unsupported type"),
-    };
-}
-
-/// sets the low bits of an integer to a value
-pub inline fn setHi(comptime T: type, left: T, right: HalfInt(T)) T {
-    return switch (T) {
-        u32 => (left & 0x0000_FFFF) | @as(u32, right) << 16,
-        u16 => (left & 0x00FF) | @as(u16, right) << 8,
-        u8 => (left & 0x0F) | @as(u8, right) << 4,
-        else => @compileError("unsupported type"),
-    };
-}
-
 /// The Integer type which corresponds to T with exactly half the amount of bits
 fn HalfInt(comptime T: type) type {
     const type_info = @typeInfo(T);
@@ -348,3 +275,110 @@ fn HalfInt(comptime T: type) type {
 
     return std.meta.Int(type_info.Int.signedness, type_info.Int.bits >> 1);
 }
+
+const Mutex = std.Thread.Mutex;
+
+pub fn RingBuffer(comptime T: type) type {
+    return struct {
+        const Self = @This();
+        const Index = usize;
+        const max_capacity = (@as(Index, 1) << @typeInfo(Index).Int.bits - 1) - 1; // half the range of index type
+
+        const log = std.log.scoped(.RingBuffer);
+
+        read: Index,
+        write: Index,
+
+        buf: []T,
+
+        mutex: Mutex,
+
+        const Error = error{buffer_full};
+
+        pub fn init(buf: []T) Self {
+            std.mem.set(T, buf, 0);
+
+            std.debug.assert(std.math.isPowerOfTwo(buf.len)); // capacity must be a power of two
+            std.debug.assert(buf.len <= max_capacity);
+
+            return .{ .read = 0, .write = 0, .buf = buf, .mutex = .{} };
+        }
+
+        pub fn push(self: *Self, left: T, right: T) Error!void {
+            self.mutex.lock();
+            defer self.mutex.unlock();
+
+            try self._push(left);
+            self._push(right) catch |e| {
+                self.write -= 1; // undo the previous write;
+                return e;
+            };
+        }
+
+        pub fn pop(self: *Self) ?T {
+            self.mutex.lock();
+            defer self.mutex.unlock();
+
+            return self._pop();
+        }
+
+        pub fn len(self: *Self) Index {
+            self.mutex.lock();
+            defer self.mutex.unlock();
+
+            return self._len();
+        }
+
+        fn _push(self: *Self, value: T) Error!void {
+            if (self.isFull()) return error.buffer_full;
+            defer self.write += 1;
+
+            self.buf[self.mask(self.write)] = value;
+        }
+
+        fn _pop(self: *Self) ?T {
+            if (self.isEmpty()) return null;
+            defer self.read += 1;
+
+            return self.buf[self.mask(self.read)];
+        }
+
+        fn _len(self: *const Self) Index {
+            return self.write - self.read;
+        }
+
+        fn isFull(self: *const Self) bool {
+            return self._len() == self.buf.len;
+        }
+
+        fn isEmpty(self: *const Self) bool {
+            return self.read == self.write;
+        }
+
+        fn mask(self: *const Self, idx: Index) Index {
+            return idx & (self.buf.len - 1);
+        }
+    };
+}
+
+test "RingBuffer" {
+    const Queue = RingBuffer(u8);
+
+    var buf: [4]u8 = undefined;
+    var queue = Queue.init(&buf);
+
+    try queue.push(1, 2);
+    try std.testing.expectEqual(@as(?u8, 1), queue.pop());
+
+    try queue.push(3, 4);
+    try std.testing.expectError(Queue.Error.buffer_full, queue.push(5, 6));
+    try std.testing.expectEqual(@as(?u8, 2), queue.pop());
+
+    try queue.push(7, 8);
+
+    try std.testing.expectEqual(@as(?u8, 3), queue.pop());
+    try std.testing.expectEqual(@as(?u8, 4), queue.pop());
+    try std.testing.expectEqual(@as(?u8, 7), queue.pop());
+    try std.testing.expectEqual(@as(?u8, 8), queue.pop());
+    try std.testing.expectEqual(@as(?u8, null), queue.pop());
+}