chore(i/o): ensure interrupt i/o exists
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parent
f80799a593
commit
9a732ea6f8
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@ -9,6 +9,9 @@ const Bit = @import("bitfield").Bit;
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const Bitfield = @import("bitfield").Bitfield;
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const Bus = @import("../Bus.zig");
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const getHalf = util.getHalf;
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const setHalf = util.setHalf;
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const log = std.log.scoped(.@"I/O");
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pub const Io = struct {
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@ -19,6 +22,7 @@ pub const Io = struct {
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ie: InterruptEnable,
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irq: InterruptRequest,
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postflg: PostFlag,
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waitcnt: WaitControl,
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haltcnt: HaltControl,
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keyinput: KeyInput,
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@ -28,6 +32,7 @@ pub const Io = struct {
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.ie = .{ .raw = 0x0000 },
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.irq = .{ .raw = 0x0000 },
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.keyinput = .{ .raw = 0x03FF },
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.waitcnt = .{ .raw = 0x0000_0000 },
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.postflg = .FirstBoot,
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.haltcnt = .Execute,
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};
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@ -64,8 +69,10 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
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0x0400_0150 => util.io.read.todo(log, "Read {} from JOY_RECV", .{T}),
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// Interrupts
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0x0400_0200 => @as(T, bus.io.irq.raw) << 16 | bus.io.ie.raw,
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0x0400_0200 => @as(u32, bus.io.irq.raw) << 16 | bus.io.ie.raw,
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0x0400_0204 => bus.io.waitcnt.raw,
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0x0400_0208 => @boolToInt(bus.io.ime),
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0x0400_0300 => @enumToInt(bus.io.postflg),
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else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
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},
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u16 => switch (address) {
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@ -93,8 +100,11 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
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// Interrupts
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0x0400_0200 => bus.io.ie.raw,
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0x0400_0202 => bus.io.irq.raw,
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0x0400_0204 => util.io.read.todo(log, "Read {} from WAITCNT", .{T}),
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0x0400_0204 => bus.io.waitcnt.raw,
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0x0400_0206 => null,
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0x0400_0208 => @boolToInt(bus.io.ime),
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0x0400_020A => null,
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0x0400_0300 => @enumToInt(bus.io.postflg),
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else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
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},
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u8 => return switch (address) {
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@ -120,7 +130,12 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
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0x0400_0135 => util.io.read.todo(log, "Read {} from RCNT_H", .{T}),
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// Interrupts
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0x0400_0200 => @truncate(T, bus.io.ie.raw),
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0x0400_0200, 0x0400_0201 => @truncate(T, bus.io.ie.raw >> getHalf(@truncate(u8, address))),
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0x0400_0202, 0x0400_0203 => @truncate(T, bus.io.irq.raw >> getHalf(@truncate(u8, address))),
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0x0400_0204, 0x0400_0205 => @truncate(T, bus.io.waitcnt.raw >> getHalf(@truncate(u8, address))),
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0x0400_0206, 0x0400_0207 => null,
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0x0400_0208, 0x0400_0209 => @truncate(T, @as(u16, @boolToInt(bus.io.ime)) >> getHalf(@truncate(u8, address))),
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0x0400_020A, 0x0400_020B => null,
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0x0400_0300 => @enumToInt(bus.io.postflg),
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else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
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},
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@ -168,9 +183,12 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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// Interrupts
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0x0400_0200 => bus.io.setIrqs(value),
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0x0400_0204 => log.debug("Wrote 0x{X:0>8} to WAITCNT", .{value}),
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0x0400_0204 => bus.io.waitcnt.raw = @truncate(u16, value),
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0x0400_0208 => bus.io.ime = value & 1 == 1,
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0x0400_020C...0x0400_021C => {}, // Unused
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0x0400_0300 => {
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bus.io.postflg = @intToEnum(PostFlag, value & 1);
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bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
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},
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else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, address }),
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},
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u16 => switch (address) {
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@ -210,9 +228,14 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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// Interrupts
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0x0400_0200 => bus.io.ie.raw = value,
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0x0400_0202 => bus.io.irq.raw &= ~value,
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0x0400_0204 => log.debug("Wrote 0x{X:0>4} to WAITCNT", .{value}),
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0x0400_0204 => bus.io.waitcnt.raw = value,
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0x0400_0206 => {},
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0x0400_0208 => bus.io.ime = value & 1 == 1,
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0x0400_0206, 0x0400_020A => {}, // Not Used
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0x0400_020A => {},
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0x0400_0300 => {
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bus.io.postflg = @intToEnum(PostFlag, value & 1);
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bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
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},
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else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, address }),
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},
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u8 => switch (address) {
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@ -237,9 +260,16 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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0x0400_0140 => log.debug("Wrote 0x{X:0>2} to JOYCNT_L", .{value}),
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// Interrupts
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0x0400_0200, 0x0400_0201 => bus.io.ie.raw = setHalf(u16, bus.io.ie.raw, @truncate(u8, address), value),
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0x0400_0202 => bus.io.irq.raw &= ~@as(u16, value),
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0x0400_0203 => bus.io.irq.raw &= ~@as(u16, value) << 8, // TODO: Is this good?
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0x0400_0204, 0x0400_0205 => bus.io.waitcnt.raw = setHalf(u16, @truncate(u16, bus.io.waitcnt.raw), @truncate(u8, address), value),
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0x0400_0206, 0x0400_0207 => {},
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0x0400_0208 => bus.io.ime = value & 1 == 1,
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0x0400_0300 => bus.io.postflg = std.meta.intToEnum(PostFlag, value & 1) catch unreachable,
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0x0400_0209 => {},
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0x0400_020A, 0x0400_020B => {},
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0x0400_0300 => bus.io.postflg = @intToEnum(PostFlag, value & 1),
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0x0400_0301 => bus.io.haltcnt = if (value >> 7 & 1 == 0) .Halt else std.debug.panic("TODO: Implement STOP", .{}),
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0x0400_0410 => log.debug("Wrote 0x{X:0>2} to the common yet undocumented 0x{X:0>8}", .{ value, address }),
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@ -576,3 +606,19 @@ pub const SoundBias = extern union {
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sampling_cycle: Bitfield(u16, 14, 2),
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raw: u16,
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};
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/// Read / Write
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pub const WaitControl = extern union {
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sram_cnt: Bitfield(u16, 0, 2),
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s0_first: Bitfield(u16, 2, 2),
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s0_second: Bit(u16, 4),
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s1_first: Bitfield(u16, 5, 2),
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s1_second: Bit(u16, 7),
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s2_first: Bitfield(u16, 8, 2),
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s2_second: Bit(u16, 10),
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phi_out: Bitfield(u16, 11, 2),
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prefetch_enable: Bit(u16, 14),
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pak_kind: Bit(u16, 15),
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raw: u16,
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};
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