Rekai Nyangadzayi Musuka
d985eac0fc
tmp: implement mechanisms for a emu reset fn (currently crashes)
2023-02-23 23:49:56 -06:00
Rekai Nyangadzayi Musuka
ae78588b80
feat: implement ui for register, interrupt
2023-02-23 17:27:42 -06:00
Rekai Nyangadzayi Musuka
024151a5c1
chore: update to latest zig master
2023-02-22 14:46:46 -06:00
Rekai Nyangadzayi Musuka
558c03b12b
style: changes to cpu.zig
2022-11-16 10:21:40 -04:00
Rekai Nyangadzayi Musuka
1230aa1e91
fix(cpu): remove miscompilation workaround
2022-11-11 03:56:49 -04:00
Rekai Nyangadzayi Musuka
2851c140ea
fix(cpu): use LUT for ARM condition codes
2022-11-01 08:29:42 -03:00
Rekai Nyangadzayi Musuka
472457b9f3
chore: make use of comptime control flow when working with tuples
2022-10-31 05:14:20 -03:00
Rekai Nyangadzayi Musuka
14b24787ab
style: remove unnecessary imports
2022-10-28 21:56:55 -03:00
Rekai Nyangadzayi Musuka
7b146ad7ca
fix(bios): set addr_latch even if bios is skipped
2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka
d3514b14f3
fix: resolve timing regressions
...
make sure to use fetch timings when fetching instructions
2022-10-13 00:35:20 -03:00
Rekai Nyangadzayi Musuka
06c60dad74
fix: rename Pipline to Pipeline
2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka
870e991862
feat: working pipeline implementation
2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka
e4451738b5
fix: advance r15, even when the pipeline is reloaded from the scheduler
...
The PC would fall behind whenever an IRQ was called because the pipeline
was reloaded (+8 to PC), however that was never actually done by any code
Now, the PC is always incremented when the pipeline is reloaded
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
48b81c8e7a
chore: dump pipeline state on cpu panic
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
1f9eeedfe8
fix: impl workaround for stage2 miscompilation
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
72a63eeb98
chore: instantly refill the pipeline on flush
...
I believe this to be necessary in order to get hardware interrupts
working.
thumb.gba test 108 fails but I'm committing anyways (despite the
regression) because this is kind of rebase/merge hell and I have
something that at least sort of works rn
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
2799c3f202
fix: reimpl handleInterrupt code
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka
b3ada64e64
feat: implement basic pipeline
...
passes arm.gba, thumb.gb and armwrestler, fails in actual games
TODO: run FuzzARM debug specific titles
2022-10-13 00:33:11 -03:00
Rekai Nyangadzayi Musuka
293fbd9f55
feat(config): add support for (and read from) TOML config file
2022-10-13 00:29:48 -03:00
Rekai Nyangadzayi Musuka
92cfc763c0
chore: move util.zig
2022-09-19 16:07:19 -03:00
Rekai Nyangadzayi Musuka
fa862f095a
chore: move arm/thumb lut idx functions
2022-09-06 23:58:24 -03:00
Rekai Nyangadzayi Musuka
5f8c6833f4
chore: improve init/deinit methods
2022-08-29 01:07:25 -05:00
Rekai Nyangadzayi Musuka
2ab8769b7a
feat: Get ZBA working on Zig's new stage2/stage3 compiler
2022-08-21 12:28:31 -05:00
Rekai Nyangadzayi Musuka
739db99c83
fix: reimpl debug reads w/out throwing away *const Self
2022-08-07 05:11:29 -05:00
Rekai Nyangadzayi Musuka
2c8616f610
feat: reimplement cpu logging
2022-07-27 14:50:28 -03:00
Rekai Nyangadzayi Musuka
53eec5c3ff
chore: don't init bus in Arm7tdmi init
2022-07-27 13:44:24 -03:00
Rekai Nyangadzayi Musuka
c397b7069d
feat: move arm instr decoding to module
2022-07-27 13:23:29 -03:00
Rekai Nyangadzayi Musuka
9d037fdc3e
feat: move thumb instr decoding to module
2022-07-27 13:10:58 -03:00
Rekai Nyangadzayi Musuka
53191b0eeb
chore: change directory structure
2022-07-22 21:11:19 -03:00
