Commit Graph

322 Commits

Author SHA1 Message Date
Rekai Nyangadzayi Musuka 995633e9e8 fix: dont close file handle early 2022-01-29 01:18:45 -04:00
Rekai Nyangadzayi Musuka cfbd292edc feat(cpu): implement format 6 THUMB instructions 2022-01-29 01:18:41 -04:00
Rekai Nyangadzayi Musuka 95efb3f35d chore: rename title 2022-01-28 23:27:03 -04:00
Rekai Nyangadzayi Musuka 6a6dccf4d8 chore: refactor GBA Display Timings
This change should reflect that the Hblank bit of DISPSTAT is toggled on all scanlines
while also ensuring that the Vblank bit is set on all Vblank scanlines
2022-01-28 22:58:19 -04:00
Rekai Nyangadzayi Musuka ad1db4dc2e chore: move a single statement lol 2022-01-28 22:57:48 -04:00
Rekai Nyangadzayi Musuka 19359f7ee4 chore: mark indexing methods as inline 2022-01-28 17:11:29 -04:00
Rekai Nyangadzayi Musuka 24f0922f86 feat: create emulator thread 2022-01-28 16:33:38 -04:00
Rekai Nyangadzayi Musuka b1cc985230 chore: disable logging by default 2022-01-25 18:20:30 -04:00
Rekai Nyangadzayi Musuka e5c8f0ce07 chore: revert fastboot changes 2022-01-25 18:20:01 -04:00
Rekai Nyangadzayi Musuka fbc5b309b0 chore: binary logging + file logging + DP chanes + fastBoot changes 2022-01-25 18:18:52 -04:00
Rekai Nyangadzayi Musuka 540fbf739a chore: rename skipBios to fastBoot 2022-01-25 11:15:17 -04:00
Rekai Nyangadzayi Musuka 0546b1c308 chore: set correct values for select banked registers on fast boot 2022-01-25 11:14:15 -04:00
Rekai Nyangadzayi Musuka 997dc1314c feat(cpu): implement SWI 2022-01-25 10:34:21 -04:00
Rekai Nyangadzayi Musuka 1456d0f317 chore(bios): allow reading from BIOS 2022-01-25 10:32:28 -04:00
Rekai Nyangadzayi Musuka 6257418405 fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction 2022-01-25 09:23:32 -04:00
Rekai Nyangadzayi Musuka 985fefb9f6 chore(cpu): implement behaviour for undefined test instruction 2022-01-25 08:05:42 -04:00
Rekai Nyangadzayi Musuka 95dd3e3df8 fix(cpu): fix PC offset when barrel shifter and bit 4 of DP is set 2022-01-24 17:52:01 -04:00
Rekai Nyangadzayi Musuka 702ff288d8 fix(cpu): implement S set + rd == 15 case for data processing 2022-01-19 07:46:49 -04:00
Rekai Nyangadzayi Musuka bf36a23722 feat(cpu): implement banked registers 2022-01-19 07:29:49 -04:00
Rekai Nyangadzayi Musuka fc5a3460dd fix(cpu): improve MRS and MSR instructions 2022-01-18 20:17:00 -04:00
Rekai Nyangadzayi Musuka 6177927049 feat(cpu): implement CMN 2022-01-18 15:09:25 -04:00
Rekai Nyangadzayi Musuka 903b75c7c4 fix(barrel_shifter): fix PC being 1 word ahead in barrel shifter 2022-01-18 15:08:29 -04:00
Rekai Nyangadzayi Musuka 8d786cbe25 feat(cpu): Implement RSC 2022-01-18 14:46:57 -04:00
Rekai Nyangadzayi Musuka 212bc9e11d feat(cpu): implement RSB 2022-01-18 14:36:03 -04:00
Rekai Nyangadzayi Musuka 63a57ac954 feat(cpu): implement BIC 2022-01-18 14:28:47 -04:00
Rekai Nyangadzayi Musuka 85dae5e1d7 feat(cpu): implement EOR 2022-01-18 14:27:07 -04:00
Rekai Nyangadzayi Musuka 6189bf0315 feat(cpu): implement ADD 2022-01-18 14:25:29 -04:00
Rekai Nyangadzayi Musuka 2f3213f693 feat(cpu): implement fix for ADC and implement SBC 2022-01-18 14:20:01 -04:00
Rekai Nyangadzayi Musuka a62cd9aa40 chore(barrel_shifter): remove panic from ASR 2022-01-18 14:19:58 -04:00
Rekai Nyangadzayi Musuka 25c57a4cc7 fix(barrel_shifter): should not modify cpsr when amount == 0 2022-01-18 13:30:41 -04:00
Rekai Nyangadzayi Musuka a7a44c4463 chore(cpu): refactor the barrel shifter once again 2022-01-17 15:55:55 -04:00
Rekai Nyangadzayi Musuka d4d2fedfbe feat(cpu): implement ADC
ADC interacting w/ the Barrel Shifter is not working though
2022-01-17 14:29:34 -04:00
Rekai Nyangadzayi Musuka 483e149b32 feat(cpu): implement RRX for Barrel Shifter 2022-01-17 14:19:40 -04:00
Rekai Nyangadzayi Musuka 85ffdf44f5 feat(cpu): implement SUB in THUMB format 3 2022-01-17 11:36:02 -04:00
Rekai Nyangadzayi Musuka 9098a55ae3 feat(cpu): implement ARM SUB in data processing 2022-01-17 11:35:41 -04:00
Rekai Nyangadzayi Musuka c0d956ea95 feat(cpu): implement MVN 2022-01-17 11:30:59 -04:00
Rekai Nyangadzayi Musuka 1025500407 chore(cpu): refactor barrel shifter 2022-01-17 11:17:04 -04:00
Rekai Nyangadzayi Musuka d05a924420 fix(cpu): use barrel shifter in data processing immediates 2022-01-17 11:02:34 -04:00
Rekai Nyangadzayi Musuka 2a416fb2c6 feat(cpu): implement format 12 thumb instructions 2022-01-17 10:07:50 -04:00
Rekai Nyangadzayi Musuka ea5f0ce552 feat(cpu): implement some already decoded format 3 instructions 2022-01-17 09:29:11 -04:00
Rekai Nyangadzayi Musuka e55d2dc323 feat(cpu): implement THUMB format 5 instructions 2022-01-17 09:28:46 -04:00
Rekai Nyangadzayi Musuka 3037407ebe chore: mgba log now supports printing THUMB instructions 2022-01-17 07:18:44 -04:00
Rekai Nyangadzayi Musuka 1915d98bdd feat(cpu): implement like 1 THUMB instruction 2022-01-16 12:46:59 -04:00
Rekai Nyangadzayi Musuka 4606a1ab25 chore: distinguish between undefined ARM and THUMB instr 2022-01-14 05:30:32 -04:00
Rekai Nyangadzayi Musuka 0cf052838d chore(cpu): lay groundwork for THUMB instruction decoding and execution 2022-01-14 05:23:16 -04:00
Rekai Nyangadzayi Musuka ae37b1218b chore(cpu): refactor ARM functions to make room for THUMB 2022-01-14 04:26:09 -04:00
Rekai Nyangadzayi Musuka 070322064d fix(cpu): fix conditions for GT cond 2022-01-14 04:19:54 -04:00
Rekai Nyangadzayi Musuka 37bd6758fb fix(cpu): fix imm value calculation in MSR 2022-01-14 04:08:04 -04:00
Rekai Nyangadzayi Musuka 7f6ab626d9 fix(cpu): resolve off-by-one error when executing LDM 2022-01-14 03:43:03 -04:00
Rekai Nyangadzayi Musuka 77dba68a0b feat(cpu): implement branch and exchange
If I want to continue with armwrestler, I'll have to implement
THUMB instructions now
2022-01-12 07:20:24 -04:00
Rekai Nyangadzayi Musuka 7adc7c8802 fix(cpu): make Data Processing instructions r15-aware 2022-01-12 07:20:24 -04:00
Rekai Nyangadzayi Musuka 229f7c3388 fix(cpu): make LDRH and STRH aware of r15 2022-01-12 07:20:21 -04:00
Rekai Nyangadzayi Musuka 5812b9713c fix(cpu): account for r15 in LDR and STR instructions 2022-01-12 06:16:59 -04:00
Rekai Nyangadzayi Musuka 98c5803208 fix(cpu): flip two branches in PSR Transfer execution 2022-01-12 06:16:34 -04:00
Rekai Nyangadzayi Musuka 74abd3df4d feat(cpu): implement MSR and MRS 2022-01-12 04:48:57 -04:00
Rekai Nyangadzayi Musuka 7531af7f2b feat(cpu): stub PSR Transfer instructions 2022-01-12 03:40:51 -04:00
Rekai Nyangadzayi Musuka 1c173eb4b8 chore(io): implement IE and IME 2022-01-12 02:19:26 -04:00
Rekai Nyangadzayi Musuka 769c67b9d4 chore: remove some magic constants 2022-01-12 00:46:20 -04:00
Rekai Nyangadzayi Musuka c1be53bcb2 fix(bus): remove accidental recursion 2022-01-10 21:25:45 -04:00
Rekai Nyangadzayi Musuka 072a66cfdb fix(cpu): write results of ORR to destination register 2022-01-10 10:56:41 -04:00
Rekai Nyangadzayi Musuka ed3bdd90fb feat(cpu): implement TEQ 2022-01-10 08:09:02 -04:00
Rekai Nyangadzayi Musuka e9c1c94cae feat(cpu): Implement ORR 2022-01-10 08:06:00 -04:00
Rekai Nyangadzayi Musuka 0f08ad05be feat(bus): implement IWRAM and EWRAM 2022-01-10 07:59:21 -04:00
Rekai Nyangadzayi Musuka fd5006b29d fix(ppu): properly access Mode 4 palette 2022-01-10 07:23:54 -04:00
Rekai Nyangadzayi Musuka 22b95b2a74 feat(cpu): refactor LDM/STM 2022-01-10 06:51:32 -04:00
Rekai Nyangadzayi Musuka 7d79a0bee2 feat(cpu): implement LDM/STM 2022-01-10 06:27:36 -04:00
Rekai Nyangadzayi Musuka 6c0651ca08 chore(io): DISPSTAT bits 3 and 4 better match GBATEK documentation 2022-01-10 06:26:42 -04:00
Rekai Nyangadzayi Musuka 0d8c5e6882 fix(cpu): fix off-by-word bug in BL 2022-01-10 06:26:02 -04:00
Rekai Nyangadzayi Musuka 89a8fe403b feat(bus): have VCOUNT be addressable on the bus 2022-01-10 03:35:28 -04:00
Rekai Nyangadzayi Musuka 7c5d2d2389 feat(ppu): implement Mode 4
Implementation is not tested. Pending on LDM and STM so that I can
run beeg.gba
2022-01-10 03:35:24 -04:00
Rekai Nyangadzayi Musuka 2467b94dbd chore(io): rename some io bitfield fields 2022-01-10 02:13:25 -04:00
Rekai Nyangadzayi Musuka 0d4c850218 chore: remove premature inlines 2022-01-10 01:24:14 -04:00
Rekai Nyangadzayi Musuka bbe2ecfa53 chore: add FPS counter 2022-01-10 01:22:55 -04:00
Rekai Nyangadzayi Musuka c54145ce3c chore: improve code clarity 2022-01-09 23:34:33 -04:00
Rekai Nyangadzayi Musuka ead6d1ce49 feat(ppu): improve timings + implement BG mode 3 bitmap 2022-01-09 22:16:34 -04:00
Rekai Nyangadzayi Musuka 581285a434 fix: allocate framebuf on heap 2022-01-08 20:30:57 -04:00
Rekai Nyangadzayi Musuka 0d203543ca chore: add code for heap alloc of white texture 2022-01-08 18:52:11 -04:00
Rekai Nyangadzayi Musuka eb6c00f0ac chore(gui): switch from RGBA8888 to BGR5555 to match BG Mode 3 2022-01-08 04:54:39 -04:00
Rekai Nyangadzayi Musuka da7f21f47e feat: draw white texture using SDL2 2022-01-07 22:46:17 -04:00
Rekai Nyangadzayi Musuka 8fb666624f fix(ppu): deallocate palette RAM on cleanup 2022-01-07 22:27:08 -04:00
Rekai Nyangadzayi Musuka 568c374131 chore: code cleanup 2022-01-07 20:00:42 -04:00
Rekai Nyangadzayi Musuka 910745f442 chore(bus): refactor bus.zig 2022-01-07 19:49:58 -04:00
Rekai Nyangadzayi Musuka f8c6af3247 chore: refactor instruction exec code 2022-01-07 19:44:48 -04:00
Rekai Nyangadzayi Musuka a407671de2 chore(io): alias @This() to Self in io.zig 2022-01-07 19:34:54 -04:00
Rekai Nyangadzayi Musuka e9ec124e33 chore: refactor bios.zig and pak.zig 2022-01-07 19:33:49 -04:00
Rekai Nyangadzayi Musuka 9f64804763 fix: by convention deinit() should not take pointers to self 2022-01-07 19:16:23 -04:00
Rekai Nyangadzayi Musuka c6123d8a6d feat: implement PPU Timings in Scheduler 2022-01-05 21:18:33 -04:00
Rekai Nyangadzayi Musuka f709458638 feat(sched): add HBlank and VBlank events to the scheduler 2022-01-05 17:34:59 -05:00
Rekai Nyangadzayi Musuka 5037b8f0cc feat: implement S (when rd != 15) for several data processing instructions 2022-01-05 15:45:52 -05:00
Rekai Nyangadzayi Musuka 28a70d0112 feat: implement dedicated Barrel Shifter SHL and SHR 2022-01-05 13:58:11 -05:00
Rekai Nyangadzayi Musuka 7473ffedc7 chore: stub TST 2022-01-04 04:08:02 -06:00
Rekai Nyangadzayi Musuka 172f3e8efe chore: comment-out logging by default 2022-01-04 03:58:11 -06:00
Rekai Nyangadzayi Musuka 28bb410dfd fix(cpu): improve LDR/STR write-back logic 2022-01-04 03:55:41 -06:00
Rekai Nyangadzayi Musuka 5ea888f68c feat(bus): implement Palette RAM and DISPSTAT 2022-01-04 03:29:56 -06:00
Rekai Nyangadzayi Musuka 8b9a80b279 fix(bus): restrict Game ROM and VRAM to a 16-bit bus 2022-01-04 03:08:12 -06:00
Rekai Nyangadzayi Musuka ed9c1413b1 fix(cpu): properly implement SUB/CMP CSPSR carry bit condition 2022-01-04 03:08:08 -06:00
Rekai Nyangadzayi Musuka 8cabcd8901 fix(cpu): resolve reversed if statement + write back on W = 0 2022-01-04 01:57:37 -06:00
Rekai Nyangadzayi Musuka 8d8cedea59 chore: add mgba compatible (minus disasm) log function 2022-01-04 01:11:53 -06:00
Rekai Nyangadzayi Musuka 0f827fca96 chore: rename CPSR u32 from val to raw 2022-01-03 22:25:11 -06:00
Rekai Nyangadzayi Musuka 1fefd4de5c chore: remove print statements 2022-01-03 21:30:08 -06:00
Rekai Nyangadzayi Musuka 3aa680ab8c chore: remove all memory leaks 2022-01-03 20:08:55 -06:00
Rekai Nyangadzayi Musuka 8257a3899a feat(ppu): implement VRAM 2022-01-03 19:52:10 -06:00
Rekai Nyangadzayi Musuka 1d4ba2e2b3 fix(emu): prevent infinite loop when advancing scheduler 2022-01-03 19:51:55 -06:00
Rekai Nyangadzayi Musuka c9f0e1632c fix(io): fix DISPCNT is at wrong IO address 2022-01-03 17:49:15 -06:00
Rekai Nyangadzayi Musuka 44d52d8137 feat(cpu): properly implement STR STRH and STRB 2022-01-03 17:48:43 -06:00
Rekai Nyangadzayi Musuka dee0e113d8 feat(cpu): implement skipBios method 2022-01-02 14:58:39 -06:00
Rekai Nyangadzayi Musuka eb37d73cb2 chore: panic on read from BIOS
GBA Bios requires a lot of implemented features, so we're ignoring it
for now
2022-01-02 14:57:59 -06:00
Rekai Nyangadzayi Musuka 1c42d1795a feat(bus): add Io Struct
Also, add more information to all panic messages
2022-01-02 14:40:49 -06:00
Rekai Nyangadzayi Musuka 01d6399dfb chore: rename consturctors to fit convention 2022-01-02 13:58:57 -06:00
Rekai Nyangadzayi Musuka f09f814dc3 chore: move bitfield library to lib director
I'd presonally prefer to use a git submodule here but It doesn't quite
seem like git submodules are possible for individual files. I'll have to
check with FlorenceOS every once and a while to ensure that there are no
lingering soundness issues with the library.

Thanks to @N00byEdge for this wonderful library!
2022-01-02 13:19:09 -06:00
Rekai Nyangadzayi Musuka de9045fba3 chore: use bitfield library 2022-01-02 13:01:11 -06:00
Rekai Nyangadzayi Musuka e144261e07 feat(bus): emu is now able to read from user-provided BIOS 2022-01-02 03:16:03 -06:00
Rekai Nyangadzayi Musuka 65c3dd722c feat(bus): implement Gameboy Advance MMIO 2022-01-02 02:36:06 -06:00
Rekai Nyangadzayi Musuka b63eb2dabc feat: implement ROM CLI argument 2022-01-01 23:37:21 -06:00
Rekai Nyangadzayi Musuka 52e367d24a fix(cpu): purposely overflow when calculating PC during branch 2022-01-01 21:57:52 -06:00
Rekai Nyangadzayi Musuka cc7e42efd8 feat(cpu): implement condition field behaviour 2022-01-01 21:56:58 -06:00
Rekai Nyangadzayi Musuka c40a1af534 chore: conform to zig style guides 2022-01-01 21:08:47 -06:00
Rekai Nyangadzayi Musuka f2cc0721c7 chore: run zig fmt 2022-01-01 03:42:20 -06:00
Rekai Nyangadzayi Musuka 92a06e49c3 chore(cpu): iron out some false assumptions 2022-01-01 03:41:50 -06:00
Rekai Nyangadzayi Musuka c660ca8922 feat: implement LDR STR 2021-12-29 17:16:32 -06:00
Rekai Nyangadzayi Musuka 7cc3f40a85 chore: run zig fmt 2021-12-29 15:13:50 -06:00
Rekai Nyangadzayi Musuka 5b3b81e4dc Initial Commit 2021-12-29 15:09:00 -06:00