Commit Graph

85 Commits

Author SHA1 Message Date
Rekai Nyangadzayi Musuka 647bd83224 chore(io): rewrite certain error messages
We can do this now that we know that it won't be because of any
unimplemented feature in some circumstances
2022-10-29 02:37:54 -03:00
Rekai Nyangadzayi Musuka c831f67d1a feat(timer): implemeant all timer i/o reads 2022-10-29 01:37:28 -03:00
Rekai Nyangadzayi Musuka 268961262d feat(dma): implement all dma i/o reads 2022-10-29 01:30:12 -03:00
Rekai Nyangadzayi Musuka 3e62feacba feat(ppu): implement all ppu i/o reads 2022-10-29 01:29:27 -03:00
Rekai Nyangadzayi Musuka 371cf4cc12 style(i/o, ppu): refactor ppu i/o 2022-10-28 23:45:54 -03:00
Rekai Nyangadzayi Musuka 10aec67ee0 emu: implement thread sleep in granular steps 2022-10-28 21:58:55 -03:00
Rekai Nyangadzayi Musuka 4eb715a138 doc(emu): properly document + simply constants 2022-10-28 21:57:30 -03:00
Rekai Nyangadzayi Musuka 14b24787ab style: remove unnecessary imports 2022-10-28 21:56:55 -03:00
Rekai Nyangadzayi Musuka eb7ffa29f4 fix(apu): pause device on mute instead of writing silence 2022-10-27 09:11:08 -03:00
Rekai Nyangadzayi Musuka 4b8ed3cebb fix(io): resolve embarrasingly simple regression
introduced in 21eddac31e
2022-10-23 04:39:31 -03:00
Rekai Nyangadzayi Musuka 928ce674d9 fix(cpu): fix obscure LDRSH behaviour 2022-10-22 22:12:41 -03:00
Rekai Nyangadzayi Musuka 945dbec013 fix(open-bus): don't rotate result
Rotating misaligned reads is the responsibility of the CPU
2022-10-22 21:32:36 -03:00
Rekai Nyangadzayi Musuka a2868dfe9e feat(dma): Implement DMA Latch 2022-10-22 20:52:02 -03:00
Rekai Nyangadzayi Musuka 22979d9450 fix(bios): fix regression
was reading addr_latch + 8, which is a remnant from when I was faking
the pipeline
2022-10-22 15:33:36 -03:00
Rekai Nyangadzayi Musuka e60b556f72 chore(ppu): remove BGR555 -> RGBA888 LUT
LUT probably couldn't fit in CPU cache anyways.

TODO: Consider whether LUTs for separate channels (size 32 * 3 * 3
instead of std.math.maxInt(u15))
2022-10-17 20:31:42 -03:00
Rekai Nyangadzayi Musuka 26dba16789 chore(gpio): add missing errdefer 2022-10-17 20:01:50 -03:00
Rekai Nyangadzayi Musuka 7b146ad7ca fix(bios): set addr_latch even if bios is skipped 2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka 822eed1f3a fix(bus): make open bus impl aware of CPU pipeline 2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka b37a14900c style(bus): cpu ptr doesn't need to be optional 2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka f5bd20bc2a style: code cleanup 2022-10-13 00:35:22 -03:00
Rekai Nyangadzayi Musuka d3514b14f3 fix: resolve timing regressions
make sure to use fetch timings when fetching instructions
2022-10-13 00:35:20 -03:00
Rekai Nyangadzayi Musuka 06c60dad74 fix: rename Pipline to Pipeline 2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka 870e991862 feat: working pipeline implementation 2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka 5bb5bdf389 chore: refactor ARM/THUMB data processing instructions 2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka a3996cbc58 fix: don't flush pipeline when reloading CPSR in ARM Data Processing 2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka a948c6f900 chore: don't write to CPSR + swap with SPSR at the same time 2022-10-13 00:34:18 -03:00
Rekai Nyangadzayi Musuka e4451738b5 fix: advance r15, even when the pipeline is reloaded from the scheduler
The PC would fall behind whenever an IRQ was called because the pipeline
was reloaded (+8 to PC), however that was never actually done by any code

Now, the PC is always incremented when the pipeline is reloaded
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka 48b81c8e7a chore: dump pipeline state on cpu panic 2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka 3cf1bf54e9 fix: reimpl THUMB.5 instructions
pipeline branch now passes arm.gba and thumb.gba again

(TODO: Stop rewriting my commits away)
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka 1f9eeedfe8 fix: impl workaround for stage2 miscompilation 2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka 72a63eeb98 chore: instantly refill the pipeline on flush
I believe this to be necessary in order to get hardware interrupts
working.

thumb.gba test 108 fails but I'm committing anyways (despite the
regression) because this is kind of rebase/merge hell and I have
something that at least sort of works rn
2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka 2799c3f202 fix: reimpl handleInterrupt code 2022-10-13 00:33:13 -03:00
Rekai Nyangadzayi Musuka b3ada64e64 feat: implement basic pipeline
passes arm.gba, thumb.gb and armwrestler, fails in actual games
TODO: run FuzzARM debug specific titles
2022-10-13 00:33:11 -03:00
Rekai Nyangadzayi Musuka 97f48c730e chore(emu): refactor code 2022-10-13 00:29:51 -03:00
Rekai Nyangadzayi Musuka 293fbd9f55 feat(config): add support for (and read from) TOML config file 2022-10-13 00:29:48 -03:00
Rekai Nyangadzayi Musuka 21eddac31e style: improve code quality 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka 785135a074 feat: rewrite device ticks 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka fd38fd6506 style(scheduler): rename scheduler event handlers 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka bcacac64df style: code refactoring 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka dc7cad9691 style(apu): split apu.zig into multiple files + refactor 2022-10-13 00:23:58 -03:00
Rekai Nyangadzayi Musuka b5d8a65e69 style(backup): refactor code 2022-10-10 12:01:49 -03:00
Rekai Nyangadzayi Musuka 8028394105 style(flash): move flash code into it's own file 2022-10-10 12:01:49 -03:00
Rekai Nyangadzayi Musuka cb0eb67e4b style(eeprom): move eeprom code to it's own file 2022-10-10 12:00:45 -03:00
Rekai Nyangadzayi Musuka 13f6ee8ec4 style(bus): refactor several hardware abstractions 2022-10-10 11:57:57 -03:00
Rekai Nyangadzayi Musuka 92cfc763c0 chore: move util.zig 2022-09-19 16:07:19 -03:00
Rekai Nyangadzayi Musuka e192c6712f chore: disable audio sync by default
forgot SDL2 AudioStream doesn't work well for my use-case
2022-09-18 09:20:01 -03:00
Rekai Nyangadzayi Musuka 3466bf6c0a chore: change default settings 2022-09-18 06:30:39 -03:00
Rekai Nyangadzayi Musuka fbe3de0eb3 chore: reimpl util.escape
should make use of stdlib when I can
2022-09-18 06:23:30 -03:00
Rekai Nyangadzayi Musuka 4af144fca2 fix: Detect FRAM ROMs 2022-09-18 06:19:05 -03:00
Rekai Nyangadzayi Musuka 9a8aaba1ab chore: improve util and Gui API 2022-09-18 05:55:15 -03:00