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97de5d1a96
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fix: palette id is a u16 not a u8
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2022-02-28 17:32:10 -04:00 |
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d6ef53fd67
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feat: DMA Transfer MVP
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2022-02-28 12:34:00 -06:00 |
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b65f833b28
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feat(ppu): implement transparency + backdrop in mode 0
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2022-02-26 18:33:16 -06:00 |
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ac0486be1b
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chore(io): replace some bitfields with enums
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2022-02-24 17:20:23 -06:00 |
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441ebc38c7
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fix: better emulate behaviour of IO reads
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2022-02-24 17:20:20 -06:00 |
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be2dfb379a
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chore: document select unimplmented I/O registers
These registers are written to / read from Kirby: Nightmare in Dream Land
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2022-02-22 17:14:30 -06:00 |
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bc66be6c06
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feat: impelement a barebones SRAM
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2022-02-22 17:14:26 -06:00 |
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5368ff912d
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feat: pass retAddr.gba
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2022-02-21 15:34:46 -06:00 |
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c2cf2d2965
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feat: implement Hblank and Vcount Interrupts
Also implemented unique behaviour when writing to IF
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2022-02-21 14:45:47 -06:00 |
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e5ab8b51a9
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chore: improve Bus log + panic messages
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2022-02-19 11:48:43 -05:00 |
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c767e88e8d
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chore: improve io.zig
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2022-02-19 11:48:17 -05:00 |
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9e2e8c3d1a
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feat: implement mirroring for IWRAM EWRAM, OAM and PALRAM
Also realized I confused IWRAM and EWRAM. This is also fixed
TODO: Implemnt Mirroring for VRRAM
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2022-02-19 10:08:31 -05:00 |
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e426f2459e
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fix: resolve integer overflow in BG0 Drawing
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2022-02-19 06:55:30 -04:00 |
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3746cf6025
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chore: don't panic on 32-bit I/O
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2022-02-19 06:45:39 -04:00 |
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f6c8d7ca07
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chore: stub CPU HALTing
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2022-02-17 00:27:34 -04:00 |
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07343efdf3
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chore: correct logic errors in map size 1 and 3
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2022-02-16 23:49:08 -04:00 |
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4018f3875b
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chore: properly write to VOFS and HOFS in 32-bit bus
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2022-02-16 23:23:41 -04:00 |
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034f2e8d1d
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feat: implement hofs and vofs on io bus
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2022-02-16 04:29:04 -04:00 |
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d275a4890f
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feat: implement scrolling
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2022-02-16 03:37:25 -04:00 |
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ce97a52868
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feat: add support for multiple BGs in Mode 0
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2022-02-16 03:27:06 -04:00 |
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d2d4667f7b
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feat: document mode 0
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2022-02-16 03:05:19 -04:00 |
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5835b509e4
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feat: Mode 0 MVP
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2022-02-16 02:27:15 -04:00 |
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338122ed43
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chore: use zig slices for fun
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2022-02-13 05:28:56 -04:00 |
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e5a76a3c02
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chore: give DISPCNT DISPSTAT and VCOUNT to PPU struct
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2022-02-13 04:28:15 -04:00 |
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31fa06ac4a
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chore: give io read/write functions access to the entire Bus
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2022-02-13 04:13:06 -04:00 |
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ec25a9aae4
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feat: implement BG Scrolling Registers
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2022-02-13 04:04:10 -04:00 |
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b238a3e8f3
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feat: impelemnt BG0,1,2CNT and IF
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2022-02-13 03:23:09 -04:00 |
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aca7fc9a60
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feat: implement OAM
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2022-02-13 02:30:02 -04:00 |
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d2740e30d9
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chore: squash bugs preventing swi_demo.gba from working
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2022-02-13 02:29:53 -04:00 |
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8ab7a178c1
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chore(cpu): reimplement bank switching logic
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2022-02-12 04:33:32 -04:00 |
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d897c2fdcc
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fix: don't mask away MSB in THUMB.5 add
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2022-02-12 03:23:55 -04:00 |
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783706193b
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fix: properly decode format 11 instructions
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2022-02-12 03:13:38 -04:00 |
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b93bd53529
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chore: make use of scoped logging
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2022-02-11 01:33:33 -04:00 |
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ee27053db3
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chore: remove TODOs and some useless imports
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2022-02-06 19:07:23 -04:00 |
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7441dd151c
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fix: improper condition check and initialization of register
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2022-02-06 18:41:16 -04:00 |
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bbd4447734
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fix(cpu): force align thumb and arm block data transfers
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2022-02-06 17:08:12 -04:00 |
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225c0f7d55
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feat: pass arm.gba
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2022-02-06 05:06:25 -04:00 |
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fcde905ae1
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chore: reimplement ARM LDM/STM
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2022-02-06 04:34:45 -04:00 |
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798987eba0
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chore: improve arm ldm/stm
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2022-02-05 23:29:34 -04:00 |
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adfd501fc4
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fix(cpu): force-align SWP reads and writes
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2022-02-05 23:18:23 -04:00 |
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9581e3b3cb
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fix: force-align ARM STRH reads
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2022-02-05 23:09:13 -04:00 |
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1b9ab1f1d7
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fix: implement the same LDRSH logic as THUMB LDRSH
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2022-02-05 23:09:02 -04:00 |
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c52dc5adb1
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fix: PC is 12 ahead when it is rd in str and strb
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2022-02-05 21:42:04 -04:00 |
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7bfb87a859
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fix: listen to my past self
By deleting this line I go from test 234 to test 355 in arm.gba
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2022-02-05 21:35:26 -04:00 |
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0aece06107
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chore: dont use std.mem.bytesToValue
the stdlib accounts for endianness, which isn't something we want.
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2022-02-05 21:05:08 -04:00 |
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2842345111
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chore: remove unnecessary @as calls
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2022-02-05 21:01:39 -04:00 |
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aa6f3c7a92
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feat: pass thumb.gba
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2022-02-05 20:39:15 -04:00 |
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3ae24d6977
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chore: account for empty rlist in THUMB LDM/STM
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2022-02-05 18:03:39 -04:00 |
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0a22730479
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fix(cpu): handle edge case in LDRSH
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2022-02-05 17:12:25 -04:00 |
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bf4207ba8c
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chore: reorganize util.zig
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2022-02-05 15:55:12 -04:00 |
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