fix: force-align ARM STRH reads

2022-02-05 23:09:13 -04:00 · 2022-02-05 23:09:13 -04:00 · 9581e3b3cb
parent 1b9ab1f1d7
commit 9581e3b3cb
1 changed files with 1 additions and 1 deletions
--- a/src/cpu/arm/half_signed_data_transfer.zig
+++ b/src/cpu/arm/half_signed_data_transfer.zig
@ -58,7 +58,7 @@ pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I:
            } else {
                if (opcode >> 5 & 0x01 == 0x01) {
                    // STRH
-                    bus.write16(address, @truncate(u16, cpu.r[rd]));
+                    bus.write16(address & 0xFFFF_FFFE, @truncate(u16, cpu.r[rd]));
                } else unreachable; // SWP
            }