feat: implement Hblank and Vcount Interrupts
Also implemented unique behaviour when writing to IF
This commit is contained in:
parent
e5ab8b51a9
commit
c2cf2d2965
|
@ -105,7 +105,7 @@ pub fn write16(bus: *Bus, addr: u32, halfword: u16) void {
|
|||
0x0400_001C => bus.ppu.bg[3].hofs.raw = halfword,
|
||||
0x0400_001E => bus.ppu.bg[3].vofs.raw = halfword,
|
||||
0x0400_0200 => bus.io.ie.raw = halfword,
|
||||
0x0400_0202 => bus.io.irq.raw = halfword,
|
||||
0x0400_0202 => bus.io.irq.raw &= ~halfword,
|
||||
0x0400_0208 => bus.io.ime = halfword & 1 == 1,
|
||||
else => std.debug.panic("Tried to write 0x{X:0>4} to 0x{X:0>8}", .{ halfword, addr }),
|
||||
}
|
||||
|
|
36
src/cpu.zig
36
src/cpu.zig
|
@ -246,14 +246,8 @@ pub const Arm7tdmi = struct {
|
|||
}
|
||||
|
||||
pub fn step(self: *Self) u64 {
|
||||
if (self.bus.io.is_halted) {
|
||||
// const ie = self.bus.io.ie.raw;
|
||||
// const irq = self.bus.io.irq.raw;
|
||||
|
||||
// if (ie & irq != 0) self.bus.io.is_halted = false;
|
||||
|
||||
// log.warn("FIXME: Enable GBA HALTing", .{});
|
||||
}
|
||||
// If we're halted, the cpu is disabled
|
||||
if (self.bus.io.is_halted) return 1;
|
||||
|
||||
if (self.cpsr.t.read()) {
|
||||
const opcode = self.thumbFetch();
|
||||
|
@ -272,6 +266,32 @@ pub const Arm7tdmi = struct {
|
|||
return 1;
|
||||
}
|
||||
|
||||
pub fn handleInterrupt(self: *Self) void {
|
||||
const should_handle = self.bus.io.ie.raw & self.bus.io.irq.raw;
|
||||
|
||||
if (should_handle != 0) {
|
||||
self.bus.io.is_halted = false;
|
||||
// log.info("An Interrupt was Fired!", .{});
|
||||
|
||||
// Either IME is not true or I in CPSR is true
|
||||
// Don't handle interrupts
|
||||
if (!self.bus.io.ime or self.cpsr.i.read()) return;
|
||||
// log.info("An interrupt was Handled!", .{});
|
||||
|
||||
// TODO: Should this behave like Software Interrupts?
|
||||
const r15 = self.r[15] + if (self.cpsr.t.read()) @as(u32, 2) else 4;
|
||||
const cpsr = self.cpsr.raw;
|
||||
|
||||
self.changeMode(.Irq);
|
||||
self.cpsr.t.write(false);
|
||||
self.cpsr.i.write(true);
|
||||
|
||||
self.r[14] = r15;
|
||||
self.spsr.raw = cpsr;
|
||||
self.r[15] = 0x000_0018;
|
||||
}
|
||||
}
|
||||
|
||||
fn thumbFetch(self: *Self) u16 {
|
||||
const halfword = self.bus.read16(self.r[15]);
|
||||
self.r[15] += 2;
|
||||
|
|
|
@ -25,8 +25,11 @@ pub const Scheduler = struct {
|
|||
self.queue.deinit();
|
||||
}
|
||||
|
||||
pub fn handleEvent(self: *Self, _: *Arm7tdmi, bus: *Bus) void {
|
||||
pub fn handleEvent(self: *Self, cpu: *Arm7tdmi, bus: *Bus) void {
|
||||
const should_handle = if (self.queue.peek()) |e| self.tick >= e.tick else false;
|
||||
const stat = &bus.ppu.dispstat;
|
||||
const vcount = &bus.ppu.vcount;
|
||||
const irq = &bus.io.irq;
|
||||
|
||||
if (should_handle) {
|
||||
const event = self.queue.remove();
|
||||
|
@ -38,19 +41,36 @@ pub const Scheduler = struct {
|
|||
},
|
||||
.HBlank => {
|
||||
// The End of a Hblank (During Draw or Vblank)
|
||||
const old_scanline = bus.ppu.vcount.scanline.read();
|
||||
const old_scanline = vcount.scanline.read();
|
||||
const scanline = (old_scanline + 1) % 228;
|
||||
|
||||
bus.ppu.vcount.scanline.write(scanline);
|
||||
bus.ppu.dispstat.hblank.unset();
|
||||
vcount.scanline.write(scanline);
|
||||
stat.hblank.unset();
|
||||
|
||||
// Perform Vc == VcT check
|
||||
const coincidence = scanline == stat.vcount_trigger.read();
|
||||
stat.coincidence.write(coincidence);
|
||||
|
||||
if (coincidence and stat.vcount_irq.read()) {
|
||||
irq.coincidence.set();
|
||||
cpu.handleInterrupt();
|
||||
}
|
||||
|
||||
if (scanline < 160) {
|
||||
// Transitioning to another Draw
|
||||
self.push(.Draw, self.tick + (240 * 4));
|
||||
} else {
|
||||
// Transitioning to a Vblank
|
||||
if (scanline < 227) bus.ppu.dispstat.vblank.set() else bus.ppu.dispstat.vblank.unset();
|
||||
if (scanline == 160) {
|
||||
stat.vblank.set();
|
||||
|
||||
if (stat.vblank_irq.read()) {
|
||||
irq.vblank.set();
|
||||
cpu.handleInterrupt();
|
||||
}
|
||||
}
|
||||
|
||||
if (scanline == 227) stat.vblank.unset();
|
||||
self.push(.VBlank, self.tick + (240 * 4));
|
||||
}
|
||||
},
|
||||
|
@ -59,11 +79,24 @@ pub const Scheduler = struct {
|
|||
bus.ppu.drawScanline();
|
||||
|
||||
// Transitioning to a Hblank
|
||||
if (bus.ppu.dispstat.hblank_irq.read()) {
|
||||
bus.io.irq.hblank.set();
|
||||
cpu.handleInterrupt();
|
||||
}
|
||||
|
||||
bus.ppu.dispstat.hblank.set();
|
||||
self.push(.HBlank, self.tick + (68 * 4));
|
||||
},
|
||||
.VBlank => {
|
||||
// The end of a Vblank
|
||||
|
||||
// Transitioning to a Hblank
|
||||
if (bus.ppu.dispstat.hblank_irq.read()) {
|
||||
bus.io.irq.hblank.set();
|
||||
cpu.handleInterrupt();
|
||||
}
|
||||
|
||||
bus.ppu.dispstat.hblank.set();
|
||||
self.push(.HBlank, self.tick + (68 * 4));
|
||||
},
|
||||
}
|
||||
|
|
Loading…
Reference in New Issue