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0e53e774fe
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fix: remove undefined
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2022-07-03 08:59:44 -03:00 |
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7872515da7
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feat: pass thumb.gba
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2022-07-03 08:44:48 -03:00 |
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46d1d83724
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fix: don't fake the pipeline in swi
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2022-07-02 10:09:44 -03:00 |
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cf38dee61a
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feat: fake the pipeline less
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2022-07-02 10:09:25 -03:00 |
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d7aa7d0a9e
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feat: implement obscure behaviour for ARM data processing instrs
When a test instruction is called when rd == 15, then the CPSR is
reloaded from the SPSR, the pipline is not flushed
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2022-07-02 10:07:52 -03:00 |
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bfeedb5310
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chore: progress towards working pipeline
focus on THMB branching and a little bit of ARM data processing
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2022-07-02 04:45:34 -03:00 |
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df3538caeb
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fix: get beeg.gba working again
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2022-07-02 03:15:26 -03:00 |
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27a6ced4a7
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fix(pipeline): gang.gba works
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2022-07-02 01:47:10 -03:00 |
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b200dd9fa1
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chore: add non-working pipeline
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2022-07-01 23:49:49 -03:00 |
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ff3f79801c
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chore: modify type signature of util.sext
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2022-05-23 14:48:52 -03:00 |
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12f9bb51c1
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feat: stub mode 1 and 2
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2022-05-01 18:53:11 -03:00 |
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68012f84d3
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chore: comment ARM MSR code + Audio issues
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2022-04-30 22:17:34 -05:00 |
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002287ecfe
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fix: incorrect order-of-operations in ARM BL impl
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2022-04-27 23:15:39 -05:00 |
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9cce4d9859
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chore: misc improvements
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2022-04-21 10:15:52 -03:00 |
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6d5c30ac25
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fix: remove accidental rotation in ldrsh instructions
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2022-04-13 22:59:32 -03:00 |
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80e714e2eb
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chore: reimplement bus read/writes
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2022-04-08 16:48:43 -03:00 |
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37a360ec07
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fix: force align reads/writes in memory bus rather than in CPU
|
2022-04-08 15:17:31 -03:00 |
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39ab363afa
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fix: improve perf of instructions w/ rotr
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2022-03-16 22:56:37 -03:00 |
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cb4d3a9a51
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chore: replace unnecessarily complex sign extension implementation
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2022-02-28 20:38:50 -04:00 |
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3746cf6025
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chore: don't panic on 32-bit I/O
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2022-02-19 06:45:39 -04:00 |
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d2740e30d9
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chore: squash bugs preventing swi_demo.gba from working
|
2022-02-13 02:29:53 -04:00 |
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d897c2fdcc
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fix: don't mask away MSB in THUMB.5 add
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2022-02-12 03:23:55 -04:00 |
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783706193b
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fix: properly decode format 11 instructions
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2022-02-12 03:13:38 -04:00 |
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b93bd53529
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chore: make use of scoped logging
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2022-02-11 01:33:33 -04:00 |
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ee27053db3
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chore: remove TODOs and some useless imports
|
2022-02-06 19:07:23 -04:00 |
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bbd4447734
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fix(cpu): force align thumb and arm block data transfers
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2022-02-06 17:08:12 -04:00 |
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225c0f7d55
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feat: pass arm.gba
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2022-02-06 05:06:25 -04:00 |
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fcde905ae1
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chore: reimplement ARM LDM/STM
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2022-02-06 04:34:45 -04:00 |
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798987eba0
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chore: improve arm ldm/stm
|
2022-02-05 23:29:34 -04:00 |
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adfd501fc4
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fix(cpu): force-align SWP reads and writes
|
2022-02-05 23:18:23 -04:00 |
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9581e3b3cb
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fix: force-align ARM STRH reads
|
2022-02-05 23:09:13 -04:00 |
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1b9ab1f1d7
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fix: implement the same LDRSH logic as THUMB LDRSH
|
2022-02-05 23:09:02 -04:00 |
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c52dc5adb1
|
fix: PC is 12 ahead when it is rd in str and strb
|
2022-02-05 21:42:04 -04:00 |
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7bfb87a859
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fix: listen to my past self
By deleting this line I go from test 234 to test 355 in arm.gba
|
2022-02-05 21:35:26 -04:00 |
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2842345111
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chore: remove unnecessary @as calls
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2022-02-05 21:01:39 -04:00 |
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aa6f3c7a92
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feat: pass thumb.gba
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2022-02-05 20:39:15 -04:00 |
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3ae24d6977
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chore: account for empty rlist in THUMB LDM/STM
|
2022-02-05 18:03:39 -04:00 |
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0a22730479
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fix(cpu): handle edge case in LDRSH
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2022-02-05 17:12:25 -04:00 |
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5ec8d4b0a5
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fix: resolve decoding mixup in THUMB format 8 instructions
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2022-02-05 14:50:34 -04:00 |
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b233981a34
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feat: rename ARM and THUMB SWI functions
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2022-02-04 04:34:47 -04:00 |
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1b8db0c427
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chore: group THUMB and select ARM instructions together (same file)
|
2022-02-04 04:18:20 -04:00 |
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91384a7c68
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fix(cpu): resolve edge cases in THUMB Format 5
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2022-02-03 00:55:57 -04:00 |
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c6bb4bf8e1
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fix(cpu): allow for select values to overflow
FuzzARM found these operations which panicked, when they should
have overflowed. These are now fixed
n = 8000
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2022-02-02 22:49:33 -04:00 |
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800ed6f1a7
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feat(cpu): implement format 13
While bugs do exist, at this point all THUMB and ARMv4 instructions
have been implemented! Yay!
|
2022-02-02 22:31:21 -04:00 |
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027e4fb57b
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feat(cpu): implement THUMB format 17
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2022-02-02 22:31:08 -04:00 |
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1378c809e6
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feat(cpu): implement THUMB format11
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2022-02-02 22:30:46 -04:00 |
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99492a6782
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chore: progress towards passing ldr/str thumb in armwrestler
|
2022-02-02 21:14:46 -04:00 |
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8b574efe85
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fix(cpu): properly negate in NEG
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2022-02-02 20:12:20 -04:00 |
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9fd03d2a92
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fix(cpu): reimplement THUMB offset shifts
|
2022-02-02 20:12:07 -04:00 |
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9affe01da8
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fix(cpu): op == 0b00 decodes to add in format 5
|
2022-02-02 18:58:06 -04:00 |
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