fix: incorrect order-of-operations in ARM BL impl
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a87b46898b
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002287ecfe
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@ -418,9 +418,10 @@ pub const Arm7tdmi = struct {
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if (self.cpsr.t.read()) {
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if (opcode >> 11 == 0x1E) {
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// Instruction 1 of a BL Opcode, print in ARM mode
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const tmp_opcode = self.bus.read(u32, self.r[15] - 2);
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const be_opcode = tmp_opcode << 16 | tmp_opcode >> 16;
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log_str = try std.fmt.bufPrint(&buf, arm_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, be_opcode });
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const other_half = self.bus.debugRead(u16, self.r[15]);
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const bl_opcode = @as(u32, opcode) << 16 | other_half;
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log_str = try std.fmt.bufPrint(&buf, arm_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, bl_opcode });
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} else {
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log_str = try std.fmt.bufPrint(&buf, thumb_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, opcode });
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}
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@ -10,7 +10,7 @@ pub fn branch(comptime L: bool) InstrFn {
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return struct {
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fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
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if (L) cpu.r[14] = cpu.r[15];
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cpu.r[15] = cpu.fakePC() +% sext(24, opcode << 2);
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cpu.r[15] = cpu.fakePC() +% (sext(24, opcode) << 2);
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}
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}.inner;
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}
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