- Winnipeg or Halifax, Canada
- https://musuka.dev
- Joined on
2021-06-29
997dc1314c
feat(cpu): implement SWI
1456d0f317
chore(bios): allow reading from BIOS
6257418405
fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction
702ff288d8
fix(cpu): implement S set + rd == 15 case for data processing
bf36a23722
feat(cpu): implement banked registers
fc5a3460dd
fix(cpu): improve MRS and MSR instructions
6177927049
feat(cpu): implement CMN
903b75c7c4
fix(barrel_shifter): fix PC being 1 word ahead in barrel shifter
8d786cbe25
feat(cpu): Implement RSC
212bc9e11d
feat(cpu): implement RSB
2f3213f693
feat(cpu): implement fix for ADC and implement SBC
a62cd9aa40
chore(barrel_shifter): remove panic from ASR
ae69d9981e
feat(cpu): implement fix for ADC and implement SBC
faa8f724a0
chore(barrel_shifter): remove panic from ASR
25c57a4cc7
fix(barrel_shifter): should not modify cpsr when amount == 0
a7a44c4463
chore(cpu): refactor the barrel shifter once again
d4d2fedfbe
feat(cpu): implement ADC
483e149b32
feat(cpu): implement RRX for Barrel Shifter
85ffdf44f5
feat(cpu): implement SUB in THUMB format 3
9098a55ae3
feat(cpu): implement ARM SUB in data processing
c0d956ea95
feat(cpu): implement MVN
1025500407
chore(cpu): refactor barrel shifter
d05a924420
fix(cpu): use barrel shifter in data processing immediates
2a416fb2c6
feat(cpu): implement format 12 thumb instructions
ea5f0ce552
feat(cpu): implement some already decoded format 3 instructions
e55d2dc323
feat(cpu): implement THUMB format 5 instructions
9648dda3cb
feat(cpu): implement like 1 THUMB instruction
f10670d5e3
feat(cpu): implement like 1 THUMB instruction
f10670d5e3
feat(cpu): implement like 1 THUMB instruction
4606a1ab25
chore: distinguish between undefined ARM and THUMB instr
ae37b1218b
chore(cpu): refactor ARM functions to make room for THUMB
070322064d
fix(cpu): fix conditions for GT cond
37bd6758fb
fix(cpu): fix imm value calculation in MSR
7f6ab626d9
fix(cpu): resolve off-by-one error when executing LDM