fix(cpu): improve LDR/STR write-back logic

src/bus.zig

@@ -3,22 +3,31 @@ const std = @import("std");
 const Io = @import("bus/io.zig").Io;
 const Bios = @import("bus/bios.zig").Bios;
 const GamePak = @import("bus/pak.zig").GamePak;
+const Ppu = @import("ppu.zig").Ppu;
+
 const Allocator = std.mem.Allocator;
 
 pub const Bus = struct {
     pak: GamePak,
     bios: Bios,
+    ppu: Ppu,
     io: Io,
 
     pub fn init(alloc: Allocator, path: []const u8) !@This() {
         return @This(){
             .pak = try GamePak.init(alloc, path),
-            // TODO: don't hardcode this + bundle open-sorce Boot ROM
+            .bios = try Bios.init(alloc, "./bin/gba_bios.bin"), // TODO: don't hardcode this + bundle open-sorce Boot ROM
-            .bios = try Bios.init(alloc, "./bin/gba_bios.bin"),
+            .ppu = try Ppu.init(alloc),
             .io = Io.init(),
         };
     }
 
+    pub fn deinit(self: *@This()) void {
+        self.pak.deinit();
+        self.bios.deinit();
+        self.ppu.deinit();
+    }
+
     pub fn read32(self: *const @This(), addr: u32) u32 {
         return switch (addr) {
             // General Internal Memory
@@ -28,8 +37,8 @@ pub const Bus = struct {
             0x0400_0000...0x0400_03FE => self.read32(addr),
 
             // Internal Display Memory
-            0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:32] read from 0x{X:} in BG/OBJ Palette RAM", .{addr}),
+            0x0500_0000...0x0500_03FF => self.ppu.palette.get32(@as(usize, addr - 0x0500_0000)),
-            0x0600_0000...0x0601_7FFF => std.debug.panic("[Bus:32] read from 0x{X:} in VRAM", .{addr}),
+            0x0600_0000...0x0601_7FFF => self.ppu.vram.get32(@as(usize, addr - 0x0600_0000)),
             0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:32] read from 0x{X:} in OAM", .{addr}),
 
             // External Memory (Game Pak)
@@ -44,7 +53,7 @@ pub const Bus = struct {
         };
     }
 
-    pub fn write32(_: *@This(), addr: u32, word: u32) void {
+    pub fn write32(self: *@This(), addr: u32, word: u32) void {
         // TODO: write32 can write to GamePak Flash
 
         switch (addr) {
@@ -54,8 +63,8 @@ pub const Bus = struct {
             0x0400_0000...0x0400_03FE => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in I/O", .{ word, addr }),
 
             // Internal Display Memory
-            0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in BG/OBJ Palette RAM", .{ word, addr }),
+            0x0500_0000...0x0500_03FF => self.ppu.palette.set32(@as(usize, addr - 0x0500_0000), word),
-            0x0600_0000...0x0601_7FFF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in VRAM", .{ word, addr }),
+            0x0600_0000...0x0601_7FFF => self.ppu.vram.set32(@as(usize, addr - 0x0600_0000), word),
             0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in OAM", .{ word, addr }),
 
             else => std.log.warn("[Bus:32] ZBA tried to write 0x{X:} to 0x{X:}", .{ word, addr }),
@@ -71,8 +80,8 @@ pub const Bus = struct {
             0x0400_0000...0x0400_03FE => self.io.read16(addr),
 
             // Internal Display Memory
-            0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:16] read from 0x{X:} in BG/OBJ Palette RAM", .{addr}),
+            0x0500_0000...0x0500_03FF => self.ppu.palette.get16(@as(usize, addr - 0x0500_0000)),
-            0x0600_0000...0x0601_7FFF => std.debug.panic("[Bus:16] read from 0x{X:} in VRAM", .{addr}),
+            0x0600_0000...0x0601_7FFF => self.ppu.vram.get16(@as(usize, addr - 0x0600_0000)),
             0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:16] read from 0x{X:} in OAM", .{addr}),
 
             // External Memory (Game Pak)
@@ -89,7 +98,6 @@ pub const Bus = struct {
 
     pub fn write16(self: *@This(), addr: u32, halfword: u16) void {
         // TODO: write16 can write to GamePak Flash
-
         switch (addr) {
             // General Internal Memory
             0x0200_0000...0x0203_FFFF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in IWRAM", .{ halfword, addr }),
@@ -97,8 +105,8 @@ pub const Bus = struct {
             0x0400_0000...0x0400_03FE => self.io.write16(addr, halfword),
 
             // Internal Display Memory
-            0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in BG/OBJ Palette RAM", .{ halfword, addr }),
+            0x0500_0000...0x0500_03FF => self.ppu.palette.set16(@as(usize, addr - 0x0500_0000), halfword),
-            0x0600_0000...0x0601_7FFF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in VRAM", .{ halfword, addr }),
+            0x0600_0000...0x0601_7FFF => self.ppu.vram.set16(@as(usize, addr - 0x0600_0000), halfword),
             0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in OAM", .{ halfword, addr }),
 
             else => std.log.warn("[Bus:16] ZBA tried to write 0x{X:} to 0x{X:}", .{ halfword, addr }),
@@ -114,8 +122,8 @@ pub const Bus = struct {
             0x0400_0000...0x0400_03FE => self.io.read8(addr),
 
             // Internal Display Memory
-            0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:8] read from 0x{X:} in BG/OBJ Palette RAM", .{addr}),
+            0x0500_0000...0x0500_03FF => self.ppu.palette.get8(@as(usize, addr - 0x0500_0000)),
-            0x0600_0000...0x0601_7FFF => std.debug.panic("[Bus:8] read from 0x{X:} in VRAM", .{addr}),
+            0x0600_0000...0x0601_7FFF => self.ppu.vram.get8(@as(usize, addr - 0x0600_0000)),
             0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:8] read from 0x{X:} in OAM", .{addr}),
 
             // External Memory (Game Pak)

src/bus/bios.zig

@@ -4,6 +4,7 @@ const Allocator = std.mem.Allocator;
 
 pub const Bios = struct {
     buf: []u8,
+    alloc: Allocator,
 
     pub fn init(alloc: Allocator, path: []const u8) !@This() {
         const file = try std.fs.cwd().openFile(path, .{ .read = true });
@@ -13,9 +14,14 @@ pub const Bios = struct {
 
         return @This(){
             .buf = try file.readToEndAlloc(alloc, len),
+            .alloc = alloc,
         };
     }
 
+    pub fn deinit(self: *@This()) void {
+        self.alloc.free(self.buf);
+    }
+
     pub inline fn get32(self: *const @This(), idx: usize) u32 {
         std.debug.panic("[BIOS] TODO: BIOS is not implemented", .{});
         return (@as(u32, self.buf[idx + 3]) << 24) | (@as(u32, self.buf[idx + 2]) << 16) | (@as(u32, self.buf[idx + 1]) << 8) | (@as(u32, self.buf[idx]));

src/bus/io.zig

@@ -6,37 +6,43 @@ const Bit = bitfield.Bit;
 
 pub const Io = struct {
     dispcnt: Dispcnt,
+    dispstat: Dispstat,
 
     pub fn init() @This() {
         return .{
-            .dispcnt = .{ .val = 0x0000_0000 },
+            .dispcnt = .{ .raw = 0x0000_0000 },
+            .dispstat = .{ .raw = 0x0000_0000 },
         };
     }
 
     pub fn read32(self: *const @This(), addr: u32) u32 {
         return switch (addr) {
-            0x0400_0000 => @as(u32, self.dispcnt.val),
+            0x0400_0000 => @as(u32, self.dispcnt.raw),
+            0x0400_0004 => @as(u32, self.dispstat.raw),
             else => std.debug.panic("[I/O:32] tried to read from {X:}", .{addr}),
         };
     }
 
     pub fn read16(self: *const @This(), addr: u32) u16 {
         return switch (addr) {
-            0x0400_0000 => self.dispcnt.val,
+            0x0400_0000 => self.dispcnt.raw,
+            0x0400_0004 => self.dispstat.raw,
             else => std.debug.panic("[I/O:16] tried to read from {X:}", .{addr}),
         };
     }
 
     pub fn write16(self: *@This(), addr: u32, halfword: u16) void {
         switch (addr) {
-            0x0400_0000 => self.dispcnt.val = halfword,
+            0x0400_0000 => self.dispcnt.raw = halfword,
+            0x0400_0004 => self.dispstat.raw = halfword,
             else => std.debug.panic("[I/O:16] tried to write 0x{X:} to 0x{X:}", .{ halfword, addr }),
         }
     }
 
     pub fn read8(self: *const @This(), addr: u32) u8 {
         return switch (addr) {
-            0x0400_0000 => @truncate(u8, self.dispcnt.val),
+            0x0400_0000 => @truncate(u8, self.dispcnt.raw),
+            0x0400_0004 => @truncate(u8, self.dispstat.raw),
             else => std.debug.panic("[I/O:8] tried to read from {X:}", .{addr}),
         };
     }
@@ -45,12 +51,23 @@ pub const Io = struct {
 const Dispcnt = extern union {
     bg_mode: Bitfield(u16, 0, 3),
     frame_select: Bit(u16, 4),
-    hblank_interval_free: Bit(u16, 5),
+    hblank_interraw_free: Bit(u16, 5),
     obj_mapping: Bit(u16, 6),
     forced_blank: Bit(u16, 7),
     bg_enable: Bitfield(u16, 8, 4),
     obj_enable: Bit(u16, 12),
     win_enable: Bitfield(u16, 13, 2),
     obj_win_enable: Bit(u16, 15),
-    val: u16,
+    raw: u16,
+};
+
+const Dispstat = extern union {
+    vblank: Bit(u16, 0),
+    hblank: Bit(u16, 1),
+    vcount: Bit(u16, 2),
+    vblank_irq: Bit(u16, 3),
+    hblank_irq: Bit(u16, 4),
+    vcount_irq: Bit(u16, 5),
+    vcount_setting: Bitfield(u16, 8, 7),
+    raw: u16,
 };

src/bus/pak.zig

@@ -4,6 +4,7 @@ const Allocator = std.mem.Allocator;
 
 pub const GamePak = struct {
     buf: []u8,
+    alloc: Allocator,
 
     pub fn init(alloc: Allocator, path: []const u8) !@This() {
         const file = try std.fs.cwd().openFile(path, .{ .read = true });
@@ -13,11 +14,16 @@ pub const GamePak = struct {
 
         return @This(){
             .buf = try file.readToEndAlloc(alloc, len),
+            .alloc = alloc,
         };
     }
 
+    pub fn deinit(self: *@This()) void {
+        self.alloc.free(self.buf);
+    }
+
     pub inline fn get32(self: *const @This(), idx: usize) u32 {
-        return (@as(u32, self.buf[idx + 3]) << 24) | (@as(u32, self.buf[idx + 2]) << 16) | (@as(u32, self.buf[idx + 1]) << 8) | (@as(u32, self.buf[idx]));
+        return (@as(u32, self.get16(idx + 2)) << 16) | @as(u32, self.get16(idx));
     }
 
     pub inline fn get16(self: *const @This(), idx: usize) u16 {

src/cpu.zig

@@ -25,7 +25,7 @@ pub const Arm7tdmi = struct {
             .r = [_]u32{0x00} ** 16,
             .sch = scheduler,
             .bus = bus,
-            .cpsr = .{ .val = 0x0000_00DF },
+            .cpsr = .{ .raw = 0x0000_00DF },
         };
     }
 
@@ -39,13 +39,12 @@ pub const Arm7tdmi = struct {
 
         // TODO: Set sp_irq = 0x0300_7FA0, sp_svc = 0x0300_7FE0
 
-        self.cpsr.val = 0x6000001F;
+        self.cpsr.raw = 0x6000001F;
     }
 
     pub inline fn step(self: *@This()) u64 {
-        std.debug.print("PC: 0x{X:} ", .{self.r[15]});
         const opcode = self.fetch();
-        std.debug.print("opcode: 0x{X:}\n", .{opcode}); // Debug
+        self.mgbaLog(opcode);
 
         if (checkCond(&self.cpsr, opcode)) arm_lut[armIdx(opcode)](self, self.bus, opcode);
         return 1;
@@ -60,6 +59,33 @@ pub const Arm7tdmi = struct {
     fn fakePC(self: *const @This()) u32 {
         return self.r[15] + 4;
     }
+
+    fn mgbaLog(self: *const @This(), opcode: u32) void {
+        const stderr = std.io.getStdErr().writer();
+        std.debug.getStderrMutex().lock();
+        defer std.debug.getStderrMutex().unlock();
+
+        const r0 = self.r[0];
+        const r1 = self.r[1];
+        const r2 = self.r[2];
+        const r3 = self.r[3];
+        const r4 = self.r[4];
+        const r5 = self.r[5];
+        const r6 = self.r[6];
+        const r7 = self.r[7];
+        const r8 = self.r[8];
+        const r9 = self.r[9];
+        const r10 = self.r[10];
+        const r11 = self.r[11];
+        const r12 = self.r[12];
+        const r13 = self.r[13];
+        const r14 = self.r[14];
+        const r15 = self.r[15];
+
+        const cpsr = self.cpsr.raw;
+
+        nosuspend stderr.print("{X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} cpsr: {X:0>8} | {X:0>8}:\n", .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, cpsr, opcode }) catch return;
+    }
 };
 
 fn armIdx(opcode: u32) u12 {
@@ -143,7 +169,7 @@ const CPSR = extern union {
     c: Bit(u32, 29),
     z: Bit(u32, 30),
     n: Bit(u32, 31),
-    val: u32,
+    raw: u32,
 };
 
 const Mode = enum(u5) {

src/cpu/data_processing.zig

@@ -33,17 +33,15 @@ pub fn comptimeDataProcessing(comptime I: bool, comptime S: bool, comptime instr
                 },
                 0xA => {
                     // CMP
-                    var result: u32 = undefined;
-
                     const op1_val = cpu.r[op1];
                     const v_ctx = (op1_val >> 31 == 0x01) or (op2 >> 31 == 0x01);
 
-                    const didOverflow = @subWithOverflow(u32, op1_val, op2, &result);
+                    const result = op1_val -% op2;
 
-                    cpu.cpsr.v.write(v_ctx and (result >> 31 & 0x01 == 0x01));
-                    cpu.cpsr.c.write(didOverflow);
-                    cpu.cpsr.z.write(result == 0x00);
                     cpu.cpsr.n.write(result >> 31 & 0x01 == 0x01);
+                    cpu.cpsr.z.write(result == 0x00);
+                    cpu.cpsr.c.write(op2 <= op1_val);
+                    cpu.cpsr.v.write(v_ctx and (result >> 31 & 0x01 == 0x01));
                 },
                 else => std.debug.panic("[CPU] TODO: implement data processing type {}", .{instrKind}),
             }

src/cpu/half_signed_data_transfer.zig

@@ -34,18 +34,17 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
                     },
                     0b01 => {
                         // LDRH
-                        const halfword = bus.read16(address);
+                        cpu.r[rd] = bus.read16(address);
-                        cpu.r[rd] = @as(u32, halfword);
                     },
                     0b10 => {
                         // LDRSB
-                        const byte = bus.read8(address);
+                        cpu.r[rd] = util.u32SignExtend(8, @as(u32, bus.read8(address)));
-                        cpu.r[rd] = util.u32SignExtend(8, @as(u32, byte));
+                        std.debug.panic("TODO: Affect the CPSR", .{});
                     },
                     0b11 => {
                         // LDRSH
-                        const halfword = bus.read16(address);
+                        cpu.r[rd] = util.u32SignExtend(16, @as(u32, bus.read16(address)));
-                        cpu.r[rd] = util.u32SignExtend(16, @as(u32, halfword));
+                        std.debug.panic("TODO: Affect the CPSR", .{});
                     },
                 }
             } else {
@@ -58,7 +57,7 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
             }
 
             address = modified_base;
-            if (W and P) cpu.r[rn] = address;
+            if (W and P or !P) cpu.r[rn] = address;
         }
     }.halfSignedDataTransfer;
 }

src/cpu/single_data_transfer.zig

@@ -13,7 +13,7 @@ pub fn comptimeSingleDataTransfer(comptime I: bool, comptime P: bool, comptime U
             const rd = opcode >> 12 & 0xF;
 
             const base = cpu.r[rn];
-            const offset = if (I) opcode & 0xFFF else registerOffset(cpu, opcode);
+            const offset = if (I) registerOffset(cpu, opcode) else opcode & 0xFFF;
 
             const modified_base = if (U) base + offset else base - offset;
             var address = if (P) modified_base else base;
@@ -40,7 +40,7 @@ pub fn comptimeSingleDataTransfer(comptime I: bool, comptime P: bool, comptime U
             }
 
             address = modified_base;
-            if (W and P) cpu.r[rn] = address;
+            if (W and P or !P) cpu.r[rn] = address;
 
             // TODO: W-bit forces non-privledged mode for the transfer
         }

src/emu.zig

@@ -1,19 +1,17 @@
-const _ = @import("std");
-
 const Scheduler = @import("scheduler.zig").Scheduler;
 const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
 const Bus = @import("bus.zig").Bus;
 
-const cycles_per_frame: u64 = 10_000; // TODO: How many cycles actually?
+const cycles_per_frame: u64 = 100; // TODO: How many cycles actually?
 
 pub fn runFrame(sch: *Scheduler, cpu: *Arm7tdmi, bus: *Bus) void {
-    const frame_end = sch.tick + cycles_per_frame;
+    var cycles: u64 = 0;
-
+    while (cycles < cycles_per_frame) : (cycles += 1) {
-    while (sch.tick < frame_end) {
+        sch.tick += 1;
-        while (sch.tick < sch.nextTimestamp()) {
+        _ = cpu.step();
-            sch.tick += cpu.step();
-        }
 
+        while (sch.tick >= sch.nextTimestamp()) {
             sch.handleEvent(cpu, bus);
         }
     }
+}

src/main.zig

@@ -8,7 +8,7 @@ const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
 pub fn main() anyerror!void {
     var gpa = std.heap.GeneralPurposeAllocator(.{}){};
     const alloc = gpa.allocator();
-    defer _ = gpa.deinit();
+    defer std.debug.assert(!gpa.deinit());
 
     const args = try std.process.argsAlloc(alloc);
     defer std.process.argsFree(alloc, args);
@@ -24,7 +24,11 @@ pub fn main() anyerror!void {
     }
 
     var bus = try Bus.init(alloc, zba_args[0]);
+    defer bus.deinit();
+
     var scheduler = Scheduler.init(alloc);
+    defer scheduler.deinit();
+
     var cpu = Arm7tdmi.init(&scheduler, &bus);
 
     cpu.skipBios();

src/ppu.zig

@@ -0,0 +1,95 @@
+const std = @import("std");
+
+const Allocator = std.mem.Allocator;
+
+pub const Ppu = struct {
+    vram: Vram,
+    palette: Palette,
+
+    pub fn init(alloc: Allocator) !@This() {
+        return @This(){
+            .vram = try Vram.init(alloc),
+            .palette = try Palette.init(alloc),
+        };
+    }
+
+    pub fn deinit(self: *@This()) void {
+        self.vram.deinit();
+    }
+};
+
+const Palette = struct {
+    buf: []u8,
+    alloc: Allocator,
+
+    fn init(alloc: Allocator) !@This() {
+        return @This(){
+            .buf = try alloc.alloc(u8, 0x400),
+            .alloc = alloc,
+        };
+    }
+
+    fn deinit(self: *@This()) void {
+        self.alloc.free(self.buf);
+    }
+
+    pub inline fn get32(self: *const @This(), idx: usize) u32 {
+        return (@as(u32, self.get16(idx + 2)) << 16) | @as(u32, self.get16(idx));
+    }
+
+    pub inline fn set32(self: *@This(), idx: usize, word: u32) void {
+        self.set16(idx + 2, @truncate(u16, word >> 16));
+        self.set16(idx, @truncate(u16, word));
+    }
+
+    pub inline fn get16(self: *const @This(), idx: usize) u16 {
+        return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]);
+    }
+
+    pub inline fn set16(self: *@This(), idx: usize, halfword: u16) void {
+        self.buf[idx + 1] = @truncate(u8, halfword >> 8);
+        self.buf[idx] = @truncate(u8, halfword);
+    }
+
+    pub inline fn get8(self: *const @This(), idx: usize) u8 {
+        return self.buf[idx];
+    }
+};
+
+const Vram = struct {
+    buf: []u8,
+    alloc: Allocator,
+
+    fn init(alloc: Allocator) !@This() {
+        return @This(){
+            .buf = try alloc.alloc(u8, 0x18000),
+            .alloc = alloc,
+        };
+    }
+
+    fn deinit(self: *@This()) void {
+        self.alloc.free(self.buf);
+    }
+
+    pub inline fn get32(self: *const @This(), idx: usize) u32 {
+        return (@as(u32, self.get16(idx + 2)) << 16) | @as(u32, self.get16(idx));
+    }
+
+    pub inline fn set32(self: *@This(), idx: usize, word: u32) void {
+        self.set16(idx + 2, @truncate(u16, word >> 16));
+        self.set16(idx, @truncate(u16, word));
+    }
+
+    pub inline fn get16(self: *const @This(), idx: usize) u16 {
+        return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]);
+    }
+
+    pub inline fn set16(self: *@This(), idx: usize, halfword: u16) void {
+        self.buf[idx + 1] = @truncate(u8, halfword >> 8);
+        self.buf[idx] = @truncate(u8, halfword);
+    }
+
+    pub inline fn get8(self: *const @This(), idx: usize) u8 {
+        return self.buf[idx];
+    }
+};

src/scheduler.zig

@@ -21,6 +21,10 @@ pub const Scheduler = struct {
         return scheduler;
     }
 
+    pub fn deinit(self: *@This()) void {
+        self.queue.deinit();
+    }
+
     pub fn handleEvent(self: *@This(), _: *Arm7tdmi, _: *Bus) void {
         const should_handle = if (self.queue.peek()) |e| self.tick >= e.tick else false;