feat(bus): implement Palette RAM and DISPSTAT
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parent
8b9a80b279
commit
5ea888f68c
10
src/bus.zig
10
src/bus.zig
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@ -37,7 +37,7 @@ pub const Bus = struct {
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0x0400_0000...0x0400_03FE => self.read32(addr),
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// Internal Display Memory
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0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:32] read from 0x{X:} in BG/OBJ Palette RAM", .{addr}),
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0x0500_0000...0x0500_03FF => self.ppu.palette.get32(@as(usize, addr - 0x0500_0000)),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.get32(@as(usize, addr - 0x0600_0000)),
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0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:32] read from 0x{X:} in OAM", .{addr}),
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@ -63,7 +63,7 @@ pub const Bus = struct {
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0x0400_0000...0x0400_03FE => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in I/O", .{ word, addr }),
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// Internal Display Memory
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0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in BG/OBJ Palette RAM", .{ word, addr }),
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0x0500_0000...0x0500_03FF => self.ppu.palette.set32(@as(usize, addr - 0x0500_0000), word),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.set32(@as(usize, addr - 0x0600_0000), word),
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0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:32] wrote 0x{X:} to 0x{X:} in OAM", .{ word, addr }),
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@ -80,7 +80,7 @@ pub const Bus = struct {
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0x0400_0000...0x0400_03FE => self.io.read16(addr),
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// Internal Display Memory
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0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:16] read from 0x{X:} in BG/OBJ Palette RAM", .{addr}),
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0x0500_0000...0x0500_03FF => self.ppu.palette.get16(@as(usize, addr - 0x0500_0000)),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.get16(@as(usize, addr - 0x0600_0000)),
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0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:16] read from 0x{X:} in OAM", .{addr}),
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@ -105,7 +105,7 @@ pub const Bus = struct {
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0x0400_0000...0x0400_03FE => self.io.write16(addr, halfword),
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// Internal Display Memory
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0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in BG/OBJ Palette RAM", .{ halfword, addr }),
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0x0500_0000...0x0500_03FF => self.ppu.palette.set16(@as(usize, addr - 0x0500_0000), halfword),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.set16(@as(usize, addr - 0x0600_0000), halfword),
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0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:16] write 0x{X:} to 0x{X:} in OAM", .{ halfword, addr }),
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@ -122,7 +122,7 @@ pub const Bus = struct {
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0x0400_0000...0x0400_03FE => self.io.read8(addr),
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// Internal Display Memory
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0x0500_0000...0x0500_03FF => std.debug.panic("[Bus:8] read from 0x{X:} in BG/OBJ Palette RAM", .{addr}),
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0x0500_0000...0x0500_03FF => self.ppu.palette.get8(@as(usize, addr - 0x0500_0000)),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.get8(@as(usize, addr - 0x0600_0000)),
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0x0700_0000...0x0700_03FF => std.debug.panic("[Bus:8] read from 0x{X:} in OAM", .{addr}),
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@ -6,37 +6,43 @@ const Bit = bitfield.Bit;
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pub const Io = struct {
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dispcnt: Dispcnt,
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dispstat: Dispstat,
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pub fn init() @This() {
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return .{
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.dispcnt = .{ .val = 0x0000_0000 },
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.dispcnt = .{ .raw = 0x0000_0000 },
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.dispstat = .{ .raw = 0x0000_0000 },
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};
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}
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pub fn read32(self: *const @This(), addr: u32) u32 {
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return switch (addr) {
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0x0400_0000 => @as(u32, self.dispcnt.val),
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0x0400_0000 => @as(u32, self.dispcnt.raw),
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0x0400_0004 => @as(u32, self.dispstat.raw),
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else => std.debug.panic("[I/O:32] tried to read from {X:}", .{addr}),
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};
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}
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pub fn read16(self: *const @This(), addr: u32) u16 {
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return switch (addr) {
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0x0400_0000 => self.dispcnt.val,
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0x0400_0000 => self.dispcnt.raw,
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0x0400_0004 => self.dispstat.raw,
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else => std.debug.panic("[I/O:16] tried to read from {X:}", .{addr}),
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};
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}
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pub fn write16(self: *@This(), addr: u32, halfword: u16) void {
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switch (addr) {
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0x0400_0000 => self.dispcnt.val = halfword,
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0x0400_0000 => self.dispcnt.raw = halfword,
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0x0400_0004 => self.dispstat.raw = halfword,
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else => std.debug.panic("[I/O:16] tried to write 0x{X:} to 0x{X:}", .{ halfword, addr }),
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}
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}
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pub fn read8(self: *const @This(), addr: u32) u8 {
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return switch (addr) {
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0x0400_0000 => @truncate(u8, self.dispcnt.val),
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0x0400_0000 => @truncate(u8, self.dispcnt.raw),
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0x0400_0004 => @truncate(u8, self.dispstat.raw),
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else => std.debug.panic("[I/O:8] tried to read from {X:}", .{addr}),
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};
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}
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@ -45,12 +51,23 @@ pub const Io = struct {
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const Dispcnt = extern union {
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bg_mode: Bitfield(u16, 0, 3),
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frame_select: Bit(u16, 4),
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hblank_interval_free: Bit(u16, 5),
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hblank_interraw_free: Bit(u16, 5),
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obj_mapping: Bit(u16, 6),
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forced_blank: Bit(u16, 7),
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bg_enable: Bitfield(u16, 8, 4),
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obj_enable: Bit(u16, 12),
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win_enable: Bitfield(u16, 13, 2),
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obj_win_enable: Bit(u16, 15),
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val: u16,
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raw: u16,
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};
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const Dispstat = extern union {
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vblank: Bit(u16, 0),
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hblank: Bit(u16, 1),
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vcount: Bit(u16, 2),
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vblank_irq: Bit(u16, 3),
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hblank_irq: Bit(u16, 4),
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vcount_irq: Bit(u16, 5),
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vcount_setting: Bitfield(u16, 8, 7),
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raw: u16,
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};
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40
src/ppu.zig
40
src/ppu.zig
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@ -4,10 +4,12 @@ const Allocator = std.mem.Allocator;
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pub const Ppu = struct {
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vram: Vram,
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palette: Palette,
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pub fn init(alloc: Allocator) !@This() {
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return @This(){
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.vram = try Vram.init(alloc),
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.palette = try Palette.init(alloc),
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};
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}
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@ -16,6 +18,44 @@ pub const Ppu = struct {
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}
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};
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const Palette = struct {
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buf: []u8,
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alloc: Allocator,
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fn init(alloc: Allocator) !@This() {
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return @This(){
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.buf = try alloc.alloc(u8, 0x400),
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.alloc = alloc,
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};
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}
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fn deinit(self: *@This()) void {
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self.alloc.free(self.buf);
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}
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pub inline fn get32(self: *const @This(), idx: usize) u32 {
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return (@as(u32, self.get16(idx + 2)) << 16) | @as(u32, self.get16(idx));
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}
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pub inline fn set32(self: *@This(), idx: usize, word: u32) void {
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self.set16(idx + 2, @truncate(u16, word >> 16));
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self.set16(idx, @truncate(u16, word));
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}
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pub inline fn get16(self: *const @This(), idx: usize) u16 {
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return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]);
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}
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pub inline fn set16(self: *@This(), idx: usize, halfword: u16) void {
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self.buf[idx + 1] = @truncate(u8, halfword >> 8);
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self.buf[idx] = @truncate(u8, halfword);
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}
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pub inline fn get8(self: *const @This(), idx: usize) u8 {
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return self.buf[idx];
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}
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};
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const Vram = struct {
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buf: []u8,
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alloc: Allocator,
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