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b27bf4a85c
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fix(cpu): perform MUL with u64s, throw away upper 32 bits
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2022-02-01 16:15:08 -04:00 |
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dd632975f8
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fix(cpu): properly decode multiply instructions
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2022-01-30 02:16:12 -04:00 |
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a459d4b433
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feat(cpu): implement ARM multiply instructions
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2022-01-30 02:04:24 -04:00 |
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ae4023e51c
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chore: dedup code in THUMB instructions
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2022-01-29 20:05:27 -04:00 |
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bce067557f
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chore: refactor and genericize ARM data processing calculations
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2022-01-29 19:40:58 -04:00 |
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e0acabf050
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chore: relocate barrel_shifter zig file
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2022-01-29 18:52:16 -04:00 |
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599e068c7e
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feat(cpu): implement format2 THUMB instructions
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2022-01-29 18:46:27 -04:00 |
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fbc5b309b0
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chore: binary logging + file logging + DP chanes + fastBoot changes
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2022-01-25 18:18:52 -04:00 |
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997dc1314c
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feat(cpu): implement SWI
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2022-01-25 10:34:21 -04:00 |
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6257418405
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fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction
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2022-01-25 09:23:32 -04:00 |
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985fefb9f6
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chore(cpu): implement behaviour for undefined test instruction
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2022-01-25 08:05:42 -04:00 |
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95dd3e3df8
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fix(cpu): fix PC offset when barrel shifter and bit 4 of DP is set
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2022-01-24 17:52:01 -04:00 |
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702ff288d8
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fix(cpu): implement S set + rd == 15 case for data processing
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2022-01-19 07:46:49 -04:00 |
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bf36a23722
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feat(cpu): implement banked registers
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2022-01-19 07:29:49 -04:00 |
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fc5a3460dd
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fix(cpu): improve MRS and MSR instructions
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2022-01-18 20:17:00 -04:00 |
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6177927049
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feat(cpu): implement CMN
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2022-01-18 15:09:25 -04:00 |
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903b75c7c4
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fix(barrel_shifter): fix PC being 1 word ahead in barrel shifter
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2022-01-18 15:08:29 -04:00 |
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8d786cbe25
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feat(cpu): Implement RSC
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2022-01-18 14:46:57 -04:00 |
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212bc9e11d
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feat(cpu): implement RSB
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2022-01-18 14:36:03 -04:00 |
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63a57ac954
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feat(cpu): implement BIC
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2022-01-18 14:28:47 -04:00 |
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85dae5e1d7
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feat(cpu): implement EOR
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2022-01-18 14:27:07 -04:00 |
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6189bf0315
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feat(cpu): implement ADD
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2022-01-18 14:25:29 -04:00 |
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2f3213f693
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feat(cpu): implement fix for ADC and implement SBC
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2022-01-18 14:20:01 -04:00 |
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a62cd9aa40
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chore(barrel_shifter): remove panic from ASR
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2022-01-18 14:19:58 -04:00 |
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25c57a4cc7
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fix(barrel_shifter): should not modify cpsr when amount == 0
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2022-01-18 13:30:41 -04:00 |
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a7a44c4463
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chore(cpu): refactor the barrel shifter once again
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2022-01-17 15:55:55 -04:00 |
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d4d2fedfbe
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feat(cpu): implement ADC
ADC interacting w/ the Barrel Shifter is not working though
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2022-01-17 14:29:34 -04:00 |
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483e149b32
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feat(cpu): implement RRX for Barrel Shifter
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2022-01-17 14:19:40 -04:00 |
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9098a55ae3
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feat(cpu): implement ARM SUB in data processing
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2022-01-17 11:35:41 -04:00 |
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c0d956ea95
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feat(cpu): implement MVN
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2022-01-17 11:30:59 -04:00 |
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1025500407
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chore(cpu): refactor barrel shifter
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2022-01-17 11:17:04 -04:00 |
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d05a924420
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fix(cpu): use barrel shifter in data processing immediates
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2022-01-17 11:02:34 -04:00 |
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0cf052838d
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chore(cpu): lay groundwork for THUMB instruction decoding and execution
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2022-01-14 05:23:16 -04:00 |
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ae37b1218b
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chore(cpu): refactor ARM functions to make room for THUMB
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2022-01-14 04:26:09 -04:00 |
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