Rekai Nyangadzayi Musuka
bc66be6c06
feat: impelement a barebones SRAM
2022-02-22 17:14:26 -06:00
Rekai Nyangadzayi Musuka
5368ff912d
feat: pass retAddr.gba
2022-02-21 15:34:46 -06:00
Rekai Nyangadzayi Musuka
c2cf2d2965
feat: implement Hblank and Vcount Interrupts
...
Also implemented unique behaviour when writing to IF
2022-02-21 14:45:47 -06:00
Rekai Nyangadzayi Musuka
e5ab8b51a9
chore: improve Bus log + panic messages
2022-02-19 11:48:43 -05:00
Rekai Nyangadzayi Musuka
c767e88e8d
chore: improve io.zig
2022-02-19 11:48:17 -05:00
Rekai Nyangadzayi Musuka
9e2e8c3d1a
feat: implement mirroring for IWRAM EWRAM, OAM and PALRAM
...
Also realized I confused IWRAM and EWRAM. This is also fixed
TODO: Implemnt Mirroring for VRRAM
2022-02-19 10:08:31 -05:00
Rekai Nyangadzayi Musuka
e426f2459e
fix: resolve integer overflow in BG0 Drawing
2022-02-19 06:55:30 -04:00
Rekai Nyangadzayi Musuka
3746cf6025
chore: don't panic on 32-bit I/O
2022-02-19 06:45:39 -04:00
Rekai Nyangadzayi Musuka
f6c8d7ca07
chore: stub CPU HALTing
2022-02-17 00:27:34 -04:00
Rekai Nyangadzayi Musuka
07343efdf3
chore: correct logic errors in map size 1 and 3
2022-02-16 23:49:08 -04:00
Rekai Nyangadzayi Musuka
4018f3875b
chore: properly write to VOFS and HOFS in 32-bit bus
2022-02-16 23:23:41 -04:00
Rekai Nyangadzayi Musuka
034f2e8d1d
feat: implement hofs and vofs on io bus
2022-02-16 04:29:04 -04:00
Rekai Nyangadzayi Musuka
d275a4890f
feat: implement scrolling
2022-02-16 03:37:25 -04:00
Rekai Nyangadzayi Musuka
ce97a52868
feat: add support for multiple BGs in Mode 0
2022-02-16 03:27:06 -04:00
Rekai Nyangadzayi Musuka
d2d4667f7b
feat: document mode 0
2022-02-16 03:05:19 -04:00
Rekai Nyangadzayi Musuka
5835b509e4
feat: Mode 0 MVP
2022-02-16 02:27:15 -04:00
Rekai Nyangadzayi Musuka
338122ed43
chore: use zig slices for fun
2022-02-13 05:28:56 -04:00
Rekai Nyangadzayi Musuka
e5a76a3c02
chore: give DISPCNT DISPSTAT and VCOUNT to PPU struct
2022-02-13 04:28:15 -04:00
Rekai Nyangadzayi Musuka
31fa06ac4a
chore: give io read/write functions access to the entire Bus
2022-02-13 04:13:06 -04:00
Rekai Nyangadzayi Musuka
ec25a9aae4
feat: implement BG Scrolling Registers
2022-02-13 04:04:10 -04:00
Rekai Nyangadzayi Musuka
b238a3e8f3
feat: impelemnt BG0,1,2CNT and IF
2022-02-13 03:23:09 -04:00
Rekai Nyangadzayi Musuka
aca7fc9a60
feat: implement OAM
2022-02-13 02:30:02 -04:00
Rekai Nyangadzayi Musuka
d2740e30d9
chore: squash bugs preventing swi_demo.gba from working
2022-02-13 02:29:53 -04:00
Rekai Nyangadzayi Musuka
8ab7a178c1
chore(cpu): reimplement bank switching logic
2022-02-12 04:33:32 -04:00
Rekai Nyangadzayi Musuka
d897c2fdcc
fix: don't mask away MSB in THUMB.5 add
2022-02-12 03:23:55 -04:00
Rekai Nyangadzayi Musuka
783706193b
fix: properly decode format 11 instructions
2022-02-12 03:13:38 -04:00
Rekai Nyangadzayi Musuka
b93bd53529
chore: make use of scoped logging
2022-02-11 01:33:33 -04:00
Rekai Nyangadzayi Musuka
ee27053db3
chore: remove TODOs and some useless imports
2022-02-06 19:07:23 -04:00
Rekai Nyangadzayi Musuka
7441dd151c
fix: improper condition check and initialization of register
2022-02-06 18:41:16 -04:00
Rekai Nyangadzayi Musuka
bbd4447734
fix(cpu): force align thumb and arm block data transfers
2022-02-06 17:08:12 -04:00
Rekai Nyangadzayi Musuka
225c0f7d55
feat: pass arm.gba
2022-02-06 05:06:25 -04:00
Rekai Nyangadzayi Musuka
fcde905ae1
chore: reimplement ARM LDM/STM
2022-02-06 04:34:45 -04:00
Rekai Nyangadzayi Musuka
798987eba0
chore: improve arm ldm/stm
2022-02-05 23:29:34 -04:00
Rekai Nyangadzayi Musuka
adfd501fc4
fix(cpu): force-align SWP reads and writes
2022-02-05 23:18:23 -04:00
Rekai Nyangadzayi Musuka
9581e3b3cb
fix: force-align ARM STRH reads
2022-02-05 23:09:13 -04:00
Rekai Nyangadzayi Musuka
1b9ab1f1d7
fix: implement the same LDRSH logic as THUMB LDRSH
2022-02-05 23:09:02 -04:00
Rekai Nyangadzayi Musuka
c52dc5adb1
fix: PC is 12 ahead when it is rd in str and strb
2022-02-05 21:42:04 -04:00
Rekai Nyangadzayi Musuka
7bfb87a859
fix: listen to my past self
...
By deleting this line I go from test 234 to test 355 in arm.gba
2022-02-05 21:35:26 -04:00
Rekai Nyangadzayi Musuka
0aece06107
chore: dont use std.mem.bytesToValue
...
the stdlib accounts for endianness, which isn't something we want.
2022-02-05 21:05:08 -04:00
Rekai Nyangadzayi Musuka
2842345111
chore: remove unnecessary @as calls
2022-02-05 21:01:39 -04:00
Rekai Nyangadzayi Musuka
aa6f3c7a92
feat: pass thumb.gba
2022-02-05 20:39:15 -04:00
Rekai Nyangadzayi Musuka
3ae24d6977
chore: account for empty rlist in THUMB LDM/STM
2022-02-05 18:03:39 -04:00
Rekai Nyangadzayi Musuka
0a22730479
fix(cpu): handle edge case in LDRSH
2022-02-05 17:12:25 -04:00
Rekai Nyangadzayi Musuka
bf4207ba8c
chore: reorganize util.zig
2022-02-05 15:55:12 -04:00
Rekai Nyangadzayi Musuka
78080b4682
fix: zero initialize all allocated memory
2022-02-05 15:54:53 -04:00
Rekai Nyangadzayi Musuka
428eff1468
Revert "fix: allow for 32-bit reads to KEYINPUT"
...
This reverts commit 3a51707280
2022-02-05 14:52:49 -04:00
Rekai Nyangadzayi Musuka
5ec8d4b0a5
fix: resolve decoding mixup in THUMB format 8 instructions
2022-02-05 14:50:34 -04:00
Rekai Nyangadzayi Musuka
3a51707280
fix: allow for 32-bit reads to KEYINPUT
2022-02-05 13:47:05 -04:00
Rekai Nyangadzayi Musuka
b4d20fb264
chore: refactor ARMv4 decoding
2022-02-05 13:46:55 -04:00
Rekai Nyangadzayi Musuka
746158043d
chore: add more debug information to CPU panic method
2022-02-05 13:46:24 -04:00
Rekai Nyangadzayi Musuka
25300c8a9f
chore: give more descriptive panic messages when changing mode fails
2022-02-04 16:54:57 -04:00
Rekai Nyangadzayi Musuka
27d0ba8c7e
chore: clean up THUMB instruction decoding
2022-02-04 15:57:46 -04:00
Rekai Nyangadzayi Musuka
2f74b61f2e
feat: parse cartridge header
2022-02-04 05:54:06 -04:00
Rekai Nyangadzayi Musuka
b233981a34
feat: rename ARM and THUMB SWI functions
2022-02-04 04:34:47 -04:00
Rekai Nyangadzayi Musuka
1b8db0c427
chore: group THUMB and select ARM instructions together (same file)
2022-02-04 04:18:20 -04:00
Rekai Nyangadzayi Musuka
3e4f9eddb2
feat: integrate zig-clap with ZBA
2022-02-04 03:12:35 -04:00
Rekai Nyangadzayi Musuka
6ab4610a81
fix(cpu): properly decode format 7 and 8
2022-02-03 01:29:18 -04:00
Rekai Nyangadzayi Musuka
91384a7c68
fix(cpu): resolve edge cases in THUMB Format 5
2022-02-03 00:55:57 -04:00
Rekai Nyangadzayi Musuka
c6bb4bf8e1
fix(cpu): allow for select values to overflow
...
FuzzARM found these operations which panicked, when they should
have overflowed. These are now fixed
n = 8000
2022-02-02 22:49:33 -04:00
Rekai Nyangadzayi Musuka
800ed6f1a7
feat(cpu): implement format 13
...
While bugs do exist, at this point all THUMB and ARMv4 instructions
have been implemented! Yay!
2022-02-02 22:31:21 -04:00
Rekai Nyangadzayi Musuka
027e4fb57b
feat(cpu): implement THUMB format 17
2022-02-02 22:31:08 -04:00
Rekai Nyangadzayi Musuka
1378c809e6
feat(cpu): implement THUMB format11
2022-02-02 22:30:46 -04:00
Rekai Nyangadzayi Musuka
33399e9517
chore: update to latest zig nightly
2022-02-02 21:26:12 -04:00
Rekai Nyangadzayi Musuka
99492a6782
chore: progress towards passing ldr/str thumb in armwrestler
2022-02-02 21:14:46 -04:00
Rekai Nyangadzayi Musuka
8b574efe85
fix(cpu): properly negate in NEG
2022-02-02 20:12:20 -04:00
Rekai Nyangadzayi Musuka
9fd03d2a92
fix(cpu): reimplement THUMB offset shifts
2022-02-02 20:12:07 -04:00
Rekai Nyangadzayi Musuka
9affe01da8
fix(cpu): op == 0b00 decodes to add in format 5
2022-02-02 18:58:06 -04:00
Rekai Nyangadzayi Musuka
784bc81a4a
fix(cpu): account for overflow in THUMB alu MUL
2022-02-02 18:57:33 -04:00
Rekai Nyangadzayi Musuka
045c98de1f
chore: use if-else when decoding THUMB instructions
2022-02-02 18:48:47 -04:00
Rekai Nyangadzayi Musuka
c2901ee0d8
fix(cpu): account for rn in rlist in block data transfer
2022-02-02 17:35:33 -04:00
Rekai Nyangadzayi Musuka
d95efa5b12
feat: implement LDM/STM behaviour when S is set
2022-02-02 16:12:47 -04:00
Rekai Nyangadzayi Musuka
237beb9caa
feat(cpu): Pass all LDR/STR ARMwrestler tests
2022-02-02 14:07:18 -04:00
Rekai Nyangadzayi Musuka
30bad76e44
feat(cpu): decode and implement all necessary ARM CPU instructions
2022-02-02 12:06:41 -04:00
Rekai Nyangadzayi Musuka
c34c2ee6eb
feat(cpu): implement ARM SWP and SWPB
2022-02-02 08:44:33 -04:00
Rekai Nyangadzayi Musuka
6c7934be70
fix: resolve off by n * 2 when accessing Palette during BG Mode 4
2022-02-01 22:56:53 -04:00
Rekai Nyangadzayi Musuka
48017b45f5
feat(cpu): Implement Multiply Long ARM instructions
2022-02-01 22:09:38 -04:00
Rekai Nyangadzayi Musuka
28c81f79ae
fix: no buttons are pressed by default
2022-02-01 20:52:01 -04:00
Rekai Nyangadzayi Musuka
a80600156d
feat(cpu): implement format 18 THUMB instructions
2022-02-01 19:12:01 -04:00
Rekai Nyangadzayi Musuka
0d7600ed7a
chore: more detailed panic message
2022-02-01 19:11:56 -04:00
Rekai Nyangadzayi Musuka
ca41f6a85c
feat(cpu): implement format 10 THUMB instructions
2022-02-01 17:56:11 -04:00
Rekai Nyangadzayi Musuka
85927a943f
feat(cpu): implement SWP
2022-02-01 16:30:55 -04:00
Rekai Nyangadzayi Musuka
b27bf4a85c
fix(cpu): perform MUL with u64s, throw away upper 32 bits
2022-02-01 16:15:08 -04:00
Rekai Nyangadzayi Musuka
b07eb22b86
feat: implement keyboard input
2022-02-01 16:11:59 -04:00
Rekai Nyangadzayi Musuka
f6e4b4931f
chore: don't panic on unsupported BG mode
2022-01-30 02:43:11 -04:00
Rekai Nyangadzayi Musuka
e35d81eeb8
chore: tempoarily disable fps counter
2022-01-30 02:42:01 -04:00
Rekai Nyangadzayi Musuka
8c248ffb11
chore: zero-initialize VRAM
2022-01-30 02:39:16 -04:00
Rekai Nyangadzayi Musuka
b0332e6eb8
chore: stub KeyInput I/O register
2022-01-30 02:38:29 -04:00
Rekai Nyangadzayi Musuka
dd632975f8
fix(cpu): properly decode multiply instructions
2022-01-30 02:16:12 -04:00
Rekai Nyangadzayi Musuka
a459d4b433
feat(cpu): implement ARM multiply instructions
2022-01-30 02:04:24 -04:00
Rekai Nyangadzayi Musuka
6c008ce950
fix: allow 32-bit writes to DISPCNT
2022-01-30 01:42:54 -04:00
Rekai Nyangadzayi Musuka
8d1df7ae43
fix(cpu): properly decode ldm stm thumb instructions
2022-01-30 01:12:34 -04:00
Rekai Nyangadzayi Musuka
6ffaf12804
fix(cpu): properly decode THUMB PUSH and POP at comptime
2022-01-30 00:16:13 -04:00
Rekai Nyangadzayi Musuka
dc6931639f
fix(cpu): don't ignore 11th bit of THUMB BL offset
2022-01-29 23:53:40 -04:00
Rekai Nyangadzayi Musuka
e18f10126e
feat(cpu): implement thumb push / pop and stub format 13 thumb instrs
2022-01-29 23:22:10 -04:00
Rekai Nyangadzayi Musuka
0598ba402d
feat(cpu): implement THUMB format 9 loads / stores
2022-01-29 22:34:40 -04:00
Rekai Nyangadzayi Musuka
b8a9aaee86
fix(cpu): resolve issues with unexpected PC value in THUMB
2022-01-29 22:07:36 -04:00
Rekai Nyangadzayi Musuka
00058f6094
feat(cpu): implement THUMB ldmia stmia
2022-01-29 21:10:14 -04:00
Rekai Nyangadzayi Musuka
2dde47318c
chore: implement THUMB format 4 instructions
2022-01-29 20:42:13 -04:00
Rekai Nyangadzayi Musuka
ae4023e51c
chore: dedup code in THUMB instructions
2022-01-29 20:05:27 -04:00
Rekai Nyangadzayi Musuka
bce067557f
chore: refactor and genericize ARM data processing calculations
2022-01-29 19:40:58 -04:00
Rekai Nyangadzayi Musuka
e0acabf050
chore: relocate barrel_shifter zig file
2022-01-29 18:52:16 -04:00
Rekai Nyangadzayi Musuka
599e068c7e
feat(cpu): implement format2 THUMB instructions
2022-01-29 18:46:27 -04:00
Rekai Nyangadzayi Musuka
4ca65caef0
feat(cpu): implement format19 THUMB instructions
2022-01-29 18:25:50 -04:00
Rekai Nyangadzayi Musuka
0c49bf2288
chore: account for THUMB BL instruction when mimicking mGBA logs
2022-01-29 18:14:00 -04:00
Rekai Nyangadzayi Musuka
44dbdba48c
feat(cpu): implement format16 THUMB instructions
2022-01-29 17:44:04 -04:00
Rekai Nyangadzayi Musuka
d85e0c8d05
feat(cpu): implement format 1 THUMB instructions
2022-01-29 17:29:30 -04:00
Rekai Nyangadzayi Musuka
995633e9e8
fix: dont close file handle early
2022-01-29 01:18:45 -04:00
Rekai Nyangadzayi Musuka
cfbd292edc
feat(cpu): implement format 6 THUMB instructions
2022-01-29 01:18:41 -04:00
Rekai Nyangadzayi Musuka
95efb3f35d
chore: rename title
2022-01-28 23:27:03 -04:00
Rekai Nyangadzayi Musuka
6a6dccf4d8
chore: refactor GBA Display Timings
...
This change should reflect that the Hblank bit of DISPSTAT is toggled on all scanlines
while also ensuring that the Vblank bit is set on all Vblank scanlines
2022-01-28 22:58:19 -04:00
Rekai Nyangadzayi Musuka
ad1db4dc2e
chore: move a single statement lol
2022-01-28 22:57:48 -04:00
Rekai Nyangadzayi Musuka
19359f7ee4
chore: mark indexing methods as inline
2022-01-28 17:11:29 -04:00
Rekai Nyangadzayi Musuka
24f0922f86
feat: create emulator thread
2022-01-28 16:33:38 -04:00
Rekai Nyangadzayi Musuka
b1cc985230
chore: disable logging by default
2022-01-25 18:20:30 -04:00
Rekai Nyangadzayi Musuka
e5c8f0ce07
chore: revert fastboot changes
2022-01-25 18:20:01 -04:00
Rekai Nyangadzayi Musuka
fbc5b309b0
chore: binary logging + file logging + DP chanes + fastBoot changes
2022-01-25 18:18:52 -04:00
Rekai Nyangadzayi Musuka
540fbf739a
chore: rename skipBios to fastBoot
2022-01-25 11:15:17 -04:00
Rekai Nyangadzayi Musuka
0546b1c308
chore: set correct values for select banked registers on fast boot
2022-01-25 11:14:15 -04:00
Rekai Nyangadzayi Musuka
997dc1314c
feat(cpu): implement SWI
2022-01-25 10:34:21 -04:00
Rekai Nyangadzayi Musuka
1456d0f317
chore(bios): allow reading from BIOS
2022-01-25 10:32:28 -04:00
Rekai Nyangadzayi Musuka
6257418405
fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction
2022-01-25 09:23:32 -04:00
Rekai Nyangadzayi Musuka
985fefb9f6
chore(cpu): implement behaviour for undefined test instruction
2022-01-25 08:05:42 -04:00
Rekai Nyangadzayi Musuka
95dd3e3df8
fix(cpu): fix PC offset when barrel shifter and bit 4 of DP is set
2022-01-24 17:52:01 -04:00
Rekai Nyangadzayi Musuka
702ff288d8
fix(cpu): implement S set + rd == 15 case for data processing
2022-01-19 07:46:49 -04:00
Rekai Nyangadzayi Musuka
bf36a23722
feat(cpu): implement banked registers
2022-01-19 07:29:49 -04:00
Rekai Nyangadzayi Musuka
fc5a3460dd
fix(cpu): improve MRS and MSR instructions
2022-01-18 20:17:00 -04:00
Rekai Nyangadzayi Musuka
6177927049
feat(cpu): implement CMN
2022-01-18 15:09:25 -04:00
Rekai Nyangadzayi Musuka
903b75c7c4
fix(barrel_shifter): fix PC being 1 word ahead in barrel shifter
2022-01-18 15:08:29 -04:00
Rekai Nyangadzayi Musuka
8d786cbe25
feat(cpu): Implement RSC
2022-01-18 14:46:57 -04:00
Rekai Nyangadzayi Musuka
212bc9e11d
feat(cpu): implement RSB
2022-01-18 14:36:03 -04:00
Rekai Nyangadzayi Musuka
63a57ac954
feat(cpu): implement BIC
2022-01-18 14:28:47 -04:00
Rekai Nyangadzayi Musuka
85dae5e1d7
feat(cpu): implement EOR
2022-01-18 14:27:07 -04:00
Rekai Nyangadzayi Musuka
6189bf0315
feat(cpu): implement ADD
2022-01-18 14:25:29 -04:00
Rekai Nyangadzayi Musuka
2f3213f693
feat(cpu): implement fix for ADC and implement SBC
2022-01-18 14:20:01 -04:00
Rekai Nyangadzayi Musuka
a62cd9aa40
chore(barrel_shifter): remove panic from ASR
2022-01-18 14:19:58 -04:00
Rekai Nyangadzayi Musuka
25c57a4cc7
fix(barrel_shifter): should not modify cpsr when amount == 0
2022-01-18 13:30:41 -04:00
Rekai Nyangadzayi Musuka
a7a44c4463
chore(cpu): refactor the barrel shifter once again
2022-01-17 15:55:55 -04:00
Rekai Nyangadzayi Musuka
d4d2fedfbe
feat(cpu): implement ADC
...
ADC interacting w/ the Barrel Shifter is not working though
2022-01-17 14:29:34 -04:00
Rekai Nyangadzayi Musuka
483e149b32
feat(cpu): implement RRX for Barrel Shifter
2022-01-17 14:19:40 -04:00
Rekai Nyangadzayi Musuka
85ffdf44f5
feat(cpu): implement SUB in THUMB format 3
2022-01-17 11:36:02 -04:00
Rekai Nyangadzayi Musuka
9098a55ae3
feat(cpu): implement ARM SUB in data processing
2022-01-17 11:35:41 -04:00
Rekai Nyangadzayi Musuka
c0d956ea95
feat(cpu): implement MVN
2022-01-17 11:30:59 -04:00
Rekai Nyangadzayi Musuka
1025500407
chore(cpu): refactor barrel shifter
2022-01-17 11:17:04 -04:00
Rekai Nyangadzayi Musuka
d05a924420
fix(cpu): use barrel shifter in data processing immediates
2022-01-17 11:02:34 -04:00
Rekai Nyangadzayi Musuka
2a416fb2c6
feat(cpu): implement format 12 thumb instructions
2022-01-17 10:07:50 -04:00
Rekai Nyangadzayi Musuka
ea5f0ce552
feat(cpu): implement some already decoded format 3 instructions
2022-01-17 09:29:11 -04:00
Rekai Nyangadzayi Musuka
e55d2dc323
feat(cpu): implement THUMB format 5 instructions
2022-01-17 09:28:46 -04:00
Rekai Nyangadzayi Musuka
3037407ebe
chore: mgba log now supports printing THUMB instructions
2022-01-17 07:18:44 -04:00
Rekai Nyangadzayi Musuka
1915d98bdd
feat(cpu): implement like 1 THUMB instruction
2022-01-16 12:46:59 -04:00
Rekai Nyangadzayi Musuka
4606a1ab25
chore: distinguish between undefined ARM and THUMB instr
2022-01-14 05:30:32 -04:00
Rekai Nyangadzayi Musuka
0cf052838d
chore(cpu): lay groundwork for THUMB instruction decoding and execution
2022-01-14 05:23:16 -04:00
Rekai Nyangadzayi Musuka
ae37b1218b
chore(cpu): refactor ARM functions to make room for THUMB
2022-01-14 04:26:09 -04:00
Rekai Nyangadzayi Musuka
070322064d
fix(cpu): fix conditions for GT cond
2022-01-14 04:19:54 -04:00
Rekai Nyangadzayi Musuka
37bd6758fb
fix(cpu): fix imm value calculation in MSR
2022-01-14 04:08:04 -04:00
Rekai Nyangadzayi Musuka
7f6ab626d9
fix(cpu): resolve off-by-one error when executing LDM
2022-01-14 03:43:03 -04:00
Rekai Nyangadzayi Musuka
77dba68a0b
feat(cpu): implement branch and exchange
...
If I want to continue with armwrestler, I'll have to implement
THUMB instructions now
2022-01-12 07:20:24 -04:00
Rekai Nyangadzayi Musuka
7adc7c8802
fix(cpu): make Data Processing instructions r15-aware
2022-01-12 07:20:24 -04:00
Rekai Nyangadzayi Musuka
229f7c3388
fix(cpu): make LDRH and STRH aware of r15
2022-01-12 07:20:21 -04:00
Rekai Nyangadzayi Musuka
5812b9713c
fix(cpu): account for r15 in LDR and STR instructions
2022-01-12 06:16:59 -04:00
Rekai Nyangadzayi Musuka
98c5803208
fix(cpu): flip two branches in PSR Transfer execution
2022-01-12 06:16:34 -04:00
Rekai Nyangadzayi Musuka
74abd3df4d
feat(cpu): implement MSR and MRS
2022-01-12 04:48:57 -04:00
Rekai Nyangadzayi Musuka
7531af7f2b
feat(cpu): stub PSR Transfer instructions
2022-01-12 03:40:51 -04:00
Rekai Nyangadzayi Musuka
1c173eb4b8
chore(io): implement IE and IME
2022-01-12 02:19:26 -04:00
Rekai Nyangadzayi Musuka
769c67b9d4
chore: remove some magic constants
2022-01-12 00:46:20 -04:00
Rekai Nyangadzayi Musuka
c1be53bcb2
fix(bus): remove accidental recursion
2022-01-10 21:25:45 -04:00
Rekai Nyangadzayi Musuka
072a66cfdb
fix(cpu): write results of ORR to destination register
2022-01-10 10:56:41 -04:00
Rekai Nyangadzayi Musuka
ed3bdd90fb
feat(cpu): implement TEQ
2022-01-10 08:09:02 -04:00
Rekai Nyangadzayi Musuka
e9c1c94cae
feat(cpu): Implement ORR
2022-01-10 08:06:00 -04:00
Rekai Nyangadzayi Musuka
0f08ad05be
feat(bus): implement IWRAM and EWRAM
2022-01-10 07:59:21 -04:00
Rekai Nyangadzayi Musuka
fd5006b29d
fix(ppu): properly access Mode 4 palette
2022-01-10 07:23:54 -04:00
Rekai Nyangadzayi Musuka
22b95b2a74
feat(cpu): refactor LDM/STM
2022-01-10 06:51:32 -04:00
Rekai Nyangadzayi Musuka
7d79a0bee2
feat(cpu): implement LDM/STM
2022-01-10 06:27:36 -04:00
Rekai Nyangadzayi Musuka
6c0651ca08
chore(io): DISPSTAT bits 3 and 4 better match GBATEK documentation
2022-01-10 06:26:42 -04:00
Rekai Nyangadzayi Musuka
0d8c5e6882
fix(cpu): fix off-by-word bug in BL
2022-01-10 06:26:02 -04:00
Rekai Nyangadzayi Musuka
89a8fe403b
feat(bus): have VCOUNT be addressable on the bus
2022-01-10 03:35:28 -04:00
Rekai Nyangadzayi Musuka
7c5d2d2389
feat(ppu): implement Mode 4
...
Implementation is not tested. Pending on LDM and STM so that I can
run beeg.gba
2022-01-10 03:35:24 -04:00
Rekai Nyangadzayi Musuka
2467b94dbd
chore(io): rename some io bitfield fields
2022-01-10 02:13:25 -04:00
Rekai Nyangadzayi Musuka
0d4c850218
chore: remove premature inlines
2022-01-10 01:24:14 -04:00
Rekai Nyangadzayi Musuka
bbe2ecfa53
chore: add FPS counter
2022-01-10 01:22:55 -04:00
Rekai Nyangadzayi Musuka
c54145ce3c
chore: improve code clarity
2022-01-09 23:34:33 -04:00
Rekai Nyangadzayi Musuka
ead6d1ce49
feat(ppu): improve timings + implement BG mode 3 bitmap
2022-01-09 22:16:34 -04:00
Rekai Nyangadzayi Musuka
581285a434
fix: allocate framebuf on heap
2022-01-08 20:30:57 -04:00
Rekai Nyangadzayi Musuka
0d203543ca
chore: add code for heap alloc of white texture
2022-01-08 18:52:11 -04:00
Rekai Nyangadzayi Musuka
eb6c00f0ac
chore(gui): switch from RGBA8888 to BGR5555 to match BG Mode 3
2022-01-08 04:54:39 -04:00
Rekai Nyangadzayi Musuka
da7f21f47e
feat: draw white texture using SDL2
2022-01-07 22:46:17 -04:00
Rekai Nyangadzayi Musuka
8fb666624f
fix(ppu): deallocate palette RAM on cleanup
2022-01-07 22:27:08 -04:00
Rekai Nyangadzayi Musuka
568c374131
chore: code cleanup
2022-01-07 20:00:42 -04:00
Rekai Nyangadzayi Musuka
910745f442
chore(bus): refactor bus.zig
2022-01-07 19:49:58 -04:00
Rekai Nyangadzayi Musuka
f8c6af3247
chore: refactor instruction exec code
2022-01-07 19:44:48 -04:00
Rekai Nyangadzayi Musuka
a407671de2
chore(io): alias @This() to Self in io.zig
2022-01-07 19:34:54 -04:00
Rekai Nyangadzayi Musuka
e9ec124e33
chore: refactor bios.zig and pak.zig
2022-01-07 19:33:49 -04:00
Rekai Nyangadzayi Musuka
9f64804763
fix: by convention deinit() should not take pointers to self
2022-01-07 19:16:23 -04:00
Rekai Nyangadzayi Musuka
c6123d8a6d
feat: implement PPU Timings in Scheduler
2022-01-05 21:18:33 -04:00
Rekai Nyangadzayi Musuka
f709458638
feat(sched): add HBlank and VBlank events to the scheduler
2022-01-05 17:34:59 -05:00
Rekai Nyangadzayi Musuka
5037b8f0cc
feat: implement S (when rd != 15) for several data processing instructions
2022-01-05 15:45:52 -05:00
Rekai Nyangadzayi Musuka
28a70d0112
feat: implement dedicated Barrel Shifter SHL and SHR
2022-01-05 13:58:11 -05:00
Rekai Nyangadzayi Musuka
7473ffedc7
chore: stub TST
2022-01-04 04:08:02 -06:00
Rekai Nyangadzayi Musuka
172f3e8efe
chore: comment-out logging by default
2022-01-04 03:58:11 -06:00
Rekai Nyangadzayi Musuka
28bb410dfd
fix(cpu): improve LDR/STR write-back logic
2022-01-04 03:55:41 -06:00
Rekai Nyangadzayi Musuka
5ea888f68c
feat(bus): implement Palette RAM and DISPSTAT
2022-01-04 03:29:56 -06:00
