268961262d
feat(dma): implement all dma i/o reads
2022-10-29 01:30:12 -03:00
3e62feacba
feat(ppu): implement all ppu i/o reads
2022-10-29 01:29:27 -03:00
d859cee365
style: get rid of unnecessary type coersion
2022-10-29 00:06:08 -03:00
371cf4cc12
style(i/o, ppu): refactor ppu i/o
2022-10-28 23:45:54 -03:00
10aec67ee0
emu: implement thread sleep in granular steps
2022-10-28 21:58:55 -03:00
4eb715a138
doc(emu): properly document + simply constants
2022-10-28 21:57:30 -03:00
14b24787ab
style: remove unnecessary imports
2022-10-28 21:56:55 -03:00
eb7ffa29f4
fix(apu): pause device on mute instead of writing silence
2022-10-27 09:11:08 -03:00
4b8ed3cebb
fix(io): resolve embarrasingly simple regression
...
introduced in 21eddac31ec6839ea51f23b3101282c423a21142
2022-10-23 04:39:31 -03:00
928ce674d9
fix(cpu): fix obscure LDRSH behaviour
2022-10-22 22:12:41 -03:00
945dbec013
fix(open-bus): don't rotate result
...
Rotating misaligned reads is the responsibility of the CPU
2022-10-22 21:32:36 -03:00
dd98066a34
Merge pull request 'feat(dma): Implement DMA Latch' ( #5 ) from dma-latch into main
...
Reviewed-on: #5
2022-10-22 23:53:21 +00:00
a2868dfe9e
feat(dma): Implement DMA Latch
2022-10-22 20:52:02 -03:00
22979d9450
fix(bios): fix regression
...
was reading addr_latch + 8, which is a remnant from when I was faking
the pipeline
2022-10-22 15:33:36 -03:00
712c58391d
chore(config): change defaults in config.toml
2022-10-21 06:01:22 -03:00
407774d798
chore(gitignore): update .gitignore
2022-10-21 04:40:55 -03:00
16f8f4c953
feat: write default config.toml if it doesn't exist
...
also resolves panic on missing /zba or /zba/save directory by ensuring
those directories exist as soon as we know the data directory
2022-10-21 04:39:16 -03:00
143ffd95f7
chore: update README
2022-10-21 02:59:43 -03:00
250ff25ed7
Merge pull request 'Configure SDL2 to use OpenGL' ( #4 ) from opengl into main
...
Reviewed-on: #4
2022-10-20 01:41:50 +00:00
eff52ac1bb
fix(opengl): properly control whether vsync is enabled
2022-10-17 20:31:42 -03:00
e60b556f72
chore(ppu): remove BGR555 -> RGBA888 LUT
...
LUT probably couldn't fit in CPU cache anyways.
TODO: Consider whether LUTs for separate channels (size 32 * 3 * 3
instead of std.math.maxInt(u15))
2022-10-17 20:31:42 -03:00
3a3e6acc6a
chore: replace OpenGL 4.5 bindings with OpenGL 3.3
2022-10-17 20:31:42 -03:00
4b4bc7f894
chore: remove unnecessary ptr cast
2022-10-17 20:31:42 -03:00
325208d460
feat: implement better Colour Emulation
2022-10-17 20:31:42 -03:00
f44a1a49fd
fix: lower required OpenGL version + resolve offset bug
2022-10-17 20:31:42 -03:00
1575f517a9
feat: use opengl
...
TODO:
- Texture isn't scaling properly
- I need to reverse the colours in the frag shader
2022-10-17 20:31:42 -03:00
26dba16789
chore(gpio): add missing errdefer
2022-10-17 20:01:50 -03:00
b133880064
chore(main): report errors slightly better
2022-10-17 18:30:40 -03:00
2474daa3ae
chore(config): add log message
2022-10-17 17:39:02 -03:00
fc53a40b3c
feat(config): add option to skip BIOS
2022-10-17 17:31:07 -03:00
7097e21361
feat(cli): Add option to skip BIOS
2022-10-17 17:25:04 -03:00
a9fe24b1b4
chore: Update README.md
2022-10-17 17:00:54 -03:00
f38c840d32
Merge pull request 'Draft: Implement Instruction Pipeline' ( #3 ) from pipeline into main
...
Reviewed-on: #3
2022-10-17 19:42:42 +00:00
19e70c39d1
feat(config): add config option to mute ZBA
2022-10-13 00:54:15 -03:00
5a72a8e7f3
chore(config): add example config file
2022-10-13 00:46:18 -03:00
7b146ad7ca
fix(bios): set addr_latch even if bios is skipped
2022-10-13 00:35:22 -03:00
822eed1f3a
fix(bus): make open bus impl aware of CPU pipeline
2022-10-13 00:35:22 -03:00
b37a14900c
style(bus): cpu ptr doesn't need to be optional
2022-10-13 00:35:22 -03:00
f5bd20bc2a
style: code cleanup
2022-10-13 00:35:22 -03:00
d3514b14f3
fix: resolve timing regressions
...
make sure to use fetch timings when fetching instructions
2022-10-13 00:35:20 -03:00
06c60dad74
fix: rename Pipline to Pipeline
2022-10-13 00:34:18 -03:00
870e991862
feat: working pipeline implementation
2022-10-13 00:34:18 -03:00
5bb5bdf389
chore: refactor ARM/THUMB data processing instructions
2022-10-13 00:34:18 -03:00
a3996cbc58
fix: don't flush pipeline when reloading CPSR in ARM Data Processing
2022-10-13 00:34:18 -03:00
a948c6f900
chore: don't write to CPSR + swap with SPSR at the same time
2022-10-13 00:34:18 -03:00
014180cbd0
chore: update README.md
2022-10-13 00:33:13 -03:00
e4451738b5
fix: advance r15, even when the pipeline is reloaded from the scheduler
...
The PC would fall behind whenever an IRQ was called because the pipeline
was reloaded (+8 to PC), however that was never actually done by any code
Now, the PC is always incremented when the pipeline is reloaded
2022-10-13 00:33:13 -03:00
48b81c8e7a
chore: dump pipeline state on cpu panic
2022-10-13 00:33:13 -03:00
3cf1bf54e9
fix: reimpl THUMB.5 instructions
...
pipeline branch now passes arm.gba and thumb.gba again
(TODO: Stop rewriting my commits away)
2022-10-13 00:33:13 -03:00
1f9eeedfe8
fix: impl workaround for stage2 miscompilation
2022-10-13 00:33:13 -03:00
