Rekai Nyangadzayi Musuka
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06e20666bd
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chore: refactor ARMv4 decoding
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2022-10-21 05:12:14 -03:00 |
Rekai Nyangadzayi Musuka
|
36687c5c67
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chore: add more debug information to CPU panic method
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2022-10-21 05:12:14 -03:00 |
Rekai Nyangadzayi Musuka
|
dd9b20030a
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chore: give more descriptive panic messages when changing mode fails
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2022-10-21 05:12:13 -03:00 |
Rekai Nyangadzayi Musuka
|
c0db2a987b
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chore: clean up THUMB instruction decoding
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2022-10-21 05:12:13 -03:00 |
Rekai Nyangadzayi Musuka
|
c3ff2ed6c1
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feat: parse cartridge header
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2022-10-21 05:12:13 -03:00 |
Rekai Nyangadzayi Musuka
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271f42cf0e
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feat: rename ARM and THUMB SWI functions
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2022-10-21 05:12:13 -03:00 |
Rekai Nyangadzayi Musuka
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01e15584da
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chore: group THUMB and select ARM instructions together (same file)
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2022-10-21 05:12:13 -03:00 |
Rekai Nyangadzayi Musuka
|
17b91db2ef
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feat: integrate zig-clap with ZBA
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2022-10-21 05:12:13 -03:00 |
Rekai Nyangadzayi Musuka
|
3e786d02ac
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fix(cpu): properly decode format 7 and 8
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2022-10-21 05:12:12 -03:00 |
Rekai Nyangadzayi Musuka
|
c8f2db69df
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fix(cpu): resolve edge cases in THUMB Format 5
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2022-10-21 05:12:12 -03:00 |
Rekai Nyangadzayi Musuka
|
b4e0682801
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fix(cpu): allow for select values to overflow
FuzzARM found these operations which panicked, when they should
have overflowed. These are now fixed
n = 8000
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2022-10-21 05:12:12 -03:00 |
Rekai Nyangadzayi Musuka
|
af10c1b076
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feat(cpu): implement format 13
While bugs do exist, at this point all THUMB and ARMv4 instructions
have been implemented! Yay!
|
2022-10-21 05:12:12 -03:00 |
Rekai Nyangadzayi Musuka
|
e6a0eab667
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feat(cpu): implement THUMB format 17
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2022-10-21 05:12:12 -03:00 |
Rekai Nyangadzayi Musuka
|
523b9d2736
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feat(cpu): implement THUMB format11
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2022-10-21 05:12:12 -03:00 |
Rekai Nyangadzayi Musuka
|
011d2f2f2a
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chore: update to latest zig nightly
|
2022-10-21 05:12:11 -03:00 |
Rekai Nyangadzayi Musuka
|
c37546d273
|
chore: progress towards passing ldr/str thumb in armwrestler
|
2022-10-21 05:12:11 -03:00 |
Rekai Nyangadzayi Musuka
|
fbedebb938
|
fix(cpu): properly negate in NEG
|
2022-10-21 05:12:11 -03:00 |
Rekai Nyangadzayi Musuka
|
1773a3acc8
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fix(cpu): reimplement THUMB offset shifts
|
2022-10-21 05:12:11 -03:00 |
Rekai Nyangadzayi Musuka
|
058c02150c
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fix(cpu): op == 0b00 decodes to add in format 5
|
2022-10-21 05:12:11 -03:00 |
Rekai Nyangadzayi Musuka
|
8d841ead50
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fix(cpu): account for overflow in THUMB alu MUL
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2022-10-21 05:12:10 -03:00 |
Rekai Nyangadzayi Musuka
|
152dafbdf7
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chore: use if-else when decoding THUMB instructions
|
2022-10-21 05:12:10 -03:00 |
Rekai Nyangadzayi Musuka
|
7dbd2fc556
|
fix(cpu): account for rn in rlist in block data transfer
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2022-10-21 05:12:10 -03:00 |
Rekai Nyangadzayi Musuka
|
85e0924669
|
feat: implement LDM/STM behaviour when S is set
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2022-10-21 05:12:10 -03:00 |
Rekai Nyangadzayi Musuka
|
97919f646d
|
feat(cpu): Pass all LDR/STR ARMwrestler tests
|
2022-10-21 05:12:10 -03:00 |
Rekai Nyangadzayi Musuka
|
696cc1b359
|
feat(cpu): decode and implement all necessary ARM CPU instructions
|
2022-10-21 05:12:10 -03:00 |
Rekai Nyangadzayi Musuka
|
151de2eab4
|
feat(cpu): implement ARM SWP and SWPB
|
2022-10-21 05:12:10 -03:00 |
Rekai Nyangadzayi Musuka
|
e7f6464564
|
fix: resolve off by n * 2 when accessing Palette during BG Mode 4
|
2022-10-21 05:12:09 -03:00 |
Rekai Nyangadzayi Musuka
|
da681c946e
|
feat(cpu): Implement Multiply Long ARM instructions
|
2022-10-21 05:12:09 -03:00 |
Rekai Nyangadzayi Musuka
|
e0e43eece5
|
fix: no buttons are pressed by default
|
2022-10-21 05:12:09 -03:00 |
Rekai Nyangadzayi Musuka
|
7013389288
|
feat(cpu): implement format 18 THUMB instructions
|
2022-10-21 05:12:09 -03:00 |
Rekai Nyangadzayi Musuka
|
443520ecae
|
chore: more detailed panic message
|
2022-10-21 05:12:09 -03:00 |
Rekai Nyangadzayi Musuka
|
96d7285111
|
feat(cpu): implement format 10 THUMB instructions
|
2022-10-21 05:12:08 -03:00 |
Rekai Nyangadzayi Musuka
|
7e6fc44191
|
feat(cpu): implement SWP
|
2022-10-21 05:12:08 -03:00 |
Rekai Nyangadzayi Musuka
|
9cb4ebaa7f
|
fix(cpu): perform MUL with u64s, throw away upper 32 bits
|
2022-10-21 05:12:08 -03:00 |
Rekai Nyangadzayi Musuka
|
3e4d7e7ed8
|
feat: implement keyboard input
|
2022-10-21 05:12:08 -03:00 |
Rekai Nyangadzayi Musuka
|
3a6951d93d
|
chore: don't panic on unsupported BG mode
|
2022-10-21 05:12:08 -03:00 |
Rekai Nyangadzayi Musuka
|
391096872e
|
chore: tempoarily disable fps counter
|
2022-10-21 05:12:08 -03:00 |
Rekai Nyangadzayi Musuka
|
eebf6fcae4
|
chore: zero-initialize VRAM
|
2022-10-21 05:12:07 -03:00 |
Rekai Nyangadzayi Musuka
|
8b7223cf35
|
chore: stub KeyInput I/O register
|
2022-10-21 05:12:07 -03:00 |
Rekai Nyangadzayi Musuka
|
e1fec48a0e
|
fix(cpu): properly decode multiply instructions
|
2022-10-21 05:12:07 -03:00 |
Rekai Nyangadzayi Musuka
|
0778ee8dd7
|
feat(cpu): implement ARM multiply instructions
|
2022-10-21 05:12:07 -03:00 |
Rekai Nyangadzayi Musuka
|
14d5160674
|
fix: allow 32-bit writes to DISPCNT
|
2022-10-21 05:12:07 -03:00 |
Rekai Nyangadzayi Musuka
|
eabf787305
|
fix(cpu): properly decode ldm stm thumb instructions
|
2022-10-21 05:12:07 -03:00 |
Rekai Nyangadzayi Musuka
|
980e4ff5dd
|
fix(cpu): properly decode THUMB PUSH and POP at comptime
|
2022-10-21 05:12:06 -03:00 |
Rekai Nyangadzayi Musuka
|
1ac193c506
|
fix(cpu): don't ignore 11th bit of THUMB BL offset
|
2022-10-21 05:12:06 -03:00 |
Rekai Nyangadzayi Musuka
|
d6ed071bc6
|
feat(cpu): implement thumb push / pop and stub format 13 thumb instrs
|
2022-10-21 05:12:06 -03:00 |
Rekai Nyangadzayi Musuka
|
a3d53d40fb
|
feat(cpu): implement THUMB format 9 loads / stores
|
2022-10-21 05:12:06 -03:00 |
Rekai Nyangadzayi Musuka
|
a17dfbe41f
|
fix(cpu): resolve issues with unexpected PC value in THUMB
|
2022-10-21 05:12:06 -03:00 |
Rekai Nyangadzayi Musuka
|
b9a81baa47
|
feat(cpu): implement THUMB ldmia stmia
|
2022-10-21 05:12:06 -03:00 |
Rekai Nyangadzayi Musuka
|
97b236225e
|
chore: implement THUMB format 4 instructions
|
2022-10-21 05:12:05 -03:00 |