chore(cpu): refactor ARM functions to make room for THUMB

src/cpu.zig

@@ -1,19 +1,19 @@
 const std = @import("std");
 const util = @import("util.zig");
 
-const BarrelShifter = @import("cpu/barrel_shifter.zig");
+const BarrelShifter = @import("cpu/arm/barrel_shifter.zig");
 const Bus = @import("Bus.zig");
 const Bit = @import("bitfield").Bit;
 const Bitfield = @import("bitfield").Bitfield;
 const Scheduler = @import("scheduler.zig").Scheduler;
 
-const dataProcessing = @import("cpu/data_processing.zig").dataProcessing;
+const dataProcessing = @import("cpu/arm/data_processing.zig").dataProcessing;
-const psrTransfer = @import("cpu/psr_transfer.zig").psrTransfer;
+const psrTransfer = @import("cpu/arm/psr_transfer.zig").psrTransfer;
-const singleDataTransfer = @import("cpu/single_data_transfer.zig").singleDataTransfer;
+const singleDataTransfer = @import("cpu/arm/single_data_transfer.zig").singleDataTransfer;
-const halfAndSignedDataTransfer = @import("cpu/half_signed_data_transfer.zig").halfAndSignedDataTransfer;
+const halfAndSignedDataTransfer = @import("cpu/arm/half_signed_data_transfer.zig").halfAndSignedDataTransfer;
-const blockDataTransfer = @import("cpu/block_data_transfer.zig").blockDataTransfer;
+const blockDataTransfer = @import("cpu/arm/block_data_transfer.zig").blockDataTransfer;
-const branch = @import("cpu/branch.zig").branch;
+const branch = @import("cpu/arm/branch.zig").branch;
-const branchAndExchange = @import("cpu/branch.zig").branchAndExchange;
+const branchAndExchange = @import("cpu/arm/branch.zig").branchAndExchange;
 
 pub const InstrFn = fn (*Arm7tdmi, *Bus, u32) void;
 const arm_lut: [0x1000]InstrFn = populate();

src/cpu/arm/barrel_shifter.zig

@@ -1,7 +1,7 @@
 const std = @import("std");
 
-const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
-const CPSR = @import("../cpu.zig").PSR;
+const CPSR = @import("../../cpu.zig").PSR;
 
 pub fn exec(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
     var shift_amt: u8 = undefined;

src/cpu/arm/block_data_transfer.zig

@@ -1,8 +1,8 @@
 const std = @import("std");
 
-const Bus = @import("../Bus.zig");
+const Bus = @import("../../Bus.zig");
-const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
-const InstrFn = @import("../cpu.zig").InstrFn;
+const InstrFn = @import("../../cpu.zig").InstrFn;
 
 pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, comptime W: bool, comptime L: bool) InstrFn {
     return struct {

src/cpu/arm/branch.zig

@@ -1,9 +1,9 @@
 const std = @import("std");
-const util = @import("../util.zig");
+const util = @import("../../util.zig");
 
-const Bus = @import("../Bus.zig");
+const Bus = @import("../../Bus.zig");
-const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
-const InstrFn = @import("../cpu.zig").InstrFn;
+const InstrFn = @import("../../cpu.zig").InstrFn;
 
 pub fn branch(comptime L: bool) InstrFn {
     return struct {

src/cpu/arm/data_processing.zig

@@ -1,9 +1,9 @@
 const std = @import("std");
 
 const BarrelShifter = @import("barrel_shifter.zig");
-const Bus = @import("../Bus.zig");
+const Bus = @import("../../Bus.zig");
-const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
-const InstrFn = @import("../cpu.zig").InstrFn;
+const InstrFn = @import("../../cpu.zig").InstrFn;
 
 pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn {
     return struct {

src/cpu/arm/half_signed_data_transfer.zig

@@ -1,9 +1,9 @@
 const std = @import("std");
-const util = @import("../util.zig");
+const util = @import("../../util.zig");
 
-const Bus = @import("../Bus.zig");
+const Bus = @import("../../Bus.zig");
-const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
-const InstrFn = @import("../cpu.zig").InstrFn;
+const InstrFn = @import("../../cpu.zig").InstrFn;
 
 pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn {
     return struct {

src/cpu/arm/psr_transfer.zig

@@ -1,8 +1,8 @@
 const std = @import("std");
 
-const Bus = @import("../Bus.zig");
+const Bus = @import("../../Bus.zig");
-const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
-const InstrFn = @import("../cpu.zig").InstrFn;
+const InstrFn = @import("../../cpu.zig").InstrFn;
 
 pub fn psrTransfer(comptime I: bool, comptime isSpsr: bool) InstrFn {
     return struct {

src/cpu/arm/single_data_transfer.zig

@@ -1,11 +1,11 @@
 const std = @import("std");
-const util = @import("../util.zig");
+const util = @import("../../util.zig");
 
 const BarrelShifter = @import("barrel_shifter.zig");
-const Bus = @import("../Bus.zig");
+const Bus = @import("../../Bus.zig");
-const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
-const CPSR = @import("../cpu.zig").PSR;
+const CPSR = @import("../../cpu.zig").PSR;
-const InstrFn = @import("../cpu.zig").InstrFn;
+const InstrFn = @import("../../cpu.zig").InstrFn;
 
 pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn {
     return struct {