97 lines
3.6 KiB
Zig
97 lines
3.6 KiB
Zig
const std = @import("std");
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const BarrelShifter = @import("barrel_shifter.zig");
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const Bus = @import("../../Bus.zig");
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const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
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const InstrFn = @import("../../cpu.zig").InstrFn;
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pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn {
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return struct {
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fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
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const rd = opcode >> 12 & 0xF;
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const rn = opcode >> 16 & 0xF;
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if (S and rd == 0xF) std.debug.panic("[CPU] Data Processing Instruction w/ S set and Rd == 15", .{});
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var op1: u32 = undefined;
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if (rn == 0xF) {
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op1 = cpu.fakePC();
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} else {
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op1 = cpu.r[rn];
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}
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var op2: u32 = undefined;
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if (I) {
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op2 = std.math.rotr(u32, opcode & 0xFF, (opcode >> 8 & 0xF) << 1);
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} else {
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op2 = BarrelShifter.exec(S, cpu, opcode);
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}
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switch (instrKind) {
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0x4 => {
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// ADD
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var result: u32 = undefined;
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const didOverflow = @addWithOverflow(u32, op1, op2, &result);
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cpu.r[rd] = result;
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if (S and rd != 0xF) {
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cpu.cpsr.n.write(result >> 31 & 1 == 1);
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cpu.cpsr.z.write(result == 0);
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cpu.cpsr.c.write(didOverflow);
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cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
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}
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},
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0x8 => {
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// TST
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const result = op1 & op2;
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cpu.cpsr.n.write(result >> 31 & 1 == 1);
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cpu.cpsr.z.write(result == 0);
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// Barrel Shifter should always calc CPSR C in TST
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if (!S) _ = BarrelShifter.exec(true, cpu, opcode);
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},
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0x9 => {
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// TEQ
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const result = op1 ^ op2;
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cpu.cpsr.n.write(result >> 31 & 1 == 1);
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cpu.cpsr.z.write(result == 0);
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// Barrel Shifter should always calc CPSR C in TEQ
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if (!S) _ = BarrelShifter.exec(true, cpu, opcode);
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},
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0xD => {
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// MOV
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cpu.r[rd] = op2;
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if (S and rd != 0xF) {
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cpu.cpsr.n.write(op2 >> 31 & 1 == 1);
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cpu.cpsr.z.write(op2 == 0);
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// C set by Barr0x15el Shifter, V is unnafected
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}
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},
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0xA => {
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// CMP
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const result = op1 -% op2;
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cpu.cpsr.n.write(result >> 31 & 1 == 1);
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cpu.cpsr.z.write(result == 0);
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cpu.cpsr.c.write(op2 <= op1);
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cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
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},
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0xC => {
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// ORR
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const result = op1 | op2;
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cpu.r[rd] = result;
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if (S and rd != 0xF) {
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cpu.cpsr.n.write(result >> 31 & 1 == 1);
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cpu.cpsr.z.write(result == 0);
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// C set by Barr0x15el Shifter, V is unnafected
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}
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},
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else => std.debug.panic("[CPU] TODO: implement data processing type {}", .{instrKind}),
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}
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}
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}.inner;
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}
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