Compare commits
1 Commits
main
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april-fool
| Author | SHA1 | Date |
|---|---|---|
 Rekai Nyangadzayi Musuka
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9844d657b0 |
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@ -4,7 +4,6 @@ on:
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push:
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paths:
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- "**.zig"
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- "dl_sdl2.ps1"
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branches:
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- main
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schedule:
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@ -15,17 +14,13 @@ jobs:
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build:
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strategy:
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matrix:
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os: [ubuntu-latest, windows-latest] # TODO: Figure out Apple Silicon macOS
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# os: [ubuntu-latest, windows-latest, macos-latest]
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os: [ubuntu-latest, windows-latest]
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runs-on: ${{matrix.os}}
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steps:
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- uses: goto-bus-stop/setup-zig@v2
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with:
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version: 0.13.0
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- run: |
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git config --global core.autocrlf false
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- uses: actions/checkout@v3
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with:
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submodules: recursive
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version: master
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- name: prepare-linux
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if: runner.os == 'Linux'
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run: |
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@ -34,19 +29,23 @@ jobs:
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- name: prepare-windows
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if: runner.os == 'Windows'
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run: |
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.\dl_sdl2.ps1
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vcpkg integrate install
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vcpkg install sdl2:x64-windows
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git config --global core.autocrlf false
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- name: prepare-macos
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if: runner.os == 'macOS'
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run: |
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brew install sdl2
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- uses: actions/checkout@v3
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with:
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submodules: recursive
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- name: build
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run: zig build -Doptimize=ReleaseSafe -Dcpu=baseline
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- name: upload
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uses: actions/upload-artifact@v3
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with:
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name: zba-${{matrix.os}}
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path: zig-out
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path: zig-out/bin
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lint:
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runs-on: ubuntu-latest
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steps:
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@ -55,5 +54,6 @@ jobs:
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submodules: recursive
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- uses: goto-bus-stop/setup-zig@v2
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with:
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version: 0.13.0
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- run: zig fmt --check {src,lib}/**/*.zig build.zig build.zig.zon
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version: master
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- run: zig fmt src/**/*.zig
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@ -1,7 +1,6 @@
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/.vscode
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/bin
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**/zig-cache
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**/.zig-cache
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**/zig-out
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/docs
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**/*.log
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@ -1,3 +1,27 @@
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[submodule "lib/SDL.zig"]
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path = lib/SDL.zig
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url = https://github.com/paoda/SDL.zig
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url = https://github.com/MasterQ32/SDL.zig
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[submodule "lib/zig-clap"]
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path = lib/zig-clap
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url = https://github.com/Hejsil/zig-clap
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[submodule "lib/known-folders"]
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path = lib/known-folders
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url = https://github.com/ziglibs/known-folders
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[submodule "lib/zig-datetime"]
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path = lib/zig-datetime
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url = https://github.com/frmdstryr/zig-datetime
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[submodule "lib/zig-toml"]
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path = lib/zig-toml
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url = https://github.com/aeronavery/zig-toml
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[submodule "lib/zba-gdbstub"]
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path = lib/zba-gdbstub
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url = https://git.musuka.dev/paoda/zba-gdbstub
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[submodule "lib/zgui"]
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path = lib/zgui
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url = https://git.musuka.dev/paoda/zgui
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[submodule "lib/nfd-zig"]
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path = lib/nfd-zig
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url = https://github.com/fabioarnold/nfd-zig
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[submodule "lib/zba-util"]
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path = lib/zba-util
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url = https://git.musuka.dev/paoda/zba-util.git
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109
README.md
109
README.md
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@ -19,30 +19,79 @@ This is a simple (read: incomplete) for-fun long-term project. I hope to get "mo
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## Usage
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ZBA supports both a CLI and a GUI. If running from the terminal, try using `zba --help` to see what you can do. If you want to use the GUI, feel free to just run `zba` without any arguments.
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As it currently exists, ZBA is run from the terminal. In your console of choice, type `./zba --help` to see what you can do.
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ZBA does not feature any BIOS HLE, so providing one will be necessary if a ROM makes use of it. Need one? Why not try using the open-source [Cult-Of-GBA BIOS](https://github.com/Cult-of-GBA/BIOS) written by [fleroviux](https://github.com/fleroviux) and [DenSinH](https://github.com/DenSinH)?
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I typically find myself typing `./zba -b ./bin/bios.bin` and then going to File -> Insert ROM to load the title of my choice.
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Need a BIOS? Why not try using the open-source [Cult-Of-GBA BIOS](https://github.com/Cult-of-GBA/BIOS) written by [fleroviux](https://github.com/fleroviux) and [DenSinH](https://github.com/DenSinH)?
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Finally it's worth noting that ZBA uses a TOML config file it'll store in your OS's data directory. See `example.toml` to learn about the defaults and what exactly you can mess around with.
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## Tests
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GBA Tests | [jsmolka](https://github.com/jsmolka/)
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--- | ---
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`arm.gba`, `thumb.gba` | PASS
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`memory.gba`, `bios.gba` | PASS
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`flash64.gba`, `flash128.gba` | PASS
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`sram.gba` | PASS
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`none.gba` | PASS
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`hello.gba`, `shades.gba`, `stripes.gba` | PASS
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`nes.gba` | PASS
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GBARoms | [DenSinH](https://github.com/DenSinH/)
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--- | ---
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`eeprom-test`, `flash-test` | PASS
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`midikey2freq` | PASS
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`swi-tests-random` | FAIL
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gba_tests | [destoer](https://github.com/destoer/)
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--- | ---
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`cond_invalid.gba` | PASS
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`dma_priority.gba` | PASS
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`hello_world.gba` | PASS
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`if_ack.gba` | PASS
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`line_timing.gba` | FAIL
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`lyc_midline.gba` | FAIL
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`window_midframe.gba` | FAIL
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GBA Test Collection | [ladystarbreeze](https://github.com/ladystarbreeze)
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--- | ---
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`retAddr.gba` | PASS
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`helloWorld.gba` | PASS
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`helloAudio.gba` | PASS
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FuzzARM | [DenSinH](https://github.com/DenSinH/)
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--- | ---
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`main.gba` | PASS
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arm7wrestler GBA Fixed | [destoer](https://github.com/destoer)
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--- | ---
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`armwrestler-gba-fixed.gba` | PASS
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## Resources
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- [GBATEK](https://problemkaputt.de/gbatek.htm)
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- [TONC](https://coranac.com/tonc/text/toc.htm)
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- [ARM Architecture Reference Manual](https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/third-party/ddi0100e_arm_arm.pdf)
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- [ARM7TDMI Data Sheet](https://www.dca.fee.unicamp.br/cursos/EA871/references/ARM/ARM7TDMIDataSheet.pdf)
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## Compiling
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Most recently built on Zig [v0.11.0](https://github.com/ziglang/zig/tree/0.11.0)
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Most recently built on Zig [v0.11.0-dev.2168+322ace70f](https://github.com/ziglang/zig/tree/322ace70f)
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### Dependencies
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Dependency | Source
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--- | ---
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SDL.zig | <https://github.com/MasterQ32/SDL.zig>
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known-folders | <https://github.com/ziglibs/known-folders>
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nfd-zig | <https://github.com/fabioarnold/nfd-zig>
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SDL.zig | <https://github.com/MasterQ32/SDL.zig>
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tomlz | <https://github.com/mattyhall/tomlz>
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zba-gdbstub | <https://github.com/paoda/zba-gdbstub>
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zba-util | <https://git.musuka.dev/paoda/zba-util>
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zgui | <https://github.com/michal-z/zig-gamedev/tree/main/libs/zgui>
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zig-clap | <https://github.com/Hejsil/zig-clap>
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zig-datetime | <https://github.com/frmdstryr/zig-datetime>
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`bitfield.zig` | [https://github.com/FlorenceOS/Florence](https://github.com/FlorenceOS/Florence/blob/aaa5a9e568/lib/util/bitfields.zig)
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zig-toml | <https://github.com/aeronavery/zig-toml>
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`bitfields.zig` | [https://github.com/FlorenceOS/Florence](https://github.com/FlorenceOS/Florence/blob/aaa5a9e568/lib/util/bitfields.zig)
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`gl.zig` | <https://github.com/MasterQ32/zig-opengl>
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Use `git submodule update --init` from the project root to pull the git relevant git submodules
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@ -55,42 +104,16 @@ Be sure to provide SDL2 using:
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`SDL.zig` will provide a helpful compile error if the zig compiler is unable to find SDL2.
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Once you've got all the dependencies, execute `zig build -Doptimize=ReleaseSafe`. The executable will be under `zig-out/bin` and the shared libraries (if enabled) under `zig-out/lib`. If working with shared libraries on windows, be sure to add all artifacts to the same directory. On Unix, you'll want to make use of `LD_PRELOAD`.
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Once you've got all the dependencies, execute `zig build -Doptimize=ReleaseSafe`. The executable is located at `zig-out/bin/`.
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## Controls
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Key | Button | | Key | Button
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--- | --- | --- | --- | ---
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<kbd>A</kbd> | L | | <kbd>S</kbd> | R
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<kbd>X</kbd> | A | | <kbd>Z</kbd> | B
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<kbd>Return</kbd> | Start | | <kbd>RShift</kbd> | Select
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Key | Button
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--- | ---
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<kbd>X</kbd> | A
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<kbd>Z</kbd> | B
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<kbd>A</kbd> | L
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<kbd>S</kbd> | R
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<kbd>Return</kbd> | Start
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<kbd>RShift</kbd> | Select
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Arrow Keys | D-Pad
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## Tests
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GBA Tests | [jsmolka](https://github.com/jsmolka/) | gba_tests | [destoer](https://github.com/destoer/)
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--- | --- | --- | ---
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`arm.gba`, `thumb.gba` | PASS | `cond_invalid.gba` | PASS
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`memory.gba`, `bios.gba` | PASS | `dma_priority.gba` | PASS
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`flash64.gba`, `flash128.gba` | PASS | `hello_world.gba` | PASS
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`sram.gba` | PASS | `if_ack.gba` | PASS
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`none.gba` | PASS | `line_timing.gba` | FAIL
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`hello.gba`, `shades.gba`, `stripes.gba` | PASS | `lyc_midline.gba` | FAIL
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`nes.gba` | PASS | `window_midframe.gba` | FAIL
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GBARoms | [DenSinH](https://github.com/DenSinH/) | GBA Test Collection | [ladystarbreeze](https://github.com/ladystarbreeze)
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--- | --- | --- | ---
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`eeprom-test`, `flash-test` | PASS | `retAddr.gba` | PASS
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`midikey2freq` | PASS | `helloWorld.gba` | PASS
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`swi-tests-random` | FAIL | `helloAudio.gba` | PASS
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FuzzARM | [DenSinH](https://github.com/DenSinH/) | arm7wrestler GBA Fixed | [destoer](https://github.com/destoer)
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--- | --- | --- | ---
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`main.gba` | PASS | `armwrestler-gba-fixed.gba` | PASS
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## Resources
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- [GBATEK](https://problemkaputt.de/gbatek.htm)
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- [TONC](https://coranac.com/tonc/text/toc.htm)
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- [ARM Architecture Reference Manual](https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/third-party/ddi0100e_arm_arm.pdf)
|
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- [ARM7TDMI Data Sheet](https://www.dca.fee.unicamp.br/cursos/EA871/references/ARM/ARM7TDMIDataSheet.pdf)
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85
build.zig
85
build.zig
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@ -1,16 +1,17 @@
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const std = @import("std");
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const builtin = @import("builtin");
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const sdl = @import("lib/SDL.zig/build.zig");
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const SemVer = std.SemanticVersion;
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const target_version = "0.13.0";
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const Sdk = @import("lib/SDL.zig/Sdk.zig");
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const gdbstub = @import("lib/zba-gdbstub/build.zig");
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const zgui = @import("lib/zgui/build.zig");
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const nfd = @import("lib/nfd-zig/build.zig");
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pub fn build(b: *std.Build) void {
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const actual_version = builtin.zig_version;
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if (comptime actual_version.order(SemVer.parse(target_version) catch unreachable) != .eq) {
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@compileError("ZBA must be built with Zig v" ++ target_version ++ ".");
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// Minimum Zig Version
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const min_ver = std.SemanticVersion.parse("0.11.0-dev.2168+322ace70f") catch return; // https://github.com/ziglang/zig/commit/322ace70f
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if (builtin.zig_version.order(min_ver).compare(.lt)) {
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std.log.err("{s}", .{b.fmt("Zig v{} does not meet the minimum version requirement. (Zig v{})", .{ builtin.zig_version, min_ver })});
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std.os.exit(1);
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}
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const target = b.standardTargetOptions(.{});
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@ -18,45 +19,65 @@ pub fn build(b: *std.Build) void {
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const exe = b.addExecutable(.{
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.name = "zba",
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.root_source_file = b.path("src/main.zig"),
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.root_source_file = .{ .path = "src/main.zig" },
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.target = target,
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.optimize = optimize,
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});
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const sdk = sdl.init(b, null, null);
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const zgui = b.dependency("zgui", .{ .shared = false, .with_implot = true, .backend = .sdl2_opengl3 });
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const imgui = zgui.artifact("imgui");
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exe.setMainPkgPath("."); // Necessary so that src/main.zig can embed example.toml
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exe.root_module.addImport("known_folders", b.dependency("known-folders", .{}).module("known-folders")); // https://github.com/ziglibs/known-folders
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exe.root_module.addImport("datetime", b.dependency("zig-datetime", .{}).module("zig-datetime")); // https://github.com/frmdstryr/zig-datetime
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exe.root_module.addImport("clap", b.dependency("zig-clap", .{}).module("clap")); // https://github.com/Hejsil/zig-clap
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exe.root_module.addImport("zba-util", b.dependency("zba-util", .{}).module("zba-util")); // https://git.musuka.dev/paoda/zba-util
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exe.root_module.addImport("tomlz", b.dependency("tomlz", .{}).module("tomlz")); // https://github.com/mattyhall/tomlz
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exe.root_module.addImport("arm32", b.dependency("arm32", .{}).module("arm32")); // https://git.musuka.dev/paoda/arm32
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exe.root_module.addImport("gdbstub", b.dependency("zba-gdbstub", .{}).module("zba-gdbstub")); // https://git.musuka.dev/paoda/gdbstub
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exe.root_module.addImport("nfd", b.dependency("nfd", .{}).module("nfd")); // https://github.com/fabioarnold/nfd-zig
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exe.root_module.addImport("zgui", zgui.module("root")); // https://git.musuka.dev/paoda/zgui
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exe.root_module.addImport("sdl2", sdk.getNativeModule()); // https://github.com/MasterQ32/SDL.zig
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// Known Folders (%APPDATA%, XDG, etc.)
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exe.addAnonymousModule("known_folders", .{ .source_file = .{ .path = "lib/known-folders/known-folders.zig" } });
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exe.root_module.addAnonymousImport("bitfield", .{ .root_source_file = b.path("lib/bitfield.zig") }); // https://github.com/FlorenceOS/
|
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exe.root_module.addAnonymousImport("gl", .{ .root_source_file = b.path("lib/gl.zig") }); // https://github.com/MasterQ32/zig-opengl
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exe.root_module.addAnonymousImport("example.toml", .{ .root_source_file = b.path("example.toml") });
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// DateTime Library
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exe.addAnonymousModule("datetime", .{ .source_file = .{ .path = "lib/zig-datetime/src/main.zig" } });
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sdk.link(exe, .dynamic, .SDL2);
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sdk.link(imgui, .dynamic, .SDL2);
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exe.linkLibrary(imgui);
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// Bitfield type from FlorenceOS: https://github.com/FlorenceOS/
|
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exe.addAnonymousModule("bitfield", .{ .source_file = .{ .path = "lib/bitfield.zig" } });
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b.installArtifact(exe);
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// Argument Parsing Library
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exe.addAnonymousModule("clap", .{ .source_file = .{ .path = "lib/zig-clap/clap.zig" } });
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const run_cmd = b.addRunArtifact(exe);
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// TOML Library
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exe.addAnonymousModule("toml", .{ .source_file = .{ .path = "lib/zig-toml/src/toml.zig" } });
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// OpenGL 3.3 Bindings
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exe.addAnonymousModule("gl", .{ .source_file = .{ .path = "lib/gl.zig" } });
|
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|
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// ZBA utility code
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exe.addAnonymousModule("zba-util", .{ .source_file = .{ .path = "lib/zba-util/src/lib.zig" } });
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|
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// gdbstub
|
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exe.addModule("gdbstub", gdbstub.getModule(b));
|
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|
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// NativeFileDialog(ue) Bindings
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exe.linkLibrary(nfd.makeLib(b, target, optimize));
|
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exe.addModule("nfd", nfd.getModule(b));
|
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|
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// Zig SDL Bindings: https://github.com/MasterQ32/SDL.zig
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const sdk = Sdk.init(b, null);
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sdk.link(exe, .dynamic);
|
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exe.addModule("sdl2", sdk.getNativeModule());
|
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|
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// Dear ImGui bindings
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|
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// .shared option should stay in sync with SDL.zig call above where true == .dynamic, and false == .static
|
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const zgui_pkg = zgui.package(b, target, optimize, .{ .options = .{ .backend = .sdl2_opengl3, .shared = true } });
|
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zgui_pkg.link(exe);
|
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|
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exe.install();
|
||||
|
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const run_cmd = exe.run();
|
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run_cmd.step.dependOn(b.getInstallStep());
|
||||
if (b.args) |args| run_cmd.addArgs(args);
|
||||
if (b.args) |args| {
|
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run_cmd.addArgs(args);
|
||||
}
|
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|
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const run_step = b.step("run", "Run the app");
|
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run_step.dependOn(&run_cmd.step);
|
||||
|
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const exe_tests = b.addTest(.{
|
||||
.root_source_file = b.path("src/main.zig"),
|
||||
.root_source_file = .{ .path = "src/main.zig" },
|
||||
.target = target,
|
||||
.optimize = optimize,
|
||||
});
|
||||
|
|
|
|||
|
|
@ -1,49 +0,0 @@
|
|||
.{
|
||||
.name = "zba",
|
||||
.version = "0.1.0",
|
||||
.paths = .{
|
||||
"build.zig",
|
||||
"build.zig.zon",
|
||||
"lib/bitfield.zig",
|
||||
"lib/gl.zig",
|
||||
"src",
|
||||
},
|
||||
.dependencies = .{
|
||||
.nfd = .{
|
||||
.url = "git+https://github.com/paoda/nfd-zig#ad81729d33da30d5f4fd23718debec48245121ca",
|
||||
.hash = "1220a679380847513262c8c5c474d4a415f9ecc4921c8c6aefbdbdce66cf2aa19ceb",
|
||||
},
|
||||
.@"known-folders" = .{
|
||||
.url = "git+https://github.com/ziglibs/known-folders#1cceeb70e77dec941a4178160ff6c8d05a74de6f",
|
||||
.hash = "12205f5e7505c96573f6fc5144592ec38942fb0a326d692f9cddc0c7dd38f9028f29",
|
||||
},
|
||||
.@"zig-datetime" = .{
|
||||
.url = "git+https://github.com/frmdstryr/zig-datetime#70aebf28fb3e137cd84123a9349d157a74708721",
|
||||
.hash = "122077215ce36e125a490e59ec1748ffd4f6ba00d4d14f7308978e5360711d72d77f",
|
||||
},
|
||||
.@"zig-clap" = .{
|
||||
.url = "git+https://github.com/Hejsil/zig-clap#c0193e9247335a6c1688b946325060289405de2a",
|
||||
.hash = "12207ee987ce045596cb992cfb15b0d6d9456e50d4721c3061c69dabc2962053644d",
|
||||
},
|
||||
.@"zba-util" = .{
|
||||
.url = "git+https://git.musuka.dev/paoda/zba-util#bf0e744047ce1ec90172dbcc0c72bfcc29a063e3",
|
||||
.hash = "1220d044ecfbeacc3b3cebeff131d587e24167d61435a3cb96dffd4d4521bb06aed0",
|
||||
},
|
||||
.@"zba-gdbstub" = .{
|
||||
.url = "git+https://git.musuka.dev/paoda/zba-gdbstub#9a50607d5f48293f950a4e823344f2bc24582a5a",
|
||||
.hash = "1220ac267744ed2a735f03c4620d7c6210fbd36d7bfb2b376ddc3436faebadee0f61",
|
||||
},
|
||||
.tomlz = .{
|
||||
.url = "git+https://github.com/paoda/tomlz#9a16dd53927ef2012478b6494bafb4475e44f4c9",
|
||||
.hash = "12204f922cab84980e36b5c058d354ec0ee169bda401c8e0e80a463580349b476569",
|
||||
},
|
||||
.arm32 = .{
|
||||
.url = "git+https://git.musuka.dev/paoda/arm32#814d081ea0983bc48841a6baad7158c157b17ad6",
|
||||
.hash = "12203c3dacf3a7aa7aee5fc5763dd7b40399bd1c34d1483330b6bd5a76bffef22d82",
|
||||
},
|
||||
.zgui = .{
|
||||
.url = "git+https://git.musuka.dev/paoda/zgui#7f8d05101e96c64314d7926c80ee157dcb89da4e",
|
||||
.hash = "1220bd81a1c7734892b1d4233ed047710487787873c85dd5fc76d1764a331ed2ff43",
|
||||
},
|
||||
},
|
||||
}
|
||||
36
dl_sdl2.ps1
36
dl_sdl2.ps1
|
|
@ -1,36 +0,0 @@
|
|||
$SDL2Version = "2.30.0"
|
||||
$ArchiveFile = ".\SDL2-devel-mingw.zip"
|
||||
$Json = @"
|
||||
{
|
||||
"x86_64-windows-gnu": {
|
||||
"include": ".build_config\\SDL2\\include",
|
||||
"libs": ".build_config\\SDL2\\lib",
|
||||
"bin": ".build_config\\SDL2\\bin"
|
||||
}
|
||||
}
|
||||
"@
|
||||
|
||||
New-Item -Force -ItemType Directory -Path .\.build_config
|
||||
Set-Location -Path .build_config -PassThru
|
||||
|
||||
if (!(Test-Path -PathType Leaf $ArchiveFile)) {
|
||||
Invoke-WebRequest "https://github.com/libsdl-org/SDL/releases/download/release-$SDL2Version/SDL2-devel-$SDL2Version-mingw.zip" -OutFile $ArchiveFile
|
||||
}
|
||||
|
||||
Expand-Archive $ArchiveFile
|
||||
|
||||
if (Test-Path -PathType Container .\SDL2) {
|
||||
Remove-Item -Recurse .\SDL2
|
||||
}
|
||||
|
||||
New-Item -Force -ItemType Directory -Path .\SDL2
|
||||
Get-ChildItem -Path ".\SDL2-devel-mingw\SDL2-$SDL2Version\x86_64-w64-mingw32" | Move-Item -Destination .\SDL2
|
||||
|
||||
# #include <SDL.h>
|
||||
Move-Item -Force -Path .\SDL2\include\SDL2\* -Destination .\SDL2\include
|
||||
Remove-Item -Force .\SDL2\include\SDL2
|
||||
|
||||
New-Item -Force .\sdl.json -Value $Json
|
||||
|
||||
Remove-Item -Recurse .\SDL2-devel-mingw
|
||||
Set-Location -Path .. -PassThru
|
||||
|
|
@ -1,4 +1,4 @@
|
|||
[host]
|
||||
[Host]
|
||||
# Using nearest-neighbour scaling, how many times the native resolution
|
||||
# of the game bow should the screen be?
|
||||
win_scale = 3
|
||||
|
|
@ -7,7 +7,7 @@ vsync = true
|
|||
# Mute ZBA
|
||||
mute = false
|
||||
|
||||
[guest]
|
||||
[Guest]
|
||||
# Sync Emulation to Audio
|
||||
audio_sync = true
|
||||
# Sync Emulation to Video
|
||||
|
|
@ -17,7 +17,7 @@ force_rtc = false
|
|||
# Skip BIOS
|
||||
skip_bios = false
|
||||
|
||||
[debug]
|
||||
[Debug]
|
||||
# Enable detailed CPU logs
|
||||
cpu_trace = false
|
||||
# When false and builtin.mode == .Debug, ZBA will panic
|
||||
|
|
|
|||
|
|
@ -1 +1 @@
|
|||
Subproject commit fac81ec499cfd64da7b846de27f6db4a0d4943bf
|
||||
Subproject commit cc3b023f50e7b9ad690f1047a19a50feff4d1301
|
||||
|
|
@ -26,13 +26,13 @@ fn BitType(comptime FieldType: type, comptime ValueType: type, comptime shamt: u
|
|||
}
|
||||
|
||||
pub fn read(self: anytype) ValueType {
|
||||
return @bitCast(@as(u1, @truncate(self.bits.field().* >> shamt)));
|
||||
return @bitCast(ValueType, @truncate(u1, self.bits.field().* >> shamt));
|
||||
}
|
||||
|
||||
// Since these are mostly used with MMIO, I want to avoid
|
||||
// reading the memory just to write it again, also races
|
||||
pub fn write(self: anytype, val: ValueType) void {
|
||||
if (@as(bool, @bitCast(val))) {
|
||||
if (@bitCast(bool, val)) {
|
||||
self.set();
|
||||
} else {
|
||||
self.unset();
|
||||
|
|
@ -67,17 +67,17 @@ pub fn Bitfield(comptime FieldType: type, comptime shamt: usize, comptime num_bi
|
|||
dummy: FieldType,
|
||||
|
||||
fn field(self: anytype) PtrCastPreserveCV(@This(), @TypeOf(self), FieldType) {
|
||||
return @ptrCast(self);
|
||||
return @ptrCast(PtrCastPreserveCV(@This(), @TypeOf(self), FieldType), self);
|
||||
}
|
||||
|
||||
pub fn write(self: anytype, val: ValueType) void {
|
||||
self.field().* &= ~self_mask;
|
||||
self.field().* |= @as(FieldType, @intCast(val)) << shamt;
|
||||
self.field().* |= @intCast(FieldType, val) << shamt;
|
||||
}
|
||||
|
||||
pub fn read(self: anytype) ValueType {
|
||||
const val: FieldType = self.field().*;
|
||||
return @intCast((val & self_mask) >> shamt);
|
||||
return @intCast(ValueType, (val & self_mask) >> shamt);
|
||||
}
|
||||
};
|
||||
}
|
||||
|
|
|
|||
688
lib/gl.zig
688
lib/gl.zig
File diff suppressed because it is too large
Load Diff
|
|
@ -0,0 +1 @@
|
|||
Subproject commit d13ba6137084e55f873f6afb67447fe8906cc951
|
||||
|
|
@ -0,0 +1 @@
|
|||
Subproject commit 5e5098bcaf2643d35199ce556da8091626a4d2ef
|
||||
|
|
@ -0,0 +1 @@
|
|||
Subproject commit 215e053b9ace6e6e561b64cb06e2516021f76897
|
||||
|
|
@ -0,0 +1 @@
|
|||
Subproject commit d5e66caf2180324d83ad9be30e887849f5ed74da
|
||||
|
|
@ -0,0 +1 @@
|
|||
Subproject commit 5b2b64a9dedd91f0cbf69ccb7a0a5ebf1fdf1691
|
||||
|
|
@ -0,0 +1 @@
|
|||
Subproject commit 6310cbd57684d62c4fb6ac73e0fa9883fab402c8
|
||||
|
|
@ -0,0 +1 @@
|
|||
Subproject commit b570d61187a64a32067720aa0c2385061685428a
|
||||
|
|
@ -0,0 +1 @@
|
|||
Subproject commit 016b8bcf98e50ae9408f6a9606bbec5a9bc6f677
|
||||
|
|
@ -1,5 +1,5 @@
|
|||
const std = @import("std");
|
||||
const tomlz = @import("tomlz");
|
||||
const toml = @import("toml");
|
||||
|
||||
const Allocator = std.mem.Allocator;
|
||||
|
||||
|
|
@ -7,7 +7,6 @@ const log = std.log.scoped(.Config);
|
|||
var state: Config = .{};
|
||||
|
||||
const Config = struct {
|
||||
// FIXME: tomlz expects these to be case sensitive
|
||||
host: Host = .{},
|
||||
guest: Guest = .{},
|
||||
debug: Debug = .{},
|
||||
|
|
@ -59,5 +58,29 @@ pub fn load(allocator: Allocator, file_path: []const u8) !void {
|
|||
const contents = try config_file.readToEndAlloc(allocator, try config_file.getEndPos());
|
||||
defer allocator.free(contents);
|
||||
|
||||
state = try tomlz.parser.decode(Config, allocator, contents);
|
||||
var parser = try toml.parseFile(allocator, file_path);
|
||||
defer parser.deinit();
|
||||
|
||||
const table = try parser.parse();
|
||||
defer table.deinit();
|
||||
|
||||
// TODO: Report unknown config options
|
||||
|
||||
if (table.keys.get("Host")) |host| {
|
||||
if (host.Table.keys.get("win_scale")) |scale| state.host.win_scale = scale.Integer;
|
||||
if (host.Table.keys.get("vsync")) |vsync| state.host.vsync = vsync.Boolean;
|
||||
if (host.Table.keys.get("mute")) |mute| state.host.mute = mute.Boolean;
|
||||
}
|
||||
|
||||
if (table.keys.get("Guest")) |guest| {
|
||||
if (guest.Table.keys.get("audio_sync")) |sync| state.guest.audio_sync = sync.Boolean;
|
||||
if (guest.Table.keys.get("video_sync")) |sync| state.guest.video_sync = sync.Boolean;
|
||||
if (guest.Table.keys.get("force_rtc")) |forced| state.guest.force_rtc = forced.Boolean;
|
||||
if (guest.Table.keys.get("skip_bios")) |skip| state.guest.skip_bios = skip.Boolean;
|
||||
}
|
||||
|
||||
if (table.keys.get("Debug")) |debug| {
|
||||
if (debug.Table.keys.get("cpu_trace")) |trace| state.debug.cpu_trace = trace.Boolean;
|
||||
if (debug.Table.keys.get("unhandled_io")) |unhandled| state.debug.unhandled_io = unhandled.Boolean;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,6 @@
|
|||
const std = @import("std");
|
||||
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
|
||||
const Bios = @import("bus/Bios.zig");
|
||||
const Ewram = @import("bus/Ewram.zig");
|
||||
const GamePak = @import("bus/GamePak.zig");
|
||||
|
|
@ -98,7 +98,7 @@ pub fn deinit(self: *Self) void {
|
|||
// This is so I can deallocate the original `allocator.alloc`. I have to re-make the type
|
||||
// since I'm not keeping it around, This is very jank and bad though
|
||||
// FIXME: please figure out another way
|
||||
self.allocator.free(@as([*]const ?*anyopaque, @ptrCast(self.read_table[0..]))[0 .. 3 * table_len]);
|
||||
self.allocator.free(@ptrCast([*]const ?*anyopaque, self.read_table[0..])[0 .. 3 * table_len]);
|
||||
self.* = undefined;
|
||||
}
|
||||
|
||||
|
|
@ -147,7 +147,7 @@ fn fillReadTable(self: *Self, table: *[table_len]?*const anyopaque) void {
|
|||
const vramMirror = @import("ppu/Vram.zig").mirror;
|
||||
|
||||
for (table, 0..) |*ptr, i| {
|
||||
const addr: u32 = @intCast(page_size * i);
|
||||
const addr = @intCast(u32, page_size * i);
|
||||
|
||||
ptr.* = switch (addr) {
|
||||
// General Internal Memory
|
||||
|
|
@ -174,7 +174,7 @@ fn fillWriteTable(self: *Self, comptime T: type, table: *[table_len]?*const anyo
|
|||
const vramMirror = @import("ppu/Vram.zig").mirror;
|
||||
|
||||
for (table, 0..) |*ptr, i| {
|
||||
const addr: u32 = @intCast(page_size * i);
|
||||
const addr = @intCast(u32, page_size * i);
|
||||
|
||||
ptr.* = switch (addr) {
|
||||
// General Internal Memory
|
||||
|
|
@ -227,7 +227,7 @@ fn fillReadTableExternal(self: *Self, addr: u32) ?*anyopaque {
|
|||
// We are using a "small" EEPROM which means that if the below check is true
|
||||
// (that is, we're in the 0xD address page) then we must handle at least one
|
||||
// address in this page in slowmem
|
||||
if (@as(u4, @truncate(addr >> 24)) == 0xD) return null;
|
||||
if (@truncate(u4, addr >> 24) == 0xD) return null;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -257,7 +257,7 @@ fn openBus(self: *const Self, comptime T: type, address: u32) T {
|
|||
// the most recently fetched instruction by the pipeline
|
||||
if (!self.cpu.cpsr.t.read()) break :blk self.cpu.pipe.stage[1].?;
|
||||
|
||||
const page: u8 = @truncate(r15 >> 24);
|
||||
const page = @truncate(u8, r15 >> 24);
|
||||
|
||||
// PC + 2 = stage[0]
|
||||
// PC + 4 = stage[1]
|
||||
|
|
@ -266,7 +266,7 @@ fn openBus(self: *const Self, comptime T: type, address: u32) T {
|
|||
switch (page) {
|
||||
// EWRAM, PALRAM, VRAM, and Game ROM (16-bit)
|
||||
0x02, 0x05, 0x06, 0x08...0x0D => {
|
||||
const halfword: u32 = @as(u16, @truncate(self.cpu.pipe.stage[1].?));
|
||||
const halfword: u32 = @truncate(u16, self.cpu.pipe.stage[1].?);
|
||||
break :blk halfword << 16 | halfword;
|
||||
},
|
||||
|
||||
|
|
@ -277,8 +277,8 @@ fn openBus(self: *const Self, comptime T: type, address: u32) T {
|
|||
const aligned = address & 3 == 0b00;
|
||||
|
||||
// TODO: What to do on PC + 6?
|
||||
const high: u32 = if (aligned) self.dbgRead(u16, r15 + 4) else @as(u16, @truncate(self.cpu.pipe.stage[1].?));
|
||||
const low: u32 = @as(u16, @truncate(self.cpu.pipe.stage[@intFromBool(aligned)].?));
|
||||
const high: u32 = if (aligned) self.dbgRead(u16, r15 + 4) else @truncate(u16, self.cpu.pipe.stage[1].?);
|
||||
const low: u32 = @truncate(u16, self.cpu.pipe.stage[@boolToInt(aligned)].?);
|
||||
|
||||
break :blk high << 16 | low;
|
||||
},
|
||||
|
|
@ -289,8 +289,8 @@ fn openBus(self: *const Self, comptime T: type, address: u32) T {
|
|||
// Unaligned: (PC + 4) | (PC + 2)
|
||||
const aligned = address & 3 == 0b00;
|
||||
|
||||
const high: u32 = @as(u16, @truncate(self.cpu.pipe.stage[1 - @intFromBool(aligned)].?));
|
||||
const low: u32 = @as(u16, @truncate(self.cpu.pipe.stage[@intFromBool(aligned)].?));
|
||||
const high: u32 = @truncate(u16, self.cpu.pipe.stage[1 - @boolToInt(aligned)].?);
|
||||
const low: u32 = @truncate(u16, self.cpu.pipe.stage[@boolToInt(aligned)].?);
|
||||
|
||||
break :blk high << 16 | low;
|
||||
},
|
||||
|
|
@ -301,7 +301,7 @@ fn openBus(self: *const Self, comptime T: type, address: u32) T {
|
|||
}
|
||||
};
|
||||
|
||||
return @truncate(word);
|
||||
return @truncate(T, word);
|
||||
}
|
||||
|
||||
pub fn read(self: *Self, comptime T: type, unaligned_address: u32) T {
|
||||
|
|
@ -310,14 +310,15 @@ pub fn read(self: *Self, comptime T: type, unaligned_address: u32) T {
|
|||
const offset = unaligned_address & (page_size - 1);
|
||||
|
||||
// whether or not we do this in slowmem or fastmem, we should advance the scheduler
|
||||
self.sched.tick += timings[@intFromBool(T == u32)][@as(u4, @truncate(unaligned_address >> 24))];
|
||||
self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, unaligned_address >> 24)];
|
||||
|
||||
// We're doing some serious out-of-bounds open-bus reads
|
||||
if (page >= table_len) return self.openBus(T, unaligned_address);
|
||||
|
||||
if (self.read_table[page]) |some_ptr| {
|
||||
// We have a pointer to a page, cast the pointer to it's underlying type
|
||||
const ptr: [*]const T = @ptrCast(@alignCast(some_ptr));
|
||||
const Ptr = [*]const T;
|
||||
const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
|
||||
|
||||
// Note: We don't check array length, since we force align the
|
||||
// lower bits of the address as the GBA would
|
||||
|
|
@ -337,7 +338,8 @@ pub fn dbgRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
|
|||
|
||||
if (self.read_table[page]) |some_ptr| {
|
||||
// We have a pointer to a page, cast the pointer to it's underlying type
|
||||
const ptr: [*]const T = @ptrCast(@alignCast(some_ptr));
|
||||
const Ptr = [*]const T;
|
||||
const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
|
||||
|
||||
// Note: We don't check array length, since we force align the
|
||||
// lower bits of the address as the GBA would
|
||||
|
|
@ -350,7 +352,7 @@ pub fn dbgRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
|
|||
fn slowRead(self: *Self, comptime T: type, unaligned_address: u32) T {
|
||||
@setCold(true);
|
||||
|
||||
const page: u8 = @truncate(unaligned_address >> 24);
|
||||
const page = @truncate(u8, unaligned_address >> 24);
|
||||
const address = forceAlign(T, unaligned_address);
|
||||
|
||||
return switch (page) {
|
||||
|
|
@ -378,7 +380,7 @@ fn slowRead(self: *Self, comptime T: type, unaligned_address: u32) T {
|
|||
}
|
||||
|
||||
fn dbgSlowRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
|
||||
const page: u8 = @truncate(unaligned_address >> 24);
|
||||
const page = @truncate(u8, unaligned_address >> 24);
|
||||
const address = forceAlign(T, unaligned_address);
|
||||
|
||||
return switch (page) {
|
||||
|
|
@ -424,21 +426,22 @@ pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) vo
|
|||
const offset = unaligned_address & (page_size - 1);
|
||||
|
||||
// whether or not we do this in slowmem or fastmem, we should advance the scheduler
|
||||
self.sched.tick += timings[@intFromBool(T == u32)][@as(u4, @truncate(unaligned_address >> 24))];
|
||||
self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, unaligned_address >> 24)];
|
||||
|
||||
// We're doing some serious out-of-bounds open-bus writes, they do nothing though
|
||||
if (page >= table_len) return;
|
||||
|
||||
if (self.write_tables[@intFromBool(T == u8)][page]) |some_ptr| {
|
||||
if (self.write_tables[@boolToInt(T == u8)][page]) |some_ptr| {
|
||||
// We have a pointer to a page, cast the pointer to it's underlying type
|
||||
const ptr: [*]T = @ptrCast(@alignCast(some_ptr));
|
||||
const Ptr = [*]T;
|
||||
const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
|
||||
|
||||
// Note: We don't check array length, since we force align the
|
||||
// lower bits of the address as the GBA would
|
||||
ptr[forceAlign(T, offset) / @sizeOf(T)] = value;
|
||||
} else {
|
||||
// we can return early if this is an 8-bit OAM write
|
||||
if (T == u8 and @as(u8, @truncate(unaligned_address >> 24)) == 0x07) return;
|
||||
if (T == u8 and @truncate(u8, unaligned_address >> 24) == 0x07) return;
|
||||
|
||||
self.slowWrite(T, unaligned_address, value);
|
||||
}
|
||||
|
|
@ -453,16 +456,17 @@ pub fn dbgWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T)
|
|||
// We're doing some serious out-of-bounds open-bus writes, they do nothing though
|
||||
if (page >= table_len) return;
|
||||
|
||||
if (self.write_tables[@intFromBool(T == u8)][page]) |some_ptr| {
|
||||
if (self.write_tables[@boolToInt(T == u8)][page]) |some_ptr| {
|
||||
// We have a pointer to a page, cast the pointer to it's underlying type
|
||||
const ptr: [*]T = @ptrCast(@alignCast(some_ptr));
|
||||
const Ptr = [*]T;
|
||||
const ptr = @ptrCast(Ptr, @alignCast(@alignOf(std.meta.Child(Ptr)), some_ptr));
|
||||
|
||||
// Note: We don't check array length, since we force align the
|
||||
// lower bits of the address as the GBA would
|
||||
ptr[forceAlign(T, offset) / @sizeOf(T)] = value;
|
||||
} else {
|
||||
// we can return early if this is an 8-bit OAM write
|
||||
if (T == u8 and @as(u8, @truncate(unaligned_address >> 24)) == 0x07) return;
|
||||
if (T == u8 and @truncate(u8, unaligned_address >> 24) == 0x07) return;
|
||||
|
||||
self.dbgSlowWrite(T, unaligned_address, value);
|
||||
}
|
||||
|
|
@ -471,7 +475,7 @@ pub fn dbgWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T)
|
|||
fn slowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
|
||||
@setCold(true);
|
||||
|
||||
const page: u8 = @truncate(unaligned_address >> 24);
|
||||
const page = @truncate(u8, unaligned_address >> 24);
|
||||
const address = forceAlign(T, unaligned_address);
|
||||
|
||||
switch (page) {
|
||||
|
|
@ -488,7 +492,7 @@ fn slowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) vo
|
|||
|
||||
// External Memory (Game Pak)
|
||||
0x08...0x0D => self.pak.write(T, self.dma[3].word_count, address, value),
|
||||
0x0E...0x0F => self.pak.backup.write(unaligned_address, @truncate(rotr(T, value, 8 * rotateBy(T, unaligned_address)))),
|
||||
0x0E...0x0F => self.pak.backup.write(unaligned_address, @truncate(u8, rotr(T, value, 8 * rotateBy(T, unaligned_address)))),
|
||||
else => {},
|
||||
}
|
||||
}
|
||||
|
|
@ -496,7 +500,7 @@ fn slowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) vo
|
|||
fn dbgSlowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
|
||||
@setCold(true);
|
||||
|
||||
const page: u8 = @truncate(unaligned_address >> 24);
|
||||
const page = @truncate(u8, unaligned_address >> 24);
|
||||
const address = forceAlign(T, unaligned_address);
|
||||
|
||||
switch (page) {
|
||||
|
|
|
|||
|
|
@ -3,8 +3,7 @@ const SDL = @import("sdl2");
|
|||
const io = @import("bus/io.zig");
|
||||
const util = @import("../util.zig");
|
||||
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Bus = @import("Bus.zig");
|
||||
const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
|
||||
const Scheduler = @import("scheduler.zig").Scheduler;
|
||||
const ToneSweep = @import("apu/ToneSweep.zig");
|
||||
const Tone = @import("apu/Tone.zig");
|
||||
|
|
@ -22,7 +21,7 @@ pub const host_rate = @import("../platform.zig").sample_rate;
|
|||
pub const host_format = @import("../platform.zig").sample_format;
|
||||
|
||||
pub fn read(comptime T: type, apu: *const Apu, addr: u32) ?T {
|
||||
const byte_addr: u8 = @truncate(addr);
|
||||
const byte_addr = @truncate(u8, addr);
|
||||
|
||||
return switch (T) {
|
||||
u32 => switch (byte_addr) {
|
||||
|
|
@ -73,27 +72,27 @@ pub fn read(comptime T: type, apu: *const Apu, addr: u32) ?T {
|
|||
else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
|
||||
},
|
||||
u8 => switch (byte_addr) {
|
||||
0x60, 0x61 => @truncate(@as(u16, apu.ch1.sound1CntL()) >> getHalf(byte_addr)),
|
||||
0x62, 0x63 => @truncate(apu.ch1.sound1CntH() >> getHalf(byte_addr)),
|
||||
0x64, 0x65 => @truncate(apu.ch1.sound1CntX() >> getHalf(byte_addr)),
|
||||
0x60, 0x61 => @truncate(T, @as(u16, apu.ch1.sound1CntL()) >> getHalf(byte_addr)),
|
||||
0x62, 0x63 => @truncate(T, apu.ch1.sound1CntH() >> getHalf(byte_addr)),
|
||||
0x64, 0x65 => @truncate(T, apu.ch1.sound1CntX() >> getHalf(byte_addr)),
|
||||
0x66, 0x67 => 0x00, // assuming behaviour is identical to that of 16-bit reads
|
||||
0x68, 0x69 => @truncate(apu.ch2.sound2CntL() >> getHalf(byte_addr)),
|
||||
0x68, 0x69 => @truncate(T, apu.ch2.sound2CntL() >> getHalf(byte_addr)),
|
||||
0x6A, 0x6B => 0x00,
|
||||
0x6C, 0x6D => @truncate(apu.ch2.sound2CntH() >> getHalf(byte_addr)),
|
||||
0x6C, 0x6D => @truncate(T, apu.ch2.sound2CntH() >> getHalf(byte_addr)),
|
||||
0x6E, 0x6F => 0x00,
|
||||
0x70, 0x71 => @truncate(@as(u16, apu.ch3.sound3CntL()) >> getHalf(byte_addr)), // SOUND3CNT_L
|
||||
0x72, 0x73 => @truncate(apu.ch3.sound3CntH() >> getHalf(byte_addr)),
|
||||
0x74, 0x75 => @truncate(apu.ch3.sound3CntX() >> getHalf(byte_addr)), // SOUND3CNT_L
|
||||
0x70, 0x71 => @truncate(T, @as(u16, apu.ch3.sound3CntL()) >> getHalf(byte_addr)), // SOUND3CNT_L
|
||||
0x72, 0x73 => @truncate(T, apu.ch3.sound3CntH() >> getHalf(byte_addr)),
|
||||
0x74, 0x75 => @truncate(T, apu.ch3.sound3CntX() >> getHalf(byte_addr)), // SOUND3CNT_L
|
||||
0x76, 0x77 => 0x00,
|
||||
0x78, 0x79 => @truncate(apu.ch4.sound4CntL() >> getHalf(byte_addr)),
|
||||
0x78, 0x79 => @truncate(T, apu.ch4.sound4CntL() >> getHalf(byte_addr)),
|
||||
0x7A, 0x7B => 0x00,
|
||||
0x7C, 0x7D => @truncate(apu.ch4.sound4CntH() >> getHalf(byte_addr)),
|
||||
0x7C, 0x7D => @truncate(T, apu.ch4.sound4CntH() >> getHalf(byte_addr)),
|
||||
0x7E, 0x7F => 0x00,
|
||||
0x80, 0x81 => @truncate(apu.soundCntL() >> getHalf(byte_addr)), // SOUNDCNT_L
|
||||
0x82, 0x83 => @truncate(apu.soundCntH() >> getHalf(byte_addr)), // SOUNDCNT_H
|
||||
0x84, 0x85 => @truncate(@as(u16, apu.soundCntX()) >> getHalf(byte_addr)),
|
||||
0x80, 0x81 => @truncate(T, apu.soundCntL() >> getHalf(byte_addr)), // SOUNDCNT_L
|
||||
0x82, 0x83 => @truncate(T, apu.soundCntH() >> getHalf(byte_addr)), // SOUNDCNT_H
|
||||
0x84, 0x85 => @truncate(T, @as(u16, apu.soundCntX()) >> getHalf(byte_addr)),
|
||||
0x86, 0x87 => 0x00,
|
||||
0x88, 0x89 => @truncate(apu.bias.raw >> getHalf(byte_addr)), // SOUNDBIAS
|
||||
0x88, 0x89 => @truncate(T, apu.bias.raw >> getHalf(byte_addr)), // SOUNDBIAS
|
||||
0x8A, 0x8B => 0x00,
|
||||
0x8C...0x8F => null,
|
||||
0x90...0x9F => apu.ch3.wave_dev.read(T, apu.ch3.select, addr),
|
||||
|
|
@ -106,7 +105,7 @@ pub fn read(comptime T: type, apu: *const Apu, addr: u32) ?T {
|
|||
}
|
||||
|
||||
pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
|
||||
const byte_addr: u8 = @truncate(addr);
|
||||
const byte_addr = @truncate(u8, addr);
|
||||
|
||||
if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
|
||||
|
||||
|
|
@ -117,20 +116,20 @@ pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
|
|||
|
||||
switch (byte_addr) {
|
||||
0x60 => apu.ch1.setSound1Cnt(value),
|
||||
0x64 => apu.ch1.setSound1CntX(&apu.fs, @truncate(value)),
|
||||
0x64 => apu.ch1.setSound1CntX(&apu.fs, @truncate(u16, value)),
|
||||
|
||||
0x68 => apu.ch2.setSound2CntL(@truncate(value)),
|
||||
0x6C => apu.ch2.setSound2CntH(&apu.fs, @truncate(value)),
|
||||
0x68 => apu.ch2.setSound2CntL(@truncate(u16, value)),
|
||||
0x6C => apu.ch2.setSound2CntH(&apu.fs, @truncate(u16, value)),
|
||||
|
||||
0x70 => apu.ch3.setSound3Cnt(value),
|
||||
0x74 => apu.ch3.setSound3CntX(&apu.fs, @truncate(value)),
|
||||
0x74 => apu.ch3.setSound3CntX(&apu.fs, @truncate(u16, value)),
|
||||
|
||||
0x78 => apu.ch4.setSound4CntL(@truncate(value)),
|
||||
0x7C => apu.ch4.setSound4CntH(&apu.fs, @truncate(value)),
|
||||
0x78 => apu.ch4.setSound4CntL(@truncate(u16, value)),
|
||||
0x7C => apu.ch4.setSound4CntH(&apu.fs, @truncate(u16, value)),
|
||||
|
||||
0x80 => apu.setSoundCnt(value),
|
||||
0x84 => apu.setSoundCntX(value >> 7 & 1 == 1),
|
||||
0x88 => apu.bias.raw = @truncate(value),
|
||||
0x88 => apu.bias.raw = @truncate(u16, value),
|
||||
0x8C => {},
|
||||
|
||||
0x90, 0x94, 0x98, 0x9C => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
|
||||
|
|
@ -143,7 +142,7 @@ pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
|
|||
if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
|
||||
|
||||
switch (byte_addr) {
|
||||
0x60 => apu.ch1.setSound1CntL(@truncate(value)), // SOUND1CNT_L
|
||||
0x60 => apu.ch1.setSound1CntL(@truncate(u8, value)), // SOUND1CNT_L
|
||||
0x62 => apu.ch1.setSound1CntH(value),
|
||||
0x64 => apu.ch1.setSound1CntX(&apu.fs, value),
|
||||
0x66 => {},
|
||||
|
|
@ -153,7 +152,7 @@ pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
|
|||
0x6C => apu.ch2.setSound2CntH(&apu.fs, value),
|
||||
0x6E => {},
|
||||
|
||||
0x70 => apu.ch3.setSound3CntL(@truncate(value)),
|
||||
0x70 => apu.ch3.setSound3CntL(@truncate(u8, value)),
|
||||
0x72 => apu.ch3.setSound3CntH(value),
|
||||
0x74 => apu.ch3.setSound3CntX(&apu.fs, value),
|
||||
0x76 => {},
|
||||
|
|
@ -330,8 +329,8 @@ pub const Apu = struct {
|
|||
|
||||
/// SOUNDCNT
|
||||
fn setSoundCnt(self: *Self, value: u32) void {
|
||||
if (self.cnt.apu_enable.read()) self.setSoundCntL(@truncate(value));
|
||||
self.setSoundCntH(@truncate(value >> 16));
|
||||
if (self.cnt.apu_enable.read()) self.setSoundCntL(@truncate(u16, value));
|
||||
self.setSoundCntH(@truncate(u16, value >> 16));
|
||||
}
|
||||
|
||||
/// SOUNDCNT_L
|
||||
|
|
@ -384,12 +383,12 @@ pub const Apu = struct {
|
|||
|
||||
/// NR52
|
||||
pub fn soundCntX(self: *const Self) u8 {
|
||||
const apu_enable: u8 = @intFromBool(self.cnt.apu_enable.read());
|
||||
const apu_enable: u8 = @boolToInt(self.cnt.apu_enable.read());
|
||||
|
||||
const ch1_enable: u8 = @intFromBool(self.ch1.enabled);
|
||||
const ch2_enable: u8 = @intFromBool(self.ch2.enabled);
|
||||
const ch3_enable: u8 = @intFromBool(self.ch3.enabled);
|
||||
const ch4_enable: u8 = @intFromBool(self.ch4.enabled);
|
||||
const ch1_enable: u8 = @boolToInt(self.ch1.enabled);
|
||||
const ch2_enable: u8 = @boolToInt(self.ch2.enabled);
|
||||
const ch3_enable: u8 = @boolToInt(self.ch3.enabled);
|
||||
const ch4_enable: u8 = @boolToInt(self.ch4.enabled);
|
||||
|
||||
return apu_enable << 7 | ch4_enable << 3 | ch3_enable << 2 | ch2_enable << 1 | ch1_enable;
|
||||
}
|
||||
|
|
@ -450,8 +449,8 @@ pub const Apu = struct {
|
|||
left += bias;
|
||||
right += bias;
|
||||
|
||||
const clamped_left = std.math.clamp(@as(u16, @bitCast(left)), 0, std.math.maxInt(u11));
|
||||
const clamped_right = std.math.clamp(@as(u16, @bitCast(right)), 0, std.math.maxInt(u11));
|
||||
const clamped_left = std.math.clamp(@bitCast(u16, left), std.math.minInt(u11), std.math.maxInt(u11));
|
||||
const clamped_right = std.math.clamp(@bitCast(u16, right), std.math.minInt(u11), std.math.maxInt(u11));
|
||||
|
||||
// Extend to 16-bit signed audio samples
|
||||
const ext_left = (clamped_left << 5) | (clamped_left >> 6);
|
||||
|
|
@ -473,7 +472,7 @@ pub const Apu = struct {
|
|||
defer SDL.SDL_FreeAudioStream(old_stream);
|
||||
|
||||
self.sampling_cycle = self.bias.sampling_cycle.read();
|
||||
self.stream = SDL.SDL_NewAudioStream(SDL.AUDIO_U16, 2, @intCast(sample_rate), host_format, 2, host_rate).?;
|
||||
self.stream = SDL.SDL_NewAudioStream(SDL.AUDIO_U16, 2, @intCast(c_int, sample_rate), host_format, 2, host_rate).?;
|
||||
}
|
||||
|
||||
fn interval(self: *const Self) u64 {
|
||||
|
|
@ -521,20 +520,18 @@ pub const Apu = struct {
|
|||
pub fn onDmaAudioSampleRequest(self: *Self, cpu: *Arm7tdmi, tim_id: u3) void {
|
||||
if (!self.cnt.apu_enable.read()) return;
|
||||
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
if (@intFromBool(self.dma_cnt.chA_timer.read()) == tim_id) {
|
||||
if (@boolToInt(self.dma_cnt.chA_timer.read()) == tim_id) {
|
||||
if (!self.chA.enabled) return;
|
||||
|
||||
self.chA.updateSample();
|
||||
if (self.chA.len() <= 15) bus_ptr.dma[1].requestAudio(0x0400_00A0);
|
||||
if (self.chA.len() <= 15) cpu.bus.dma[1].requestAudio(0x0400_00A0);
|
||||
}
|
||||
|
||||
if (@intFromBool(self.dma_cnt.chB_timer.read()) == tim_id) {
|
||||
if (@boolToInt(self.dma_cnt.chB_timer.read()) == tim_id) {
|
||||
if (!self.chB.enabled) return;
|
||||
|
||||
self.chB.updateSample();
|
||||
if (self.chB.len() <= 15) bus_ptr.dma[2].requestAudio(0x0400_00A4);
|
||||
if (self.chB.len() <= 15) cpu.bus.dma[2].requestAudio(0x0400_00A4);
|
||||
}
|
||||
}
|
||||
};
|
||||
|
|
@ -578,11 +575,11 @@ pub fn DmaSound(comptime kind: DmaSoundKind) type {
|
|||
}
|
||||
|
||||
pub fn updateSample(self: *Self) void {
|
||||
if (self.fifo.readItem()) |sample| self.sample = @bitCast(sample);
|
||||
if (self.fifo.readItem()) |sample| self.sample = @bitCast(i8, sample);
|
||||
}
|
||||
|
||||
pub fn amplitude(self: *const Self) i16 {
|
||||
return self.sample;
|
||||
return @as(i16, self.sample);
|
||||
}
|
||||
};
|
||||
}
|
||||
|
|
|
|||
|
|
@ -76,14 +76,14 @@ pub fn sound4CntL(self: *const Self) u16 {
|
|||
|
||||
/// NR41, NR42
|
||||
pub fn setSound4CntL(self: *Self, value: u16) void {
|
||||
self.setNr41(@truncate(value));
|
||||
self.setNr42(@truncate(value >> 8));
|
||||
self.setNr41(@truncate(u8, value));
|
||||
self.setNr42(@truncate(u8, value >> 8));
|
||||
}
|
||||
|
||||
/// NR41
|
||||
pub fn setNr41(self: *Self, len: u8) void {
|
||||
self.len = @truncate(len);
|
||||
self.len_dev.timer = @as(u7, 64) - self.len;
|
||||
self.len = @truncate(u6, len);
|
||||
self.len_dev.timer = @as(u7, 64) - @truncate(u6, len);
|
||||
}
|
||||
|
||||
/// NR42
|
||||
|
|
@ -99,8 +99,8 @@ pub fn sound4CntH(self: *const Self) u16 {
|
|||
|
||||
/// NR43, NR44
|
||||
pub fn setSound4CntH(self: *Self, fs: *const FrameSequencer, value: u16) void {
|
||||
self.poly.raw = @truncate(value);
|
||||
self.setNr44(fs, @truncate(value >> 8));
|
||||
self.poly.raw = @truncate(u8, value);
|
||||
self.setNr44(fs, @truncate(u8, value >> 8));
|
||||
}
|
||||
|
||||
/// NR44
|
||||
|
|
|
|||
|
|
@ -77,14 +77,14 @@ pub fn sound2CntL(self: *const Self) u16 {
|
|||
|
||||
/// NR21, NR22
|
||||
pub fn setSound2CntL(self: *Self, value: u16) void {
|
||||
self.setNr21(@truncate(value));
|
||||
self.setNr22(@truncate(value >> 8));
|
||||
self.setNr21(@truncate(u8, value));
|
||||
self.setNr22(@truncate(u8, value >> 8));
|
||||
}
|
||||
|
||||
/// NR21
|
||||
pub fn setNr21(self: *Self, value: u8) void {
|
||||
self.duty.raw = value;
|
||||
self.len_dev.timer = @as(u7, 64) - @as(u6, @truncate(value));
|
||||
self.len_dev.timer = @as(u7, 64) - @truncate(u6, value);
|
||||
}
|
||||
|
||||
/// NR22
|
||||
|
|
@ -100,8 +100,8 @@ pub fn sound2CntH(self: *const Self) u16 {
|
|||
|
||||
/// NR23, NR24
|
||||
pub fn setSound2CntH(self: *Self, fs: *const FrameSequencer, value: u16) void {
|
||||
self.setNr23(@truncate(value));
|
||||
self.setNr24(fs, @truncate(value >> 8));
|
||||
self.setNr23(@truncate(u8, value));
|
||||
self.setNr24(fs, @truncate(u8, value >> 8));
|
||||
}
|
||||
|
||||
/// NR23
|
||||
|
|
|
|||
|
|
@ -81,8 +81,8 @@ pub fn onToneSweepEvent(self: *Self, late: u64) void {
|
|||
|
||||
/// NR10, NR11, NR12
|
||||
pub fn setSound1Cnt(self: *Self, value: u32) void {
|
||||
self.setSound1CntL(@truncate(value));
|
||||
self.setSound1CntH(@truncate(value >> 16));
|
||||
self.setSound1CntL(@truncate(u8, value));
|
||||
self.setSound1CntH(@truncate(u16, value >> 16));
|
||||
}
|
||||
|
||||
/// NR10
|
||||
|
|
@ -111,14 +111,14 @@ pub fn sound1CntH(self: *const Self) u16 {
|
|||
|
||||
/// NR11, NR12
|
||||
pub fn setSound1CntH(self: *Self, value: u16) void {
|
||||
self.setNr11(@truncate(value));
|
||||
self.setNr12(@truncate(value >> 8));
|
||||
self.setNr11(@truncate(u8, value));
|
||||
self.setNr12(@truncate(u8, value >> 8));
|
||||
}
|
||||
|
||||
/// NR11
|
||||
pub fn setNr11(self: *Self, value: u8) void {
|
||||
self.duty.raw = value;
|
||||
self.len_dev.timer = @as(u7, 64) - @as(u6, @truncate(value));
|
||||
self.len_dev.timer = @as(u7, 64) - @truncate(u6, value);
|
||||
}
|
||||
|
||||
/// NR12
|
||||
|
|
@ -134,8 +134,8 @@ pub fn sound1CntX(self: *const Self) u16 {
|
|||
|
||||
/// NR13, NR14
|
||||
pub fn setSound1CntX(self: *Self, fs: *const FrameSequencer, value: u16) void {
|
||||
self.setNr13(@truncate(value));
|
||||
self.setNr14(fs, @truncate(value >> 8));
|
||||
self.setNr13(@truncate(u8, value));
|
||||
self.setNr14(fs, @truncate(u8, value >> 8));
|
||||
}
|
||||
|
||||
/// NR13
|
||||
|
|
|
|||
|
|
@ -64,8 +64,8 @@ pub fn tick(self: *Self, comptime kind: Tick) void {
|
|||
|
||||
/// NR30, NR31, NR32
|
||||
pub fn setSound3Cnt(self: *Self, value: u32) void {
|
||||
self.setSound3CntL(@truncate(value));
|
||||
self.setSound3CntH(@truncate(value >> 16));
|
||||
self.setSound3CntL(@truncate(u8, value));
|
||||
self.setSound3CntH(@truncate(u16, value >> 16));
|
||||
}
|
||||
|
||||
/// NR30
|
||||
|
|
@ -86,8 +86,8 @@ pub fn sound3CntH(self: *const Self) u16 {
|
|||
|
||||
/// NR31, NR32
|
||||
pub fn setSound3CntH(self: *Self, value: u16) void {
|
||||
self.setNr31(@truncate(value));
|
||||
self.vol.raw = @truncate(value >> 8);
|
||||
self.setNr31(@truncate(u8, value));
|
||||
self.vol.raw = (@truncate(u8, value >> 8));
|
||||
}
|
||||
|
||||
/// NR31
|
||||
|
|
@ -98,8 +98,8 @@ pub fn setNr31(self: *Self, len: u8) void {
|
|||
|
||||
/// NR33, NR34
|
||||
pub fn setSound3CntX(self: *Self, fs: *const FrameSequencer, value: u16) void {
|
||||
self.setNr33(@truncate(value));
|
||||
self.setNr34(fs, @truncate(value >> 8));
|
||||
self.setNr33(@truncate(u8, value));
|
||||
self.setNr34(fs, @truncate(u8, value >> 8));
|
||||
}
|
||||
|
||||
/// NR33, NR34
|
||||
|
|
|
|||
|
|
@ -28,8 +28,8 @@ pub fn tick(self: *Self, ch1: *ToneSweep) void {
|
|||
const new_freq = self.calculate(ch1.sweep, &ch1.enabled);
|
||||
|
||||
if (new_freq <= 0x7FF and ch1.sweep.shift.read() != 0) {
|
||||
ch1.freq.frequency.write(@as(u11, @truncate(new_freq)));
|
||||
self.shadow = @truncate(new_freq);
|
||||
ch1.freq.frequency.write(@truncate(u11, new_freq));
|
||||
self.shadow = @truncate(u11, new_freq);
|
||||
|
||||
_ = self.calculate(ch1.sweep, &ch1.enabled);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -18,7 +18,7 @@ pub fn read(self: *const Self, comptime T: type, nr30: io.WaveSelect, addr: u32)
|
|||
const base = if (!nr30.bank.read()) @as(u32, 0x10) else 0; // Read from the Opposite Bank in Use
|
||||
|
||||
const i = base + addr - 0x0400_0090;
|
||||
return std.mem.readInt(T, self.buf[i..][0..@sizeOf(T)], .little);
|
||||
return std.mem.readIntSliceLittle(T, self.buf[i..][0..@sizeOf(T)]);
|
||||
}
|
||||
|
||||
pub fn write(self: *Self, comptime T: type, nr30: io.WaveSelect, addr: u32, value: T) void {
|
||||
|
|
@ -26,7 +26,7 @@ pub fn write(self: *Self, comptime T: type, nr30: io.WaveSelect, addr: u32, valu
|
|||
const base = if (!nr30.bank.read()) @as(u32, 0x10) else 0; // Write to the Opposite Bank in Use
|
||||
|
||||
const i = base + addr - 0x0400_0090;
|
||||
std.mem.writeInt(T, self.buf[i..][0..@sizeOf(T)], value, .little);
|
||||
std.mem.writeIntSliceLittle(T, self.buf[i..][0..@sizeOf(T)], value);
|
||||
}
|
||||
|
||||
pub fn init(sched: *Scheduler) Self {
|
||||
|
|
@ -70,7 +70,7 @@ pub fn sample(self: *const Self, nr30: io.WaveSelect) u4 {
|
|||
const base = if (nr30.bank.read()) @as(u32, 0x10) else 0;
|
||||
|
||||
const value = self.buf[base + self.offset / 2];
|
||||
return if (self.offset & 1 == 0) @truncate(value >> 4) else @truncate(value);
|
||||
return if (self.offset & 1 == 0) @truncate(u4, value >> 4) else @truncate(u4, value);
|
||||
}
|
||||
|
||||
/// TODO: Write comment
|
||||
|
|
|
|||
|
|
@ -27,7 +27,7 @@ pub fn read(self: *Self, comptime T: type, r15: u32, address: u32) T {
|
|||
log.warn("Open Bus! Read from 0x{X:0>8}, but PC was 0x{X:0>8}", .{ address, r15 });
|
||||
const value = self._read(u32, self.addr_latch);
|
||||
|
||||
return @truncate(rotr(u32, value, 8 * rotateBy(T, address)));
|
||||
return @truncate(T, rotr(u32, value, 8 * rotateBy(T, address)));
|
||||
}
|
||||
|
||||
fn rotateBy(comptime T: type, address: u32) u32 {
|
||||
|
|
@ -43,7 +43,7 @@ pub fn dbgRead(self: *const Self, comptime T: type, r15: u32, address: u32) T {
|
|||
if (r15 < Self.size) return self._read(T, forceAlign(T, address));
|
||||
|
||||
const value = self._read(u32, self.addr_latch);
|
||||
return @truncate(rotr(u32, value, 8 * rotateBy(T, address)));
|
||||
return @truncate(T, rotr(u32, value, 8 * rotateBy(T, address)));
|
||||
}
|
||||
|
||||
/// Read without the GBA safety checks
|
||||
|
|
@ -51,7 +51,7 @@ fn _read(self: *const Self, comptime T: type, addr: u32) T {
|
|||
const buf = self.buf orelse std.debug.panic("[BIOS] ZBA tried to read {} from 0x{X:0>8} but not BIOS was present", .{ T, addr });
|
||||
|
||||
return switch (T) {
|
||||
u32, u16, u8 => std.mem.readInt(T, buf[addr..][0..@sizeOf(T)], .little),
|
||||
u32, u16, u8 => std.mem.readIntSliceLittle(T, buf[addr..][0..@sizeOf(T)]),
|
||||
else => @compileError("BIOS: Unsupported read width"),
|
||||
};
|
||||
}
|
||||
|
|
@ -63,23 +63,18 @@ pub fn write(_: *Self, comptime T: type, addr: u32, value: T) void {
|
|||
|
||||
pub fn init(allocator: Allocator, maybe_path: ?[]const u8) !Self {
|
||||
if (maybe_path == null) return .{ .buf = null, .allocator = allocator };
|
||||
const file_path = maybe_path.?;
|
||||
const path = maybe_path.?;
|
||||
|
||||
const buf = try allocator.alloc(u8, Self.size);
|
||||
errdefer allocator.free(buf);
|
||||
|
||||
var self: Self = .{ .buf = buf, .allocator = allocator };
|
||||
try self.load(file_path);
|
||||
|
||||
return self;
|
||||
}
|
||||
|
||||
pub fn load(self: *Self, file_path: []const u8) !void {
|
||||
const file = try std.fs.cwd().openFile(file_path, .{});
|
||||
const file = try std.fs.cwd().openFile(path, .{});
|
||||
defer file.close();
|
||||
|
||||
const len = try file.readAll(self.buf orelse return error.UnallocatedBuffer);
|
||||
if (len != Self.size) log.err("Expected BIOS to be {}B, was {}B", .{ Self.size, len });
|
||||
const file_len = try file.readAll(buf);
|
||||
if (file_len != Self.size) log.err("Expected BIOS to be {}B, was {}B", .{ Self.size, file_len });
|
||||
|
||||
return Self{ .buf = buf, .allocator = allocator };
|
||||
}
|
||||
|
||||
pub fn reset(self: *Self) void {
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ pub fn read(self: *const Self, comptime T: type, address: usize) T {
|
|||
const addr = address & 0x3FFFF;
|
||||
|
||||
return switch (T) {
|
||||
u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
|
||||
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
|
||||
else => @compileError("EWRAM: Unsupported read width"),
|
||||
};
|
||||
}
|
||||
|
|
@ -20,14 +20,14 @@ pub fn write(self: *const Self, comptime T: type, address: usize, value: T) void
|
|||
const addr = address & 0x3FFFF;
|
||||
|
||||
return switch (T) {
|
||||
u32, u16, u8 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
|
||||
u32, u16, u8 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
|
||||
else => @compileError("EWRAM: Unsupported write width"),
|
||||
};
|
||||
}
|
||||
|
||||
pub fn init(allocator: Allocator) !Self {
|
||||
const buf = try allocator.alloc(u8, ewram_size);
|
||||
@memset(buf, 0);
|
||||
std.mem.set(u8, buf, 0);
|
||||
|
||||
return Self{
|
||||
.buf = buf,
|
||||
|
|
@ -36,7 +36,7 @@ pub fn init(allocator: Allocator) !Self {
|
|||
}
|
||||
|
||||
pub fn reset(self: *Self) void {
|
||||
@memset(self.buf, 0);
|
||||
std.mem.set(u8, self.buf, 0);
|
||||
}
|
||||
|
||||
pub fn deinit(self: *Self) void {
|
||||
|
|
|
|||
|
|
@ -1,7 +1,7 @@
|
|||
const std = @import("std");
|
||||
const config = @import("../../config.zig");
|
||||
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
|
||||
const Backup = @import("backup.zig").Backup;
|
||||
const Gpio = @import("gpio.zig").Gpio;
|
||||
const Allocator = std.mem.Allocator;
|
||||
|
|
@ -30,7 +30,7 @@ pub fn read(self: *Self, comptime T: type, address: u32) T {
|
|||
// Addresses 0x0D00_0000 to 0x0DFF_FFFF are reserved for EEPROM accesses if
|
||||
// * Backup type is EEPROM
|
||||
// * Small ROM (less than 16MB)
|
||||
if (@as(u8, @truncate(address >> 24)) == 0x0D)
|
||||
if (@truncate(u8, address >> 24) == 0x0D)
|
||||
return self.backup.eeprom.read();
|
||||
}
|
||||
}
|
||||
|
|
@ -77,7 +77,7 @@ inline fn get(self: *const Self, i: u32) u8 {
|
|||
if (i < self.buf.len) return self.buf[i];
|
||||
|
||||
const lhs = i >> 1 & 0xFFFF;
|
||||
return @truncate(lhs >> 8 * @as(u5, @truncate(i & 1)));
|
||||
return @truncate(u8, lhs >> 8 * @truncate(u5, i & 1));
|
||||
}
|
||||
|
||||
pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
|
||||
|
|
@ -94,7 +94,7 @@ pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
|
|||
// Addresses 0x0D00_0000 to 0x0DFF_FFFF are reserved for EEPROM accesses if
|
||||
// * Backup type is EEPROM
|
||||
// * Small ROM (less than 16MB)
|
||||
if (@as(u8, @truncate(address >> 24)) == 0x0D)
|
||||
if (@truncate(u8, address >> 24) == 0x0D)
|
||||
return self.backup.eeprom.dbgRead();
|
||||
}
|
||||
}
|
||||
|
|
@ -139,7 +139,7 @@ pub fn write(self: *Self, comptime T: type, word_count: u16, address: u32, value
|
|||
const addr = address & 0x1FF_FFFF;
|
||||
|
||||
if (self.backup.kind == .Eeprom) {
|
||||
const bit: u1 = @truncate(value);
|
||||
const bit = @truncate(u1, value);
|
||||
|
||||
if (self.buf.len > 0x100_0000) { // Large
|
||||
// Addresses 0x1FF_FF00 to 0x1FF_FFFF are reserved from EEPROM accesses if
|
||||
|
|
@ -151,7 +151,7 @@ pub fn write(self: *Self, comptime T: type, word_count: u16, address: u32, value
|
|||
// Addresses 0x0D00_0000 to 0x0DFF_FFFF are reserved for EEPROM accesses if
|
||||
// * Backup type is EEPROM
|
||||
// * Small ROM (less than 16MB)
|
||||
if (@as(u8, @truncate(address >> 24)) == 0x0D)
|
||||
if (@truncate(u8, address >> 24) == 0x0D)
|
||||
return self.backup.eeprom.write(word_count, &self.backup.buf, bit);
|
||||
}
|
||||
}
|
||||
|
|
@ -159,19 +159,19 @@ pub fn write(self: *Self, comptime T: type, word_count: u16, address: u32, value
|
|||
switch (T) {
|
||||
u32 => switch (address) {
|
||||
0x0800_00C4 => {
|
||||
self.gpio.write(.Data, @as(u4, @truncate(value)));
|
||||
self.gpio.write(.Direction, @as(u4, @truncate(value >> 16)));
|
||||
self.gpio.write(.Data, @truncate(u4, value));
|
||||
self.gpio.write(.Direction, @truncate(u4, value >> 16));
|
||||
},
|
||||
0x0800_00C6 => {
|
||||
self.gpio.write(.Direction, @as(u4, @truncate(value)));
|
||||
self.gpio.write(.Control, @as(u1, @truncate(value >> 16)));
|
||||
self.gpio.write(.Direction, @truncate(u4, value));
|
||||
self.gpio.write(.Control, @truncate(u1, value >> 16));
|
||||
},
|
||||
else => log.err("Wrote {} 0x{X:0>8} to 0x{X:0>8}, Unhandled", .{ T, value, address }),
|
||||
},
|
||||
u16 => switch (address) {
|
||||
0x0800_00C4 => self.gpio.write(.Data, @as(u4, @truncate(value))),
|
||||
0x0800_00C6 => self.gpio.write(.Direction, @as(u4, @truncate(value))),
|
||||
0x0800_00C8 => self.gpio.write(.Control, @as(u1, @truncate(value))),
|
||||
0x0800_00C4 => self.gpio.write(.Data, @truncate(u4, value)),
|
||||
0x0800_00C6 => self.gpio.write(.Direction, @truncate(u4, value)),
|
||||
0x0800_00C8 => self.gpio.write(.Control, @truncate(u1, value)),
|
||||
else => log.err("Wrote {} 0x{X:0>4} to 0x{X:0>8}, Unhandled", .{ T, value, address }),
|
||||
},
|
||||
u8 => log.debug("Wrote {} 0x{X:0>2} to 0x{X:0>8}, Ignored.", .{ T, value, address }),
|
||||
|
|
|
|||
|
|
@ -11,7 +11,7 @@ pub fn read(self: *const Self, comptime T: type, address: usize) T {
|
|||
const addr = address & 0x7FFF;
|
||||
|
||||
return switch (T) {
|
||||
u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
|
||||
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
|
||||
else => @compileError("IWRAM: Unsupported read width"),
|
||||
};
|
||||
}
|
||||
|
|
@ -20,14 +20,14 @@ pub fn write(self: *const Self, comptime T: type, address: usize, value: T) void
|
|||
const addr = address & 0x7FFF;
|
||||
|
||||
return switch (T) {
|
||||
u32, u16, u8 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
|
||||
u32, u16, u8 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
|
||||
else => @compileError("IWRAM: Unsupported write width"),
|
||||
};
|
||||
}
|
||||
|
||||
pub fn init(allocator: Allocator) !Self {
|
||||
const buf = try allocator.alloc(u8, iwram_size);
|
||||
@memset(buf, 0);
|
||||
std.mem.set(u8, buf, 0);
|
||||
|
||||
return Self{
|
||||
.buf = buf,
|
||||
|
|
@ -36,7 +36,7 @@ pub fn init(allocator: Allocator) !Self {
|
|||
}
|
||||
|
||||
pub fn reset(self: *Self) void {
|
||||
@memset(self.buf, 0);
|
||||
std.mem.set(u8, self.buf, 0);
|
||||
}
|
||||
|
||||
pub fn deinit(self: *Self) void {
|
||||
|
|
|
|||
|
|
@ -77,7 +77,7 @@ pub const Backup = struct {
|
|||
|
||||
switch (addr) {
|
||||
0x0000 => if (self.kind == .Flash1M and self.flash.set_bank) {
|
||||
self.flash.bank = @truncate(byte);
|
||||
self.flash.bank = @truncate(u1, byte);
|
||||
},
|
||||
0x5555 => {
|
||||
if (self.flash.state == .Command) {
|
||||
|
|
@ -110,7 +110,7 @@ pub const Backup = struct {
|
|||
};
|
||||
|
||||
const buf = try allocator.alloc(u8, buf_size);
|
||||
@memset(buf, 0xFF);
|
||||
std.mem.set(u8, buf, 0xFF);
|
||||
|
||||
var backup = Self{
|
||||
.buf = buf,
|
||||
|
|
@ -163,7 +163,7 @@ pub const Backup = struct {
|
|||
switch (self.kind) {
|
||||
.Sram, .Flash, .Flash1M => {
|
||||
if (self.buf.len == file_buf.len) {
|
||||
@memcpy(self.buf, file_buf);
|
||||
std.mem.copy(u8, self.buf, file_buf);
|
||||
return log.info("Loaded Save from {s}", .{file_path});
|
||||
}
|
||||
|
||||
|
|
@ -174,7 +174,7 @@ pub const Backup = struct {
|
|||
self.eeprom.kind = if (file_buf.len == 0x200) .Small else .Large;
|
||||
|
||||
self.buf = try allocator.alloc(u8, file_buf.len);
|
||||
@memcpy(self.buf, file_buf);
|
||||
std.mem.copy(u8, self.buf, file_buf);
|
||||
return log.info("Loaded Save from {s}", .{file_path});
|
||||
}
|
||||
|
||||
|
|
@ -205,6 +205,10 @@ pub const Backup = struct {
|
|||
const file_path = try self.savePath(allocator, path);
|
||||
defer allocator.free(file_path);
|
||||
|
||||
// FIXME: communicate edge case to the user?
|
||||
if (std.mem.eql(u8, &self.title, "ACE LIGHTNIN"))
|
||||
return;
|
||||
|
||||
switch (self.kind) {
|
||||
.Sram, .Flash, .Flash1M, .Eeprom => {
|
||||
const file = try std.fs.createFileAbsolute(file_path, .{});
|
||||
|
|
|
|||
|
|
@ -44,7 +44,7 @@ pub fn handleCommand(self: *Self, buf: []u8, byte: u8) void {
|
|||
0xB0 => self.set_bank = true,
|
||||
0x80 => self.prep_erase = true,
|
||||
0x10 => {
|
||||
@memset(buf, 0xFF);
|
||||
std.mem.set(u8, buf, 0xFF);
|
||||
self.prep_erase = false;
|
||||
},
|
||||
0xA0 => self.prep_write = true,
|
||||
|
|
@ -61,7 +61,7 @@ pub fn shouldEraseSector(self: *const Self, addr: usize, byte: u8) bool {
|
|||
pub fn erase(self: *Self, buf: []u8, sector: usize) void {
|
||||
const start = self.address() + (sector & 0xF000);
|
||||
|
||||
@memset(buf[start..][0..0x1000], 0xFF);
|
||||
std.mem.set(u8, buf[start..][0..0x1000], 0xFF);
|
||||
self.prep_erase = false;
|
||||
self.state = .Ready;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -58,9 +58,7 @@ pub const Eeprom = struct {
|
|||
log.err("Failed to resize EEPROM buf to {} bytes", .{len});
|
||||
std.debug.panic("EEPROM entered irrecoverable state {}", .{e});
|
||||
};
|
||||
|
||||
// FIXME: ptr to a slice?
|
||||
@memset(buf.*, 0xFF);
|
||||
std.mem.set(u8, buf.*, 0xFF);
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -108,7 +106,7 @@ pub const Eeprom = struct {
|
|||
switch (self.state) {
|
||||
.Ready => {
|
||||
if (self.writer.len() == 2) {
|
||||
const req: u2 = @intCast(self.writer.finish());
|
||||
const req = @intCast(u2, self.writer.finish());
|
||||
switch (req) {
|
||||
0b11 => self.state = .Read,
|
||||
0b10 => self.state = .Write,
|
||||
|
|
@ -120,8 +118,8 @@ pub const Eeprom = struct {
|
|||
switch (self.kind) {
|
||||
.Large => {
|
||||
if (self.writer.len() == 14) {
|
||||
const addr: u10 = @intCast(self.writer.finish());
|
||||
const value = std.mem.readInt(u64, buf[@as(u13, addr) * 8 ..][0..8], .little);
|
||||
const addr = @intCast(u10, self.writer.finish());
|
||||
const value = std.mem.readIntSliceLittle(u64, buf[@as(u13, addr) * 8 ..][0..8]);
|
||||
|
||||
self.reader.configure(value);
|
||||
self.state = .RequestEnd;
|
||||
|
|
@ -130,8 +128,8 @@ pub const Eeprom = struct {
|
|||
.Small => {
|
||||
if (self.writer.len() == 6) {
|
||||
// FIXME: Duplicated code from above
|
||||
const addr: u6 = @intCast(self.writer.finish());
|
||||
const value = std.mem.readInt(u64, buf[@as(u13, addr) * 8 ..][0..8], .little);
|
||||
const addr = @intCast(u6, self.writer.finish());
|
||||
const value = std.mem.readIntSliceLittle(u64, buf[@as(u13, addr) * 8 ..][0..8]);
|
||||
|
||||
self.reader.configure(value);
|
||||
self.state = .RequestEnd;
|
||||
|
|
@ -144,13 +142,13 @@ pub const Eeprom = struct {
|
|||
switch (self.kind) {
|
||||
.Large => {
|
||||
if (self.writer.len() == 14) {
|
||||
self.addr = @as(u10, @intCast(self.writer.finish()));
|
||||
self.addr = @intCast(u10, self.writer.finish());
|
||||
self.state = .WriteTransfer;
|
||||
}
|
||||
},
|
||||
.Small => {
|
||||
if (self.writer.len() == 6) {
|
||||
self.addr = @as(u6, @intCast(self.writer.finish()));
|
||||
self.addr = @intCast(u6, self.writer.finish());
|
||||
self.state = .WriteTransfer;
|
||||
}
|
||||
},
|
||||
|
|
@ -159,7 +157,7 @@ pub const Eeprom = struct {
|
|||
},
|
||||
.WriteTransfer => {
|
||||
if (self.writer.len() == 64) {
|
||||
std.mem.writeInt(u64, buf[self.addr * 8 ..][0..8], self.writer.finish(), .little);
|
||||
std.mem.writeIntSliceLittle(u64, buf[self.addr * 8 ..][0..8], self.writer.finish());
|
||||
self.state = .RequestEnd;
|
||||
}
|
||||
},
|
||||
|
|
@ -186,9 +184,11 @@ const Reader = struct {
|
|||
fn read(self: *Self) u1 {
|
||||
if (!self.enabled) return 1;
|
||||
|
||||
const bit: u1 = if (self.i < 4) 0 else blk: {
|
||||
const idx: u6 = @intCast(63 - (self.i - 4));
|
||||
break :blk @truncate(self.data >> idx);
|
||||
const bit = if (self.i < 4) blk: {
|
||||
break :blk 0;
|
||||
} else blk: {
|
||||
const idx = @intCast(u6, 63 - (self.i - 4));
|
||||
break :blk @truncate(u1, self.data >> idx);
|
||||
};
|
||||
|
||||
self.i = (self.i + 1) % (64 + 4);
|
||||
|
|
@ -200,11 +200,11 @@ const Reader = struct {
|
|||
fn dbgRead(self: *const Self) u1 {
|
||||
if (!self.enabled) return 1;
|
||||
|
||||
const bit: u1 = if (self.i < 4) blk: {
|
||||
const bit = if (self.i < 4) blk: {
|
||||
break :blk 0;
|
||||
} else blk: {
|
||||
const idx: u6 = @intCast(63 - (self.i - 4));
|
||||
break :blk @truncate(self.data >> idx);
|
||||
const idx = @intCast(u6, 63 - (self.i - 4));
|
||||
break :blk @truncate(u1, self.data >> idx);
|
||||
};
|
||||
|
||||
return bit;
|
||||
|
|
@ -228,7 +228,7 @@ const Writer = struct {
|
|||
}
|
||||
|
||||
fn requestWrite(self: *Self, bit: u1) void {
|
||||
const idx: u1 = @intCast(1 - self.i);
|
||||
const idx = @intCast(u1, 1 - self.i);
|
||||
self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
|
||||
self.i += 1;
|
||||
}
|
||||
|
|
@ -242,13 +242,13 @@ const Writer = struct {
|
|||
.Unknown => unreachable,
|
||||
};
|
||||
|
||||
const idx: u4 = @intCast(size - self.i);
|
||||
const idx = @intCast(u4, size - self.i);
|
||||
self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
|
||||
self.i += 1;
|
||||
}
|
||||
|
||||
fn dataWrite(self: *Self, bit: u1) void {
|
||||
const idx: u6 = @intCast(63 - self.i);
|
||||
const idx = @intCast(u6, 63 - self.i);
|
||||
self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
|
||||
self.i += 1;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -3,7 +3,7 @@ const util = @import("../../util.zig");
|
|||
|
||||
const DmaControl = @import("io.zig").DmaControl;
|
||||
const Bus = @import("../Bus.zig");
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
|
||||
|
||||
pub const DmaTuple = struct { DmaController(0), DmaController(1), DmaController(2), DmaController(3) };
|
||||
const log = std.log.scoped(.DmaTransfer);
|
||||
|
|
@ -11,7 +11,6 @@ const log = std.log.scoped(.DmaTransfer);
|
|||
const getHalf = util.getHalf;
|
||||
const setHalf = util.setHalf;
|
||||
const setQuart = util.setQuart;
|
||||
const handleInterrupt = @import("../cpu_util.zig").handleInterrupt;
|
||||
|
||||
const rotr = @import("zba-util").rotr;
|
||||
|
||||
|
|
@ -20,7 +19,7 @@ pub fn create() DmaTuple {
|
|||
}
|
||||
|
||||
pub fn read(comptime T: type, dma: *const DmaTuple, addr: u32) ?T {
|
||||
const byte_addr: u8 = @truncate(addr);
|
||||
const byte_addr = @truncate(u8, addr);
|
||||
|
||||
return switch (T) {
|
||||
u32 => switch (byte_addr) {
|
||||
|
|
@ -55,19 +54,19 @@ pub fn read(comptime T: type, dma: *const DmaTuple, addr: u32) ?T {
|
|||
u8 => switch (byte_addr) {
|
||||
0xB0...0xB7 => null, // DMA0SAD, DMA0DAD
|
||||
0xB8, 0xB9 => 0x00, // DMA0CNT_L
|
||||
0xBA, 0xBB => @truncate(dma.*[0].dmacntH() >> getHalf(byte_addr)),
|
||||
0xBA, 0xBB => @truncate(T, dma.*[0].dmacntH() >> getHalf(byte_addr)),
|
||||
|
||||
0xBC...0xC3 => null, // DMA1SAD, DMA1DAD
|
||||
0xC4, 0xC5 => 0x00, // DMA1CNT_L
|
||||
0xC6, 0xC7 => @truncate(dma.*[1].dmacntH() >> getHalf(byte_addr)),
|
||||
0xC6, 0xC7 => @truncate(T, dma.*[1].dmacntH() >> getHalf(byte_addr)),
|
||||
|
||||
0xC8...0xCF => null, // DMA2SAD, DMA2DAD
|
||||
0xD0, 0xD1 => 0x00, // DMA2CNT_L
|
||||
0xD2, 0xD3 => @truncate(dma.*[2].dmacntH() >> getHalf(byte_addr)),
|
||||
0xD2, 0xD3 => @truncate(T, dma.*[2].dmacntH() >> getHalf(byte_addr)),
|
||||
|
||||
0xD4...0xDB => null, // DMA3SAD, DMA3DAD
|
||||
0xDC, 0xDD => 0x00, // DMA3CNT_L
|
||||
0xDE, 0xDF => @truncate(dma.*[3].dmacntH() >> getHalf(byte_addr)),
|
||||
0xDE, 0xDF => @truncate(T, dma.*[3].dmacntH() >> getHalf(byte_addr)),
|
||||
else => util.io.read.err(T, log, "unexpected {} read from 0x{X:0>8}", .{ T, addr }),
|
||||
},
|
||||
else => @compileError("DMA: Unsupported read width"),
|
||||
|
|
@ -75,7 +74,7 @@ pub fn read(comptime T: type, dma: *const DmaTuple, addr: u32) ?T {
|
|||
}
|
||||
|
||||
pub fn write(comptime T: type, dma: *DmaTuple, addr: u32, value: T) void {
|
||||
const byte_addr: u8 = @truncate(addr);
|
||||
const byte_addr = @truncate(u8, addr);
|
||||
|
||||
switch (T) {
|
||||
u32 => switch (byte_addr) {
|
||||
|
|
@ -209,7 +208,7 @@ fn DmaController(comptime id: u2) type {
|
|||
}
|
||||
|
||||
pub fn setDmacntL(self: *Self, halfword: u16) void {
|
||||
self.word_count = @truncate(halfword);
|
||||
self.word_count = @truncate(@TypeOf(self.word_count), halfword);
|
||||
}
|
||||
|
||||
pub fn dmacntH(self: *const Self) u16 {
|
||||
|
|
@ -233,16 +232,14 @@ fn DmaController(comptime id: u2) type {
|
|||
}
|
||||
|
||||
pub fn setDmacnt(self: *Self, word: u32) void {
|
||||
self.setDmacntL(@truncate(word));
|
||||
self.setDmacntH(@truncate(word >> 16));
|
||||
self.setDmacntL(@truncate(u16, word));
|
||||
self.setDmacntH(@truncate(u16, word >> 16));
|
||||
}
|
||||
|
||||
pub fn step(self: *Self, cpu: *Arm7tdmi) void {
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
const is_fifo = (id == 1 or id == 2) and self.cnt.start_timing.read() == 0b11;
|
||||
const sad_adj: Adjustment = @enumFromInt(self.cnt.sad_adj.read());
|
||||
const dad_adj: Adjustment = if (is_fifo) .Fixed else @enumFromInt(self.cnt.dad_adj.read());
|
||||
const sad_adj = @intToEnum(Adjustment, self.cnt.sad_adj.read());
|
||||
const dad_adj = if (is_fifo) .Fixed else @intToEnum(Adjustment, self.cnt.dad_adj.read());
|
||||
|
||||
const transfer_type = is_fifo or self.cnt.transfer_type.read();
|
||||
const offset: u32 = if (transfer_type) @sizeOf(u32) else @sizeOf(u16);
|
||||
|
|
@ -260,10 +257,10 @@ fn DmaController(comptime id: u2) type {
|
|||
self.data_latch = value << 16 | value;
|
||||
}
|
||||
|
||||
cpu.bus.write(u16, dad_addr, @as(u16, @truncate(rotr(u32, self.data_latch, 8 * (dad_addr & 3)))));
|
||||
cpu.bus.write(u16, dad_addr, @truncate(u16, rotr(u32, self.data_latch, 8 * (dad_addr & 3))));
|
||||
}
|
||||
|
||||
switch (@as(u8, @truncate(sad_addr >> 24))) {
|
||||
switch (@truncate(u8, sad_addr >> 24)) {
|
||||
// according to fleroviux, DMAs with a source address in ROM misbehave
|
||||
// the resultant behaviour is that the source address will increment despite what DMAXCNT says
|
||||
0x08...0x0D => self.sad_latch +%= offset, // obscure behaviour
|
||||
|
|
@ -286,13 +283,13 @@ fn DmaController(comptime id: u2) type {
|
|||
if (self._word_count == 0) {
|
||||
if (self.cnt.irq.read()) {
|
||||
switch (id) {
|
||||
0 => bus_ptr.io.irq.dma0.set(),
|
||||
1 => bus_ptr.io.irq.dma1.set(),
|
||||
2 => bus_ptr.io.irq.dma2.set(),
|
||||
3 => bus_ptr.io.irq.dma3.set(),
|
||||
0 => cpu.bus.io.irq.dma0.set(),
|
||||
1 => cpu.bus.io.irq.dma1.set(),
|
||||
2 => cpu.bus.io.irq.dma2.set(),
|
||||
3 => cpu.bus.io.irq.dma3.set(),
|
||||
}
|
||||
|
||||
handleInterrupt(cpu);
|
||||
cpu.handleInterrupt();
|
||||
}
|
||||
|
||||
// If we're not repeating, Fire the IRQs and disable the DMA
|
||||
|
|
@ -321,7 +318,7 @@ fn DmaController(comptime id: u2) type {
|
|||
// Reload internal DAD latch if we are in IncrementRelaod
|
||||
if (self.in_progress) {
|
||||
self._word_count = if (self.word_count == 0) std.math.maxInt(@TypeOf(self._word_count)) else self.word_count;
|
||||
if (@as(Adjustment, @enumFromInt(self.cnt.dad_adj.read())) == .IncrementReload) self.dad_latch = self.dad;
|
||||
if (@intToEnum(Adjustment, self.cnt.dad_adj.read()) == .IncrementReload) self.dad_latch = self.dad;
|
||||
}
|
||||
}
|
||||
|
||||
|
|
|
|||
|
|
@ -2,13 +2,9 @@ const std = @import("std");
|
|||
const Bit = @import("bitfield").Bit;
|
||||
const DateTime = @import("datetime").datetime.Datetime;
|
||||
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Bus = @import("../Bus.zig");
|
||||
const Scheduler = @import("../scheduler.zig").Scheduler;
|
||||
const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
|
||||
const Allocator = std.mem.Allocator;
|
||||
|
||||
const handleInterrupt = @import("../cpu_util.zig").handleInterrupt;
|
||||
|
||||
/// GPIO Register Implementation
|
||||
pub const Gpio = struct {
|
||||
const Self = @This();
|
||||
|
|
@ -31,8 +27,8 @@ pub const Gpio = struct {
|
|||
fn step(self: *Device, value: u4) u4 {
|
||||
return switch (self.kind) {
|
||||
.Rtc => blk: {
|
||||
const clock: *Clock = @ptrCast(@alignCast(self.ptr.?));
|
||||
break :blk clock.step(.{ .raw = value });
|
||||
const clock = @ptrCast(*Clock, @alignCast(@alignOf(*Clock), self.ptr.?));
|
||||
break :blk clock.step(Clock.Data{ .raw = value });
|
||||
},
|
||||
.None => value,
|
||||
};
|
||||
|
|
@ -94,7 +90,7 @@ pub const Gpio = struct {
|
|||
|
||||
pub fn deinit(self: *Self, allocator: Allocator) void {
|
||||
switch (self.device.kind) {
|
||||
.Rtc => allocator.destroy(@as(*Clock, @ptrCast(@alignCast(self.device.ptr.?)))),
|
||||
.Rtc => allocator.destroy(@ptrCast(*Clock, @alignCast(@alignOf(*Clock), self.device.ptr.?))),
|
||||
.None => {},
|
||||
}
|
||||
|
||||
|
|
@ -146,16 +142,16 @@ pub const Clock = struct {
|
|||
/// 2. A `count`, which keeps track of which byte is currently being read
|
||||
/// 3. An index, which keeps track of which bit of the byte determined by `count` is being read
|
||||
fn read(self: *Reader, clock: *const Clock, register: Register) u1 {
|
||||
const idx: u3 = @intCast(self.i);
|
||||
const idx = @intCast(u3, self.i);
|
||||
defer self.i += 1;
|
||||
|
||||
// FIXME: What do I do about the unused bits?
|
||||
return switch (register) {
|
||||
.Control => @truncate(switch (self.count) {
|
||||
.Control => @truncate(u1, switch (self.count) {
|
||||
0 => clock.cnt.raw >> idx,
|
||||
else => std.debug.panic("Tried to read from byte #{} of {} (hint: there's only 1 byte)", .{ self.count, register }),
|
||||
}),
|
||||
.DateTime => @truncate(switch (self.count) {
|
||||
.DateTime => @truncate(u1, switch (self.count) {
|
||||
// Date
|
||||
0 => clock.year >> idx,
|
||||
1 => @as(u8, clock.month) >> idx,
|
||||
|
|
@ -168,7 +164,7 @@ pub const Clock = struct {
|
|||
6 => @as(u8, clock.second) >> idx,
|
||||
else => std.debug.panic("Tried to read from byte #{} of {} (hint: there's only 7 bytes)", .{ self.count, register }),
|
||||
}),
|
||||
.Time => @truncate(switch (self.count) {
|
||||
.Time => @truncate(u1, switch (self.count) {
|
||||
0 => @as(u8, clock.hour) >> idx,
|
||||
1 => @as(u8, clock.minute) >> idx,
|
||||
2 => @as(u8, clock.second) >> idx,
|
||||
|
|
@ -207,7 +203,7 @@ pub const Clock = struct {
|
|||
|
||||
/// Append a bit to the internal bit buffer (aka an integer)
|
||||
fn push(self: *Writer, value: u1) void {
|
||||
const idx: u3 = @intCast(self.i);
|
||||
const idx = @intCast(u3, self.i);
|
||||
self.buf = (self.buf & ~(@as(u8, 1) << idx)) | @as(u8, value) << idx;
|
||||
self.i += 1;
|
||||
}
|
||||
|
|
@ -290,22 +286,20 @@ pub const Clock = struct {
|
|||
.gpio = gpio, // Can't use Arm7tdmi ptr b/c not initialized yet
|
||||
};
|
||||
|
||||
const sched_ptr: *Scheduler = @ptrCast(@alignCast(cpu.sched.ptr));
|
||||
sched_ptr.push(.RealTimeClock, 1 << 24); // Every Second
|
||||
cpu.sched.push(.RealTimeClock, 1 << 24); // Every Second
|
||||
}
|
||||
|
||||
pub fn onClockUpdate(self: *Self, late: u64) void {
|
||||
const sched_ptr: *Scheduler = @ptrCast(@alignCast(self.cpu.sched.ptr));
|
||||
sched_ptr.push(.RealTimeClock, (1 << 24) -| late); // Reschedule
|
||||
self.cpu.sched.push(.RealTimeClock, (1 << 24) -| late); // Reschedule
|
||||
|
||||
const now = DateTime.now();
|
||||
self.year = bcd(@intCast(now.date.year - 2000));
|
||||
self.month = @truncate(bcd(now.date.month));
|
||||
self.day = @truncate(bcd(now.date.day));
|
||||
self.weekday = @truncate(bcd((now.date.weekday() + 1) % 7)); // API is Monday = 0, Sunday = 6. We want Sunday = 0, Saturday = 6
|
||||
self.hour = @truncate(bcd(now.time.hour));
|
||||
self.minute = @truncate(bcd(now.time.minute));
|
||||
self.second = @truncate(bcd(now.time.second));
|
||||
self.year = bcd(@intCast(u8, now.date.year - 2000));
|
||||
self.month = @truncate(u5, bcd(now.date.month));
|
||||
self.day = @truncate(u6, bcd(now.date.day));
|
||||
self.weekday = @truncate(u3, bcd((now.date.weekday() + 1) % 7)); // API is Monday = 0, Sunday = 6. We want Sunday = 0, Saturday = 6
|
||||
self.hour = @truncate(u6, bcd(now.time.hour));
|
||||
self.minute = @truncate(u7, bcd(now.time.minute));
|
||||
self.second = @truncate(u7, bcd(now.time.second));
|
||||
}
|
||||
|
||||
fn step(self: *Self, value: Data) u4 {
|
||||
|
|
@ -321,14 +315,14 @@ pub const Clock = struct {
|
|||
}
|
||||
}
|
||||
|
||||
break :blk @truncate(value.raw);
|
||||
break :blk @truncate(u4, value.raw);
|
||||
},
|
||||
.Command => blk: {
|
||||
if (!value.cs.read()) log.err("Expected CS to be set during {}, however CS was cleared", .{self.state});
|
||||
|
||||
// If SCK rises, sample SIO
|
||||
if (!cache.sck.read() and value.sck.read()) {
|
||||
self.writer.push(@intFromBool(value.sio.read()));
|
||||
self.writer.push(@boolToInt(value.sio.read()));
|
||||
|
||||
if (self.writer.finished()) {
|
||||
self.state = self.processCommand(self.writer.buf);
|
||||
|
|
@ -338,14 +332,14 @@ pub const Clock = struct {
|
|||
}
|
||||
}
|
||||
|
||||
break :blk @truncate(value.raw);
|
||||
break :blk @truncate(u4, value.raw);
|
||||
},
|
||||
.Write => |register| blk: {
|
||||
if (!value.cs.read()) log.err("Expected CS to be set during {}, however CS was cleared", .{self.state});
|
||||
|
||||
// If SCK rises, sample SIO
|
||||
if (!cache.sck.read() and value.sck.read()) {
|
||||
self.writer.push(@intFromBool(value.sio.read()));
|
||||
self.writer.push(@boolToInt(value.sio.read()));
|
||||
|
||||
const register_width: u32 = switch (register) {
|
||||
.Control => 1,
|
||||
|
|
@ -364,7 +358,7 @@ pub const Clock = struct {
|
|||
}
|
||||
}
|
||||
|
||||
break :blk @truncate(value.raw);
|
||||
break :blk @truncate(u4, value.raw);
|
||||
},
|
||||
.Read => |register| blk: {
|
||||
if (!value.cs.read()) log.err("Expected CS to be set during {}, however CS was cleared", .{self.state});
|
||||
|
|
@ -390,7 +384,7 @@ pub const Clock = struct {
|
|||
}
|
||||
}
|
||||
|
||||
break :blk @truncate(ret.raw);
|
||||
break :blk @truncate(u4, ret.raw);
|
||||
},
|
||||
};
|
||||
}
|
||||
|
|
@ -403,13 +397,11 @@ pub const Clock = struct {
|
|||
}
|
||||
|
||||
fn irq(self: *Self) void {
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(self.cpu.bus.ptr));
|
||||
|
||||
// TODO: Confirm that this is the right behaviour
|
||||
log.debug("Force GamePak IRQ", .{});
|
||||
|
||||
bus_ptr.io.irq.game_pak.set();
|
||||
handleInterrupt(self.cpu);
|
||||
self.cpu.bus.io.irq.game_pak.set();
|
||||
self.cpu.handleInterrupt();
|
||||
}
|
||||
|
||||
fn processCommand(self: *Self, raw_command: u8) State {
|
||||
|
|
@ -429,7 +421,7 @@ pub const Clock = struct {
|
|||
log.debug("Handling Command 0x{X:0>2} [0b{b:0>8}]", .{ command, command });
|
||||
|
||||
const is_write = command & 1 == 0;
|
||||
const rtc_register: u3 = @truncate(command >> 1 & 0x7);
|
||||
const rtc_register = @truncate(u3, command >> 1 & 0x7);
|
||||
|
||||
if (is_write) {
|
||||
return switch (rtc_register) {
|
||||
|
|
|
|||
|
|
@ -43,8 +43,8 @@ pub const Io = struct {
|
|||
}
|
||||
|
||||
fn setIrqs(self: *Io, word: u32) void {
|
||||
self.ie.raw = @truncate(word);
|
||||
self.irq.raw &= ~@as(u16, @truncate(word >> 16));
|
||||
self.ie.raw = @truncate(u16, word);
|
||||
self.irq.raw &= ~@truncate(u16, word >> 16);
|
||||
}
|
||||
};
|
||||
|
||||
|
|
@ -75,8 +75,8 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
|
|||
// Interrupts
|
||||
0x0400_0200 => @as(u32, bus.io.irq.raw) << 16 | bus.io.ie.raw,
|
||||
0x0400_0204 => bus.io.waitcnt.raw,
|
||||
0x0400_0208 => @intFromBool(bus.io.ime),
|
||||
0x0400_0300 => @intFromEnum(bus.io.postflg),
|
||||
0x0400_0208 => @boolToInt(bus.io.ime),
|
||||
0x0400_0300 => @enumToInt(bus.io.postflg),
|
||||
else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
|
||||
},
|
||||
u16 => switch (address) {
|
||||
|
|
@ -96,7 +96,7 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
|
|||
0x0400_0128 => util.io.read.todo(log, "Read {} from SIOCNT", .{T}),
|
||||
|
||||
// Keypad Input
|
||||
0x0400_0130 => bus.io.keyinput.load(.monotonic),
|
||||
0x0400_0130 => bus.io.keyinput.load(.Monotonic).raw,
|
||||
|
||||
// Serial Communication 2
|
||||
0x0400_0134 => util.io.read.todo(log, "Read {} from RCNT", .{T}),
|
||||
|
|
@ -109,9 +109,9 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
|
|||
0x0400_0202 => bus.io.irq.raw,
|
||||
0x0400_0204 => bus.io.waitcnt.raw,
|
||||
0x0400_0206 => 0x0000,
|
||||
0x0400_0208 => @intFromBool(bus.io.ime),
|
||||
0x0400_0208 => @boolToInt(bus.io.ime),
|
||||
0x0400_020A => 0x0000,
|
||||
0x0400_0300 => @intFromEnum(bus.io.postflg),
|
||||
0x0400_0300 => @enumToInt(bus.io.postflg),
|
||||
0x0400_0302 => 0x0000,
|
||||
else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
|
||||
},
|
||||
|
|
@ -141,13 +141,13 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
|
|||
0x0400_015A, 0x0400_015B => 0x00,
|
||||
|
||||
// Interrupts
|
||||
0x0400_0200, 0x0400_0201 => @truncate(bus.io.ie.raw >> getHalf(@truncate(address))),
|
||||
0x0400_0202, 0x0400_0203 => @truncate(bus.io.irq.raw >> getHalf(@truncate(address))),
|
||||
0x0400_0204, 0x0400_0205 => @truncate(bus.io.waitcnt.raw >> getHalf(@truncate(address))),
|
||||
0x0400_0200, 0x0400_0201 => @truncate(T, bus.io.ie.raw >> getHalf(@truncate(u8, address))),
|
||||
0x0400_0202, 0x0400_0203 => @truncate(T, bus.io.irq.raw >> getHalf(@truncate(u8, address))),
|
||||
0x0400_0204, 0x0400_0205 => @truncate(T, bus.io.waitcnt.raw >> getHalf(@truncate(u8, address))),
|
||||
0x0400_0206, 0x0400_0207 => 0x00,
|
||||
0x0400_0208, 0x0400_0209 => @truncate(@as(u16, @intFromBool(bus.io.ime)) >> getHalf(@truncate(address))),
|
||||
0x0400_0208, 0x0400_0209 => @truncate(T, @as(u16, @boolToInt(bus.io.ime)) >> getHalf(@truncate(u8, address))),
|
||||
0x0400_020A, 0x0400_020B => 0x00,
|
||||
0x0400_0300 => @intFromEnum(bus.io.postflg),
|
||||
0x0400_0300 => @enumToInt(bus.io.postflg),
|
||||
0x0400_0301 => null,
|
||||
0x0400_0302, 0x0400_0303 => 0x00,
|
||||
else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
|
||||
|
|
@ -196,10 +196,10 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
|
|||
|
||||
// Interrupts
|
||||
0x0400_0200 => bus.io.setIrqs(value),
|
||||
0x0400_0204 => bus.io.waitcnt.set(@truncate(value)),
|
||||
0x0400_0204 => bus.io.waitcnt.set(@truncate(u16, value)),
|
||||
0x0400_0208 => bus.io.ime = value & 1 == 1,
|
||||
0x0400_0300 => {
|
||||
bus.io.postflg = @enumFromInt(value & 1);
|
||||
bus.io.postflg = @intToEnum(PostFlag, value & 1);
|
||||
bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
|
||||
},
|
||||
else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, address }),
|
||||
|
|
@ -246,7 +246,7 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
|
|||
0x0400_0208 => bus.io.ime = value & 1 == 1,
|
||||
0x0400_020A => {},
|
||||
0x0400_0300 => {
|
||||
bus.io.postflg = @enumFromInt(value & 1);
|
||||
bus.io.postflg = @intToEnum(PostFlag, value & 1);
|
||||
bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
|
||||
},
|
||||
else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, address }),
|
||||
|
|
@ -273,16 +273,16 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
|
|||
0x0400_0140 => log.debug("Wrote 0x{X:0>2} to JOYCNT_L", .{value}),
|
||||
|
||||
// Interrupts
|
||||
0x0400_0200, 0x0400_0201 => bus.io.ie.raw = setHalf(u16, bus.io.ie.raw, @truncate(address), value),
|
||||
0x0400_0200, 0x0400_0201 => bus.io.ie.raw = setHalf(u16, bus.io.ie.raw, @truncate(u8, address), value),
|
||||
0x0400_0202 => bus.io.irq.raw &= ~@as(u16, value),
|
||||
0x0400_0203 => bus.io.irq.raw &= ~@as(u16, value) << 8, // TODO: Is this good?
|
||||
0x0400_0204, 0x0400_0205 => bus.io.waitcnt.set(setHalf(u16, bus.io.waitcnt.raw, @truncate(address), value)),
|
||||
0x0400_0204, 0x0400_0205 => bus.io.waitcnt.set(setHalf(u16, @truncate(u16, bus.io.waitcnt.raw), @truncate(u8, address), value)),
|
||||
0x0400_0206, 0x0400_0207 => {},
|
||||
0x0400_0208 => bus.io.ime = value & 1 == 1,
|
||||
0x0400_0209 => {},
|
||||
0x0400_020A, 0x0400_020B => {},
|
||||
|
||||
0x0400_0300 => bus.io.postflg = @enumFromInt(value & 1),
|
||||
0x0400_0300 => bus.io.postflg = @intToEnum(PostFlag, value & 1),
|
||||
0x0400_0301 => bus.io.haltcnt = if (value >> 7 & 1 == 0) .Halt else std.debug.panic("TODO: Implement STOP", .{}),
|
||||
|
||||
0x0400_0410 => log.debug("Wrote 0x{X:0>2} to the common yet undocumented 0x{X:0>8}", .{ value, address }),
|
||||
|
|
@ -366,7 +366,7 @@ const InterruptEnable = extern union {
|
|||
|
||||
/// Read Only
|
||||
/// 0 = Pressed, 1 = Released
|
||||
pub const KeyInput = extern union {
|
||||
const KeyInput = extern union {
|
||||
a: Bit(u16, 0),
|
||||
b: Bit(u16, 1),
|
||||
select: Bit(u16, 2),
|
||||
|
|
@ -382,7 +382,7 @@ pub const KeyInput = extern union {
|
|||
|
||||
const AtomicKeyInput = struct {
|
||||
const Self = @This();
|
||||
const AtomicOrder = std.builtin.AtomicOrder;
|
||||
const Ordering = std.atomic.Ordering;
|
||||
|
||||
inner: KeyInput,
|
||||
|
||||
|
|
@ -390,19 +390,18 @@ const AtomicKeyInput = struct {
|
|||
return .{ .inner = value };
|
||||
}
|
||||
|
||||
pub inline fn load(self: *const Self, comptime ordering: AtomicOrder) u16 {
|
||||
return switch (ordering) {
|
||||
.acq_rel, .release => @compileError("not supported for atomic loads"),
|
||||
pub inline fn load(self: *const Self, comptime ordering: Ordering) KeyInput {
|
||||
return .{ .raw = switch (ordering) {
|
||||
.AcqRel, .Release => @compileError("not supported for atomic loads"),
|
||||
else => @atomicLoad(u16, &self.inner.raw, ordering),
|
||||
};
|
||||
} };
|
||||
}
|
||||
|
||||
pub inline fn fetchOr(self: *Self, value: u16, comptime ordering: AtomicOrder) void {
|
||||
_ = @atomicRmw(u16, &self.inner.raw, .Or, value, ordering);
|
||||
pub inline fn store(self: *Self, value: u16, comptime ordering: Ordering) void {
|
||||
switch (ordering) {
|
||||
.AcqRel, .Acquire => @compileError("not supported for atomic stores"),
|
||||
else => @atomicStore(u16, &self.inner.raw, value, ordering),
|
||||
}
|
||||
|
||||
pub inline fn fetchAnd(self: *Self, value: u16, comptime ordering: AtomicOrder) void {
|
||||
_ = @atomicRmw(u16, &self.inner.raw, .And, value, ordering);
|
||||
}
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -3,10 +3,7 @@ const util = @import("../../util.zig");
|
|||
|
||||
const TimerControl = @import("io.zig").TimerControl;
|
||||
const Scheduler = @import("../scheduler.zig").Scheduler;
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Bus = @import("../Bus.zig");
|
||||
|
||||
const handleInterrupt = @import("../cpu_util.zig").handleInterrupt;
|
||||
const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
|
||||
|
||||
pub const TimerTuple = struct { Timer(0), Timer(1), Timer(2), Timer(3) };
|
||||
const log = std.log.scoped(.Timer);
|
||||
|
|
@ -19,7 +16,7 @@ pub fn create(sched: *Scheduler) TimerTuple {
|
|||
}
|
||||
|
||||
pub fn read(comptime T: type, tim: *const TimerTuple, addr: u32) ?T {
|
||||
const nybble_addr: u4 = @truncate(addr);
|
||||
const nybble_addr = @truncate(u4, addr);
|
||||
|
||||
return switch (T) {
|
||||
u32 => switch (nybble_addr) {
|
||||
|
|
@ -44,24 +41,24 @@ pub fn read(comptime T: type, tim: *const TimerTuple, addr: u32) ?T {
|
|||
else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
|
||||
},
|
||||
u8 => switch (nybble_addr) {
|
||||
0x0, 0x1 => @truncate(tim.*[0].timcntL() >> getHalf(nybble_addr)),
|
||||
0x2, 0x3 => @truncate(tim.*[0].cnt.raw >> getHalf(nybble_addr)),
|
||||
0x0, 0x1 => @truncate(T, tim.*[0].timcntL() >> getHalf(nybble_addr)),
|
||||
0x2, 0x3 => @truncate(T, tim.*[0].cnt.raw >> getHalf(nybble_addr)),
|
||||
|
||||
0x4, 0x5 => @truncate(tim.*[1].timcntL() >> getHalf(nybble_addr)),
|
||||
0x6, 0x7 => @truncate(tim.*[1].cnt.raw >> getHalf(nybble_addr)),
|
||||
0x4, 0x5 => @truncate(T, tim.*[1].timcntL() >> getHalf(nybble_addr)),
|
||||
0x6, 0x7 => @truncate(T, tim.*[1].cnt.raw >> getHalf(nybble_addr)),
|
||||
|
||||
0x8, 0x9 => @truncate(tim.*[2].timcntL() >> getHalf(nybble_addr)),
|
||||
0xA, 0xB => @truncate(tim.*[2].cnt.raw >> getHalf(nybble_addr)),
|
||||
0x8, 0x9 => @truncate(T, tim.*[2].timcntL() >> getHalf(nybble_addr)),
|
||||
0xA, 0xB => @truncate(T, tim.*[2].cnt.raw >> getHalf(nybble_addr)),
|
||||
|
||||
0xC, 0xD => @truncate(tim.*[3].timcntL() >> getHalf(nybble_addr)),
|
||||
0xE, 0xF => @truncate(tim.*[3].cnt.raw >> getHalf(nybble_addr)),
|
||||
0xC, 0xD => @truncate(T, tim.*[3].timcntL() >> getHalf(nybble_addr)),
|
||||
0xE, 0xF => @truncate(T, tim.*[3].cnt.raw >> getHalf(nybble_addr)),
|
||||
},
|
||||
else => @compileError("TIM: Unsupported read width"),
|
||||
};
|
||||
}
|
||||
|
||||
pub fn write(comptime T: type, tim: *TimerTuple, addr: u32, value: T) void {
|
||||
const nybble_addr: u4 = @truncate(addr);
|
||||
const nybble_addr = @truncate(u4, addr);
|
||||
|
||||
return switch (T) {
|
||||
u32 => switch (nybble_addr) {
|
||||
|
|
@ -141,7 +138,7 @@ fn Timer(comptime id: u2) type {
|
|||
pub fn timcntL(self: *const Self) u16 {
|
||||
if (self.cnt.cascade.read() or !self.cnt.enabled.read()) return self._counter;
|
||||
|
||||
return self._counter +% @as(u16, @truncate((self.sched.now() - self._start_timestamp) / self.frequency()));
|
||||
return self._counter +% @truncate(u16, (self.sched.now() - self._start_timestamp) / self.frequency());
|
||||
}
|
||||
|
||||
/// TIMCNT_L Setter
|
||||
|
|
@ -151,8 +148,8 @@ fn Timer(comptime id: u2) type {
|
|||
|
||||
/// TIMCNT_L & TIMCNT_H
|
||||
pub fn setTimcnt(self: *Self, word: u32) void {
|
||||
self.setTimcntL(@truncate(word));
|
||||
self.setTimcntH(@truncate(word >> 16));
|
||||
self.setTimcntL(@truncate(u16, word));
|
||||
self.setTimcntH(@truncate(u16, word >> 16));
|
||||
}
|
||||
|
||||
/// TIMCNT_H
|
||||
|
|
@ -167,7 +164,7 @@ fn Timer(comptime id: u2) type {
|
|||
self.sched.removeScheduledEvent(.{ .TimerOverflow = id });
|
||||
|
||||
// Counter should hold the value it stopped at meaning we have to calculate it now
|
||||
self._counter +%= @truncate((self.sched.now() - self._start_timestamp) / self.frequency());
|
||||
self._counter +%= @truncate(u16, (self.sched.now() - self._start_timestamp) / self.frequency());
|
||||
}
|
||||
|
||||
// the timer has always been enabled, but the cascade bit which was blocking the timer has been unset
|
||||
|
|
@ -194,9 +191,7 @@ fn Timer(comptime id: u2) type {
|
|||
|
||||
pub fn onTimerExpire(self: *Self, cpu: *Arm7tdmi, late: u64) void {
|
||||
// Fire IRQ if enabled
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
const io = &bus_ptr.io;
|
||||
const io = &cpu.bus.io;
|
||||
|
||||
if (self.cnt.irq.read()) {
|
||||
switch (id) {
|
||||
|
|
@ -206,12 +201,12 @@ fn Timer(comptime id: u2) type {
|
|||
3 => io.irq.tim3.set(),
|
||||
}
|
||||
|
||||
handleInterrupt(cpu);
|
||||
cpu.handleInterrupt();
|
||||
}
|
||||
|
||||
// DMA Sound Things
|
||||
if (id == 0 or id == 1) {
|
||||
bus_ptr.apu.onDmaAudioSampleRequest(cpu, id);
|
||||
cpu.bus.apu.onDmaAudioSampleRequest(cpu, id);
|
||||
}
|
||||
|
||||
// Perform Cascade Behaviour
|
||||
|
|
@ -219,9 +214,9 @@ fn Timer(comptime id: u2) type {
|
|||
inline 0, 1, 2 => |idx| {
|
||||
const next = idx + 1;
|
||||
|
||||
if (bus_ptr.tim[next].cnt.cascade.read()) {
|
||||
bus_ptr.tim[next]._counter +%= 1;
|
||||
if (bus_ptr.tim[next]._counter == 0) bus_ptr.tim[next].onTimerExpire(cpu, late);
|
||||
if (cpu.bus.tim[next].cnt.cascade.read()) {
|
||||
cpu.bus.tim[next]._counter +%= 1;
|
||||
if (cpu.bus.tim[next]._counter == 0) cpu.bus.tim[next].onTimerExpire(cpu, late);
|
||||
}
|
||||
},
|
||||
3 => {}, // THere is no timer for TIM3 to cascade to
|
||||
|
|
|
|||
|
|
@ -0,0 +1,681 @@
|
|||
const std = @import("std");
|
||||
|
||||
const Bus = @import("Bus.zig");
|
||||
const Bit = @import("bitfield").Bit;
|
||||
const Bitfield = @import("bitfield").Bitfield;
|
||||
const Scheduler = @import("scheduler.zig").Scheduler;
|
||||
const Logger = @import("../util.zig").Logger;
|
||||
|
||||
const File = std.fs.File;
|
||||
const log = std.log.scoped(.Arm7Tdmi);
|
||||
|
||||
// ARM Instructions
|
||||
pub const arm = struct {
|
||||
pub const InstrFn = *const fn (*Arm7tdmi, *Bus, u32) void;
|
||||
const lut: [0x1000]InstrFn = populate();
|
||||
|
||||
const processing = @import("cpu/arm/data_processing.zig").dataProcessing;
|
||||
const psrTransfer = @import("cpu/arm/psr_transfer.zig").psrTransfer;
|
||||
const transfer = @import("cpu/arm/single_data_transfer.zig").singleDataTransfer;
|
||||
const halfSignedTransfer = @import("cpu/arm/half_signed_data_transfer.zig").halfAndSignedDataTransfer;
|
||||
const blockTransfer = @import("cpu/arm/block_data_transfer.zig").blockDataTransfer;
|
||||
const branch = @import("cpu/arm/branch.zig").branch;
|
||||
const branchExchange = @import("cpu/arm/branch.zig").branchAndExchange;
|
||||
const swi = @import("cpu/arm/software_interrupt.zig").armSoftwareInterrupt;
|
||||
const swap = @import("cpu/arm/single_data_swap.zig").singleDataSwap;
|
||||
|
||||
const multiply = @import("cpu/arm/multiply.zig").multiply;
|
||||
const multiplyLong = @import("cpu/arm/multiply.zig").multiplyLong;
|
||||
|
||||
/// Determine index into ARM InstrFn LUT
|
||||
fn idx(opcode: u32) u12 {
|
||||
return @truncate(u12, opcode >> 20 & 0xFF) << 4 | @truncate(u12, opcode >> 4 & 0xF);
|
||||
}
|
||||
|
||||
// Undefined ARM Instruction handler
|
||||
fn und(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
|
||||
const id = idx(opcode);
|
||||
cpu.panic("[CPU/Decode] ID: 0x{X:0>3} 0x{X:0>8} is an illegal opcode", .{ id, opcode });
|
||||
}
|
||||
|
||||
fn populate() [0x1000]InstrFn {
|
||||
comptime {
|
||||
@setEvalBranchQuota(0xE000);
|
||||
var table = [_]InstrFn{und} ** 0x1000;
|
||||
|
||||
for (&table, 0..) |*handler, i| {
|
||||
handler.* = switch (@as(u2, i >> 10)) {
|
||||
0b00 => if (i == 0x121) blk: {
|
||||
break :blk branchExchange;
|
||||
} else if (i & 0xFCF == 0x009) blk: {
|
||||
const A = i >> 5 & 1 == 1;
|
||||
const S = i >> 4 & 1 == 1;
|
||||
break :blk multiply(A, S);
|
||||
} else if (i & 0xFBF == 0x109) blk: {
|
||||
const B = i >> 6 & 1 == 1;
|
||||
break :blk swap(B);
|
||||
} else if (i & 0xF8F == 0x089) blk: {
|
||||
const U = i >> 6 & 1 == 1;
|
||||
const A = i >> 5 & 1 == 1;
|
||||
const S = i >> 4 & 1 == 1;
|
||||
break :blk multiplyLong(U, A, S);
|
||||
} else if (i & 0xE49 == 0x009 or i & 0xE49 == 0x049) blk: {
|
||||
const P = i >> 8 & 1 == 1;
|
||||
const U = i >> 7 & 1 == 1;
|
||||
const I = i >> 6 & 1 == 1;
|
||||
const W = i >> 5 & 1 == 1;
|
||||
const L = i >> 4 & 1 == 1;
|
||||
break :blk halfSignedTransfer(P, U, I, W, L);
|
||||
} else if (i & 0xD90 == 0x100) blk: {
|
||||
const I = i >> 9 & 1 == 1;
|
||||
const R = i >> 6 & 1 == 1;
|
||||
const kind = i >> 4 & 0x3;
|
||||
break :blk psrTransfer(I, R, kind);
|
||||
} else blk: {
|
||||
const I = i >> 9 & 1 == 1;
|
||||
const S = i >> 4 & 1 == 1;
|
||||
const instrKind = i >> 5 & 0xF;
|
||||
break :blk processing(I, S, instrKind);
|
||||
},
|
||||
0b01 => if (i >> 9 & 1 == 1 and i & 1 == 1) und else blk: {
|
||||
const I = i >> 9 & 1 == 1;
|
||||
const P = i >> 8 & 1 == 1;
|
||||
const U = i >> 7 & 1 == 1;
|
||||
const B = i >> 6 & 1 == 1;
|
||||
const W = i >> 5 & 1 == 1;
|
||||
const L = i >> 4 & 1 == 1;
|
||||
break :blk transfer(I, P, U, B, W, L);
|
||||
},
|
||||
else => switch (@as(u2, i >> 9 & 0x3)) {
|
||||
// MSB is guaranteed to be 1
|
||||
0b00 => blk: {
|
||||
const P = i >> 8 & 1 == 1;
|
||||
const U = i >> 7 & 1 == 1;
|
||||
const S = i >> 6 & 1 == 1;
|
||||
const W = i >> 5 & 1 == 1;
|
||||
const L = i >> 4 & 1 == 1;
|
||||
break :blk blockTransfer(P, U, S, W, L);
|
||||
},
|
||||
0b01 => blk: {
|
||||
const L = i >> 8 & 1 == 1;
|
||||
break :blk branch(L);
|
||||
},
|
||||
0b10 => und, // COP Data Transfer
|
||||
0b11 => if (i >> 8 & 1 == 1) swi() else und, // COP Data Operation + Register Transfer
|
||||
},
|
||||
};
|
||||
}
|
||||
|
||||
return table;
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
// THUMB Instructions
|
||||
pub const thumb = struct {
|
||||
pub const InstrFn = *const fn (*Arm7tdmi, *Bus, u16) void;
|
||||
const lut: [0x400]InstrFn = populate();
|
||||
|
||||
const processing = @import("cpu/thumb/data_processing.zig");
|
||||
const alu = @import("cpu/thumb/alu.zig").fmt4;
|
||||
const transfer = @import("cpu/thumb/data_transfer.zig");
|
||||
const block_transfer = @import("cpu/thumb/block_data_transfer.zig");
|
||||
const swi = @import("cpu/thumb/software_interrupt.zig").fmt17;
|
||||
const branch = @import("cpu/thumb/branch.zig");
|
||||
|
||||
/// Determine index into THUMB InstrFn LUT
|
||||
fn idx(opcode: u16) u10 {
|
||||
return @truncate(u10, opcode >> 6);
|
||||
}
|
||||
|
||||
/// Undefined THUMB Instruction Handler
|
||||
fn und(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
const id = idx(opcode);
|
||||
cpu.panic("[CPU/Decode] ID: 0b{b:0>10} 0x{X:0>2} is an illegal opcode", .{ id, opcode });
|
||||
}
|
||||
|
||||
fn populate() [0x400]InstrFn {
|
||||
comptime {
|
||||
@setEvalBranchQuota(5025); // This is exact
|
||||
var table = [_]InstrFn{und} ** 0x400;
|
||||
|
||||
for (&table, 0..) |*handler, i| {
|
||||
handler.* = switch (@as(u3, i >> 7 & 0x7)) {
|
||||
0b000 => if (i >> 5 & 0x3 == 0b11) blk: {
|
||||
const I = i >> 4 & 1 == 1;
|
||||
const is_sub = i >> 3 & 1 == 1;
|
||||
const rn = i & 0x7;
|
||||
break :blk processing.fmt2(I, is_sub, rn);
|
||||
} else blk: {
|
||||
const op = i >> 5 & 0x3;
|
||||
const offset = i & 0x1F;
|
||||
break :blk processing.fmt1(op, offset);
|
||||
},
|
||||
0b001 => blk: {
|
||||
const op = i >> 5 & 0x3;
|
||||
const rd = i >> 2 & 0x7;
|
||||
break :blk processing.fmt3(op, rd);
|
||||
},
|
||||
0b010 => switch (@as(u2, i >> 5 & 0x3)) {
|
||||
0b00 => if (i >> 4 & 1 == 1) blk: {
|
||||
const op = i >> 2 & 0x3;
|
||||
const h1 = i >> 1 & 1;
|
||||
const h2 = i & 1;
|
||||
break :blk processing.fmt5(op, h1, h2);
|
||||
} else blk: {
|
||||
const op = i & 0xF;
|
||||
break :blk alu(op);
|
||||
},
|
||||
0b01 => blk: {
|
||||
const rd = i >> 2 & 0x7;
|
||||
break :blk transfer.fmt6(rd);
|
||||
},
|
||||
else => blk: {
|
||||
const op = i >> 4 & 0x3;
|
||||
const T = i >> 3 & 1 == 1;
|
||||
break :blk transfer.fmt78(op, T);
|
||||
},
|
||||
},
|
||||
0b011 => blk: {
|
||||
const B = i >> 6 & 1 == 1;
|
||||
const L = i >> 5 & 1 == 1;
|
||||
const offset = i & 0x1F;
|
||||
break :blk transfer.fmt9(B, L, offset);
|
||||
},
|
||||
else => switch (@as(u3, i >> 6 & 0x7)) {
|
||||
// MSB is guaranteed to be 1
|
||||
0b000 => blk: {
|
||||
const L = i >> 5 & 1 == 1;
|
||||
const offset = i & 0x1F;
|
||||
break :blk transfer.fmt10(L, offset);
|
||||
},
|
||||
0b001 => blk: {
|
||||
const L = i >> 5 & 1 == 1;
|
||||
const rd = i >> 2 & 0x7;
|
||||
break :blk transfer.fmt11(L, rd);
|
||||
},
|
||||
0b010 => blk: {
|
||||
const isSP = i >> 5 & 1 == 1;
|
||||
const rd = i >> 2 & 0x7;
|
||||
break :blk processing.fmt12(isSP, rd);
|
||||
},
|
||||
0b011 => if (i >> 4 & 1 == 1) blk: {
|
||||
const L = i >> 5 & 1 == 1;
|
||||
const R = i >> 2 & 1 == 1;
|
||||
break :blk block_transfer.fmt14(L, R);
|
||||
} else blk: {
|
||||
const S = i >> 1 & 1 == 1;
|
||||
break :blk processing.fmt13(S);
|
||||
},
|
||||
0b100 => blk: {
|
||||
const L = i >> 5 & 1 == 1;
|
||||
const rb = i >> 2 & 0x7;
|
||||
|
||||
break :blk block_transfer.fmt15(L, rb);
|
||||
},
|
||||
0b101 => if (i >> 2 & 0xF == 0b1111) blk: {
|
||||
break :blk thumb.swi();
|
||||
} else blk: {
|
||||
const cond = i >> 2 & 0xF;
|
||||
break :blk branch.fmt16(cond);
|
||||
},
|
||||
0b110 => branch.fmt18(),
|
||||
0b111 => blk: {
|
||||
const is_low = i >> 5 & 1 == 1;
|
||||
break :blk branch.fmt19(is_low);
|
||||
},
|
||||
},
|
||||
};
|
||||
}
|
||||
|
||||
return table;
|
||||
}
|
||||
}
|
||||
};
|
||||
|
||||
pub const Arm7tdmi = struct {
|
||||
const Self = @This();
|
||||
|
||||
r: [16]u32,
|
||||
pipe: Pipeline,
|
||||
sched: *Scheduler,
|
||||
bus: *Bus,
|
||||
cpsr: PSR,
|
||||
spsr: PSR,
|
||||
|
||||
bank: Bank,
|
||||
|
||||
logger: ?Logger,
|
||||
|
||||
/// Bank of Registers from other CPU Modes
|
||||
const Bank = struct {
|
||||
/// Storage for r13_<mode>, r14_<mode>
|
||||
/// e.g. [r13, r14, r13_svc, r14_svc]
|
||||
r: [2 * 6]u32,
|
||||
|
||||
/// Storage for R8_fiq -> R12_fiq and their normal counterparts
|
||||
/// e.g [r[0 + 8], fiq_r[0 + 8], r[1 + 8], fiq_r[1 + 8]...]
|
||||
fiq: [2 * 5]u32,
|
||||
|
||||
spsr: [5]PSR,
|
||||
|
||||
const Kind = enum(u1) {
|
||||
R13 = 0,
|
||||
R14,
|
||||
};
|
||||
|
||||
pub fn create() Bank {
|
||||
return .{
|
||||
.r = [_]u32{0x00} ** 12,
|
||||
.fiq = [_]u32{0x00} ** 10,
|
||||
.spsr = [_]PSR{.{ .raw = 0x0000_0000 }} ** 5,
|
||||
};
|
||||
}
|
||||
|
||||
inline fn regIdx(mode: Mode, kind: Kind) usize {
|
||||
const idx: usize = switch (mode) {
|
||||
.User, .System => 0,
|
||||
.Supervisor => 1,
|
||||
.Abort => 2,
|
||||
.Undefined => 3,
|
||||
.Irq => 4,
|
||||
.Fiq => 5,
|
||||
};
|
||||
|
||||
return (idx * 2) + if (kind == .R14) @as(usize, 1) else 0;
|
||||
}
|
||||
|
||||
inline fn spsrIdx(mode: Mode) usize {
|
||||
return switch (mode) {
|
||||
.Supervisor => 0,
|
||||
.Abort => 1,
|
||||
.Undefined => 2,
|
||||
.Irq => 3,
|
||||
.Fiq => 4,
|
||||
else => std.debug.panic("[CPU/Mode] {} does not have a SPSR Register", .{mode}),
|
||||
};
|
||||
}
|
||||
|
||||
inline fn fiqIdx(i: usize, mode: Mode) usize {
|
||||
return (i * 2) + if (mode == .Fiq) @as(usize, 1) else 0;
|
||||
}
|
||||
};
|
||||
|
||||
pub fn init(sched: *Scheduler, bus: *Bus, log_file: ?std.fs.File) Self {
|
||||
return Self{
|
||||
.r = [_]u32{0x00} ** 16,
|
||||
.pipe = Pipeline.init(),
|
||||
.sched = sched,
|
||||
.bus = bus,
|
||||
.cpsr = .{ .raw = 0x0000_001F },
|
||||
.spsr = .{ .raw = 0x0000_0000 },
|
||||
.bank = Bank.create(),
|
||||
.logger = if (log_file) |file| Logger.init(file) else null,
|
||||
};
|
||||
}
|
||||
|
||||
// FIXME: Resetting disables logging (if enabled)
|
||||
pub fn reset(self: *Self) void {
|
||||
const bus_ptr = self.bus;
|
||||
const scheduler_ptr = self.sched;
|
||||
|
||||
self.* = Self.init(scheduler_ptr, bus_ptr, null);
|
||||
}
|
||||
|
||||
pub inline fn hasSPSR(self: *const Self) bool {
|
||||
const mode = getModeChecked(self, self.cpsr.mode.read());
|
||||
return switch (mode) {
|
||||
.System, .User => false,
|
||||
else => true,
|
||||
};
|
||||
}
|
||||
|
||||
pub inline fn isPrivileged(self: *const Self) bool {
|
||||
const mode = getModeChecked(self, self.cpsr.mode.read());
|
||||
return switch (mode) {
|
||||
.User => false,
|
||||
else => true,
|
||||
};
|
||||
}
|
||||
|
||||
pub inline fn isHalted(self: *const Self) bool {
|
||||
return self.bus.io.haltcnt == .Halt;
|
||||
}
|
||||
|
||||
pub fn setCpsr(self: *Self, value: u32) void {
|
||||
if (value & 0x1F != self.cpsr.raw & 0x1F) self.changeModeFromIdx(@truncate(u5, value & 0x1F));
|
||||
self.cpsr.raw = value;
|
||||
}
|
||||
|
||||
fn changeModeFromIdx(self: *Self, next: u5) void {
|
||||
self.changeMode(getModeChecked(self, next));
|
||||
}
|
||||
|
||||
pub fn setUserModeRegister(self: *Self, idx: usize, value: u32) void {
|
||||
const current = getModeChecked(self, self.cpsr.mode.read());
|
||||
|
||||
switch (idx) {
|
||||
8...12 => {
|
||||
if (current == .Fiq) {
|
||||
self.bank.fiq[Bank.fiqIdx(idx - 8, .User)] = value;
|
||||
} else self.r[idx] = value;
|
||||
},
|
||||
13, 14 => switch (current) {
|
||||
.User, .System => self.r[idx] = value,
|
||||
else => {
|
||||
const kind = std.meta.intToEnum(Bank.Kind, idx - 13) catch unreachable;
|
||||
self.bank.r[Bank.regIdx(.User, kind)] = value;
|
||||
},
|
||||
},
|
||||
else => self.r[idx] = value, // R0 -> R7 and R15
|
||||
}
|
||||
}
|
||||
|
||||
pub fn getUserModeRegister(self: *Self, idx: usize) u32 {
|
||||
const current = getModeChecked(self, self.cpsr.mode.read());
|
||||
|
||||
return switch (idx) {
|
||||
8...12 => if (current == .Fiq) self.bank.fiq[Bank.fiqIdx(idx - 8, .User)] else self.r[idx],
|
||||
13, 14 => switch (current) {
|
||||
.User, .System => self.r[idx],
|
||||
else => blk: {
|
||||
const kind = std.meta.intToEnum(Bank.Kind, idx - 13) catch unreachable;
|
||||
break :blk self.bank.r[Bank.regIdx(.User, kind)];
|
||||
},
|
||||
},
|
||||
else => self.r[idx], // R0 -> R7 and R15
|
||||
};
|
||||
}
|
||||
|
||||
pub fn changeMode(self: *Self, next: Mode) void {
|
||||
const now = getModeChecked(self, self.cpsr.mode.read());
|
||||
|
||||
// Bank R8 -> r12
|
||||
for (0..5) |i| {
|
||||
self.bank.fiq[Bank.fiqIdx(i, now)] = self.r[8 + i];
|
||||
}
|
||||
|
||||
// Bank r13, r14, SPSR
|
||||
switch (now) {
|
||||
.User, .System => {
|
||||
self.bank.r[Bank.regIdx(now, .R13)] = self.r[13];
|
||||
self.bank.r[Bank.regIdx(now, .R14)] = self.r[14];
|
||||
},
|
||||
else => {
|
||||
self.bank.r[Bank.regIdx(now, .R13)] = self.r[13];
|
||||
self.bank.r[Bank.regIdx(now, .R14)] = self.r[14];
|
||||
self.bank.spsr[Bank.spsrIdx(now)] = self.spsr;
|
||||
},
|
||||
}
|
||||
|
||||
// Grab R8 -> R12
|
||||
for (0..5) |i| {
|
||||
self.r[8 + i] = self.bank.fiq[Bank.fiqIdx(i, next)];
|
||||
}
|
||||
|
||||
// Grab r13, r14, SPSR
|
||||
switch (next) {
|
||||
.User, .System => {
|
||||
self.r[13] = self.bank.r[Bank.regIdx(next, .R13)];
|
||||
self.r[14] = self.bank.r[Bank.regIdx(next, .R14)];
|
||||
},
|
||||
else => {
|
||||
self.r[13] = self.bank.r[Bank.regIdx(next, .R13)];
|
||||
self.r[14] = self.bank.r[Bank.regIdx(next, .R14)];
|
||||
self.spsr = self.bank.spsr[Bank.spsrIdx(next)];
|
||||
},
|
||||
}
|
||||
|
||||
self.cpsr.mode.write(@enumToInt(next));
|
||||
}
|
||||
|
||||
/// Advances state so that the BIOS is skipped
|
||||
///
|
||||
/// Note: This accesses the CPU's bus ptr so it only may be called
|
||||
/// once the Bus has been properly initialized
|
||||
///
|
||||
/// TODO: Make above notice impossible to do in code
|
||||
pub fn fastBoot(self: *Self) void {
|
||||
self.r = std.mem.zeroes([16]u32);
|
||||
|
||||
// self.r[0] = 0x08000000;
|
||||
// self.r[1] = 0x000000EA;
|
||||
self.r[13] = 0x0300_7F00;
|
||||
self.r[15] = 0x0800_0000;
|
||||
|
||||
self.bank.r[Bank.regIdx(.Irq, .R13)] = 0x0300_7FA0;
|
||||
self.bank.r[Bank.regIdx(.Supervisor, .R13)] = 0x0300_7FE0;
|
||||
|
||||
// self.cpsr.raw = 0x6000001F;
|
||||
self.cpsr.raw = 0x0000_001F;
|
||||
|
||||
self.bus.bios.addr_latch = 0x0000_00DC + 8;
|
||||
}
|
||||
|
||||
pub fn step(self: *Self) void {
|
||||
defer {
|
||||
if (!self.pipe.flushed) self.r[15] += if (self.cpsr.t.read()) 2 else @as(u32, 4);
|
||||
self.pipe.flushed = false;
|
||||
}
|
||||
|
||||
if (self.cpsr.t.read()) {
|
||||
const opcode = @truncate(u16, self.pipe.step(self, u16) orelse return);
|
||||
if (self.logger) |*trace| trace.mgbaLog(self, opcode);
|
||||
|
||||
thumb.lut[thumb.idx(opcode)](self, self.bus, opcode);
|
||||
} else {
|
||||
const opcode = self.pipe.step(self, u32) orelse return;
|
||||
if (self.logger) |*trace| trace.mgbaLog(self, opcode);
|
||||
|
||||
if (checkCond(self.cpsr, @truncate(u4, opcode >> 28))) {
|
||||
arm.lut[arm.idx(opcode)](self, self.bus, opcode);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
pub fn stepDmaTransfer(self: *Self) bool {
|
||||
inline for (0..4) |i| {
|
||||
if (self.bus.dma[i].in_progress) {
|
||||
self.bus.dma[i].step(self);
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
pub fn handleInterrupt(self: *Self) void {
|
||||
const should_handle = self.bus.io.ie.raw & self.bus.io.irq.raw;
|
||||
|
||||
// Return if IME is disabled, CPSR I is set or there is nothing to handle
|
||||
if (!self.bus.io.ime or self.cpsr.i.read() or should_handle == 0) return;
|
||||
|
||||
// If Pipeline isn't full, we have a bug
|
||||
std.debug.assert(self.pipe.isFull());
|
||||
|
||||
// log.debug("Handling Interrupt!", .{});
|
||||
self.bus.io.haltcnt = .Execute;
|
||||
|
||||
// FIXME: This seems weird, but retAddr.gba suggests I need to make these changes
|
||||
const ret_addr = self.r[15] - if (self.cpsr.t.read()) 0 else @as(u32, 4);
|
||||
const new_spsr = self.cpsr.raw;
|
||||
|
||||
self.changeMode(.Irq);
|
||||
self.cpsr.t.write(false);
|
||||
self.cpsr.i.write(true);
|
||||
|
||||
self.r[14] = ret_addr;
|
||||
self.spsr.raw = new_spsr;
|
||||
self.r[15] = 0x0000_0018;
|
||||
self.pipe.reload(self);
|
||||
}
|
||||
|
||||
inline fn fetch(self: *Self, comptime T: type, address: u32) T {
|
||||
comptime std.debug.assert(T == u32 or T == u16); // Opcode may be 32-bit (ARM) or 16-bit (THUMB)
|
||||
|
||||
// Bus.read will advance the scheduler. There are different timings for CPU fetches,
|
||||
// so we want to undo what Bus.read will apply. We can do this by caching the current tick
|
||||
// This is very dumb.
|
||||
//
|
||||
// FIXME: Please rework this
|
||||
const tick_cache = self.sched.tick;
|
||||
defer self.sched.tick = tick_cache + Bus.fetch_timings[@boolToInt(T == u32)][@truncate(u4, address >> 24)];
|
||||
|
||||
return self.bus.read(T, address);
|
||||
}
|
||||
|
||||
pub fn panic(self: *const Self, comptime format: []const u8, args: anytype) noreturn {
|
||||
var i: usize = 0;
|
||||
while (i < 16) : (i += 4) {
|
||||
const i_1 = i + 1;
|
||||
const i_2 = i + 2;
|
||||
const i_3 = i + 3;
|
||||
std.debug.print("R{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\n", .{ i, self.r[i], i_1, self.r[i_1], i_2, self.r[i_2], i_3, self.r[i_3] });
|
||||
}
|
||||
std.debug.print("cpsr: 0x{X:0>8} ", .{self.cpsr.raw});
|
||||
self.cpsr.toString();
|
||||
|
||||
std.debug.print("spsr: 0x{X:0>8} ", .{self.spsr.raw});
|
||||
self.spsr.toString();
|
||||
|
||||
std.debug.print("pipeline: {??X:0>8}\n", .{self.pipe.stage});
|
||||
|
||||
if (self.cpsr.t.read()) {
|
||||
const opcode = self.bus.dbgRead(u16, self.r[15] - 4);
|
||||
const id = thumb.idx(opcode);
|
||||
std.debug.print("opcode: ID: 0x{b:0>10} 0x{X:0>4}\n", .{ id, opcode });
|
||||
} else {
|
||||
const opcode = self.bus.dbgRead(u32, self.r[15] - 4);
|
||||
const id = arm.idx(opcode);
|
||||
std.debug.print("opcode: ID: 0x{X:0>3} 0x{X:0>8}\n", .{ id, opcode });
|
||||
}
|
||||
|
||||
std.debug.print("tick: {}\n\n", .{self.sched.tick});
|
||||
|
||||
std.debug.panic(format, args);
|
||||
}
|
||||
};
|
||||
|
||||
const condition_lut = [_]u16{
|
||||
0xF0F0, // EQ - Equal
|
||||
0x0F0F, // NE - Not Equal
|
||||
0xCCCC, // CS - Unsigned higher or same
|
||||
0x3333, // CC - Unsigned lower
|
||||
0xFF00, // MI - Negative
|
||||
0x00FF, // PL - Positive or Zero
|
||||
0xAAAA, // VS - Overflow
|
||||
0x5555, // VC - No Overflow
|
||||
0x0C0C, // HI - unsigned hierh
|
||||
0xF3F3, // LS - unsigned lower or same
|
||||
0xAA55, // GE - greater or equal
|
||||
0x55AA, // LT - less than
|
||||
0x0A05, // GT - greater than
|
||||
0xF5FA, // LE - less than or equal
|
||||
0xFFFF, // AL - always
|
||||
0x0000, // NV - never
|
||||
};
|
||||
|
||||
pub inline fn checkCond(cpsr: PSR, cond: u4) bool {
|
||||
const flags = @truncate(u4, cpsr.raw >> 28);
|
||||
|
||||
return condition_lut[cond] & (@as(u16, 1) << flags) != 0;
|
||||
}
|
||||
|
||||
const Pipeline = struct {
|
||||
const Self = @This();
|
||||
stage: [2]?u32,
|
||||
flushed: bool,
|
||||
|
||||
fn init() Self {
|
||||
return .{
|
||||
.stage = [_]?u32{null} ** 2,
|
||||
.flushed = false,
|
||||
};
|
||||
}
|
||||
|
||||
pub fn isFull(self: *const Self) bool {
|
||||
return self.stage[0] != null and self.stage[1] != null;
|
||||
}
|
||||
|
||||
pub fn step(self: *Self, cpu: *Arm7tdmi, comptime T: type) ?u32 {
|
||||
comptime std.debug.assert(T == u32 or T == u16);
|
||||
|
||||
const opcode = self.stage[0];
|
||||
self.stage[0] = self.stage[1];
|
||||
self.stage[1] = cpu.fetch(T, cpu.r[15]);
|
||||
|
||||
return opcode;
|
||||
}
|
||||
|
||||
pub fn reload(self: *Self, cpu: *Arm7tdmi) void {
|
||||
if (cpu.cpsr.t.read()) {
|
||||
self.stage[0] = cpu.fetch(u16, cpu.r[15]);
|
||||
self.stage[1] = cpu.fetch(u16, cpu.r[15] + 2);
|
||||
cpu.r[15] += 4;
|
||||
} else {
|
||||
self.stage[0] = cpu.fetch(u32, cpu.r[15]);
|
||||
self.stage[1] = cpu.fetch(u32, cpu.r[15] + 4);
|
||||
cpu.r[15] += 8;
|
||||
}
|
||||
|
||||
self.flushed = true;
|
||||
}
|
||||
};
|
||||
|
||||
pub const PSR = extern union {
|
||||
mode: Bitfield(u32, 0, 5),
|
||||
t: Bit(u32, 5),
|
||||
f: Bit(u32, 6),
|
||||
i: Bit(u32, 7),
|
||||
v: Bit(u32, 28),
|
||||
c: Bit(u32, 29),
|
||||
z: Bit(u32, 30),
|
||||
n: Bit(u32, 31),
|
||||
raw: u32,
|
||||
|
||||
fn toString(self: PSR) void {
|
||||
std.debug.print("[", .{});
|
||||
|
||||
if (self.n.read()) std.debug.print("N", .{}) else std.debug.print("-", .{});
|
||||
if (self.z.read()) std.debug.print("Z", .{}) else std.debug.print("-", .{});
|
||||
if (self.c.read()) std.debug.print("C", .{}) else std.debug.print("-", .{});
|
||||
if (self.v.read()) std.debug.print("V", .{}) else std.debug.print("-", .{});
|
||||
if (self.i.read()) std.debug.print("I", .{}) else std.debug.print("-", .{});
|
||||
if (self.f.read()) std.debug.print("F", .{}) else std.debug.print("-", .{});
|
||||
if (self.t.read()) std.debug.print("T", .{}) else std.debug.print("-", .{});
|
||||
std.debug.print("|", .{});
|
||||
if (getMode(self.mode.read())) |m| std.debug.print("{s}", .{m.toString()}) else std.debug.print("---", .{});
|
||||
|
||||
std.debug.print("]\n", .{});
|
||||
}
|
||||
};
|
||||
|
||||
pub const Mode = enum(u5) {
|
||||
User = 0b10000,
|
||||
Fiq = 0b10001,
|
||||
Irq = 0b10010,
|
||||
Supervisor = 0b10011,
|
||||
Abort = 0b10111,
|
||||
Undefined = 0b11011,
|
||||
System = 0b11111,
|
||||
|
||||
pub fn toString(self: Mode) []const u8 {
|
||||
return switch (self) {
|
||||
.User => "usr",
|
||||
.Fiq => "fiq",
|
||||
.Irq => "irq",
|
||||
.Supervisor => "svc",
|
||||
.Abort => "abt",
|
||||
.Undefined => "und",
|
||||
.System => "sys",
|
||||
};
|
||||
}
|
||||
};
|
||||
|
||||
fn getMode(bits: u5) ?Mode {
|
||||
return std.meta.intToEnum(Mode, bits) catch null;
|
||||
}
|
||||
|
||||
fn getModeChecked(cpu: *const Arm7tdmi, bits: u5) Mode {
|
||||
return getMode(bits) orelse cpu.panic("[CPU/CPSR] 0b{b:0>5} is an invalid CPU mode", .{bits});
|
||||
}
|
||||
|
|
@ -0,0 +1,111 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
||||
|
||||
pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, comptime W: bool, comptime L: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
|
||||
const rn = @truncate(u4, opcode >> 16 & 0xF);
|
||||
const rlist = opcode & 0xFFFF;
|
||||
const r15 = rlist >> 15 & 1 == 1;
|
||||
|
||||
var count: u32 = 0;
|
||||
var i: u5 = 0;
|
||||
var first: u4 = 0;
|
||||
var write_to_base = true;
|
||||
|
||||
while (i < 16) : (i += 1) {
|
||||
const r = @truncate(u4, 15 - i);
|
||||
if (rlist >> r & 1 == 1) {
|
||||
first = r;
|
||||
count += 1;
|
||||
}
|
||||
}
|
||||
|
||||
var start = cpu.r[rn];
|
||||
if (U) {
|
||||
start += if (P) 4 else 0;
|
||||
} else {
|
||||
start = start - (4 * count) + if (!P) 4 else 0;
|
||||
}
|
||||
|
||||
var end = cpu.r[rn];
|
||||
if (U) {
|
||||
end = end + (4 * count) - if (!P) 4 else 0;
|
||||
} else {
|
||||
end -= if (P) 4 else 0;
|
||||
}
|
||||
|
||||
var new_base = cpu.r[rn];
|
||||
if (U) {
|
||||
new_base += 4 * count;
|
||||
} else {
|
||||
new_base -= 4 * count;
|
||||
}
|
||||
|
||||
var address = start;
|
||||
|
||||
if (rlist == 0) {
|
||||
var und_addr = cpu.r[rn];
|
||||
if (U) {
|
||||
und_addr += if (P) 4 else 0;
|
||||
} else {
|
||||
und_addr -= 0x40 - if (!P) 4 else 0;
|
||||
}
|
||||
|
||||
if (L) {
|
||||
cpu.r[15] = bus.read(u32, und_addr);
|
||||
cpu.pipe.reload(cpu);
|
||||
} else {
|
||||
bus.write(u32, und_addr, cpu.r[15] + 4);
|
||||
}
|
||||
|
||||
cpu.r[rn] = if (U) cpu.r[rn] + 0x40 else cpu.r[rn] - 0x40;
|
||||
return;
|
||||
}
|
||||
|
||||
i = first;
|
||||
while (i < 16) : (i += 1) {
|
||||
if (rlist >> i & 1 == 1) {
|
||||
transfer(cpu, bus, r15, i, address);
|
||||
address += 4;
|
||||
|
||||
if (W and !L and write_to_base) {
|
||||
cpu.r[rn] = new_base;
|
||||
write_to_base = false;
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
if (W and L and rlist >> rn & 1 == 0) cpu.r[rn] = new_base;
|
||||
}
|
||||
|
||||
fn transfer(cpu: *Arm7tdmi, bus: *Bus, r15_present: bool, i: u5, address: u32) void {
|
||||
if (L) {
|
||||
if (S and !r15_present) {
|
||||
// Always Transfer User mode Registers
|
||||
cpu.setUserModeRegister(i, bus.read(u32, address));
|
||||
} else {
|
||||
const value = bus.read(u32, address);
|
||||
|
||||
cpu.r[i] = value;
|
||||
if (i == 0xF) {
|
||||
cpu.r[i] &= ~@as(u32, 3); // Align r15
|
||||
cpu.pipe.reload(cpu);
|
||||
|
||||
if (S) cpu.setCpsr(cpu.spsr.raw);
|
||||
}
|
||||
}
|
||||
} else {
|
||||
if (S) {
|
||||
// Always Transfer User mode Registers
|
||||
// This happens regardless if r15 is in the list
|
||||
const value = cpu.getUserModeRegister(i);
|
||||
bus.write(u32, address, value + if (i == 0xF) 4 else @as(u32, 0)); // PC is already 8 ahead to make 12
|
||||
} else {
|
||||
bus.write(u32, address, cpu.r[i] + if (i == 0xF) 4 else @as(u32, 0));
|
||||
}
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -0,0 +1,26 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
||||
|
||||
const sext = @import("zba-util").sext;
|
||||
|
||||
pub fn branch(comptime L: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
|
||||
if (L) cpu.r[14] = cpu.r[15] - 4;
|
||||
|
||||
cpu.r[15] +%= sext(u32, u24, opcode) << 2;
|
||||
cpu.pipe.reload(cpu);
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn branchAndExchange(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
|
||||
const rn = opcode & 0xF;
|
||||
|
||||
const thumb = cpu.r[rn] & 1 == 1;
|
||||
cpu.r[15] = cpu.r[rn] & if (thumb) ~@as(u32, 1) else ~@as(u32, 3);
|
||||
|
||||
cpu.cpsr.t.write(thumb);
|
||||
cpu.pipe.reload(cpu);
|
||||
}
|
||||
|
|
@ -0,0 +1,185 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
||||
|
||||
const exec = @import("../barrel_shifter.zig").exec;
|
||||
const ror = @import("../barrel_shifter.zig").ror;
|
||||
|
||||
pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime kind: u4) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
|
||||
const rd = @truncate(u4, opcode >> 12 & 0xF);
|
||||
const rn = opcode >> 16 & 0xF;
|
||||
const old_carry = @boolToInt(cpu.cpsr.c.read());
|
||||
|
||||
// If certain conditions are met, PC is 12 ahead instead of 8
|
||||
// TODO: Why these conditions?
|
||||
if (!I and opcode >> 4 & 1 == 1) cpu.r[15] += 4;
|
||||
const op1 = cpu.r[rn];
|
||||
|
||||
const amount = @truncate(u8, (opcode >> 8 & 0xF) << 1);
|
||||
const op2 = if (I) ror(S, &cpu.cpsr, opcode & 0xFF, amount) else exec(S, cpu, opcode);
|
||||
|
||||
// Undo special condition from above
|
||||
if (!I and opcode >> 4 & 1 == 1) cpu.r[15] -= 4;
|
||||
|
||||
var result: u32 = undefined;
|
||||
var overflow: u1 = undefined;
|
||||
|
||||
// Perform Data Processing Logic
|
||||
switch (kind) {
|
||||
0x0 => result = op1 & op2, // AND
|
||||
0x1 => result = op1 ^ op2, // EOR
|
||||
0x2 => result = op1 -% op2, // SUB
|
||||
0x3 => result = op2 -% op1, // RSB
|
||||
0x4 => result = add(&overflow, op1, op2), // ADD
|
||||
0x5 => result = adc(&overflow, op1, op2, old_carry), // ADC
|
||||
0x6 => result = sbc(op1, op2, old_carry), // SBC
|
||||
0x7 => result = sbc(op2, op1, old_carry), // RSC
|
||||
0x8 => {
|
||||
// TST
|
||||
if (rd == 0xF)
|
||||
return undefinedTestBehaviour(cpu);
|
||||
|
||||
result = op1 & op2;
|
||||
},
|
||||
0x9 => {
|
||||
// TEQ
|
||||
if (rd == 0xF)
|
||||
return undefinedTestBehaviour(cpu);
|
||||
|
||||
result = op1 ^ op2;
|
||||
},
|
||||
0xA => {
|
||||
// CMP
|
||||
if (rd == 0xF)
|
||||
return undefinedTestBehaviour(cpu);
|
||||
|
||||
result = op1 -% op2;
|
||||
},
|
||||
0xB => {
|
||||
// CMN
|
||||
if (rd == 0xF)
|
||||
return undefinedTestBehaviour(cpu);
|
||||
|
||||
const tmp = @addWithOverflow(op1, op2);
|
||||
result = tmp[0];
|
||||
overflow = tmp[1];
|
||||
},
|
||||
0xC => result = op1 | op2, // ORR
|
||||
0xD => result = op2, // MOV
|
||||
0xE => result = op1 & ~op2, // BIC
|
||||
0xF => result = ~op2, // MVN
|
||||
}
|
||||
|
||||
// Write to Destination Register
|
||||
switch (kind) {
|
||||
0x8, 0x9, 0xA, 0xB => {}, // Test Operations
|
||||
else => {
|
||||
cpu.r[rd] = result;
|
||||
if (rd == 0xF) {
|
||||
if (S) cpu.setCpsr(cpu.spsr.raw);
|
||||
cpu.pipe.reload(cpu);
|
||||
}
|
||||
},
|
||||
}
|
||||
|
||||
// Write Flags
|
||||
switch (kind) {
|
||||
0x0, 0x1, 0xC, 0xD, 0xE, 0xF => if (S and rd != 0xF) {
|
||||
// Logic Operation Flags
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
// C set by Barrel Shifter, V is unaffected
|
||||
|
||||
},
|
||||
0x2, 0x3 => if (S and rd != 0xF) {
|
||||
// SUB, RSB Flags
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
|
||||
if (kind == 0x2) {
|
||||
// SUB specific
|
||||
cpu.cpsr.c.write(op2 <= op1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
|
||||
} else {
|
||||
// RSB Specific
|
||||
cpu.cpsr.c.write(op1 <= op2);
|
||||
cpu.cpsr.v.write(((op2 ^ result) & (~op1 ^ result)) >> 31 & 1 == 1);
|
||||
}
|
||||
},
|
||||
0x4, 0x5 => if (S and rd != 0xF) {
|
||||
// ADD, ADC Flags
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
cpu.cpsr.c.write(overflow == 0b1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
|
||||
},
|
||||
0x6, 0x7 => if (S and rd != 0xF) {
|
||||
// SBC, RSC Flags
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
|
||||
if (kind == 0x6) {
|
||||
// SBC specific
|
||||
const subtrahend = @as(u64, op2) -% old_carry +% 1;
|
||||
cpu.cpsr.c.write(subtrahend <= op1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
|
||||
} else {
|
||||
// RSC Specific
|
||||
const subtrahend = @as(u64, op1) -% old_carry +% 1;
|
||||
cpu.cpsr.c.write(subtrahend <= op2);
|
||||
cpu.cpsr.v.write(((op2 ^ result) & (~op1 ^ result)) >> 31 & 1 == 1);
|
||||
}
|
||||
},
|
||||
0x8, 0x9, 0xA, 0xB => {
|
||||
// Test Operation Flags
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
|
||||
if (kind == 0xA) {
|
||||
// CMP specific
|
||||
cpu.cpsr.c.write(op2 <= op1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
|
||||
} else if (kind == 0xB) {
|
||||
// CMN specific
|
||||
cpu.cpsr.c.write(overflow == 0b1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
|
||||
} else {
|
||||
// TST, TEQ specific
|
||||
// Barrel Shifter should always calc CPSR C in TST
|
||||
if (!S) _ = exec(true, cpu, opcode);
|
||||
}
|
||||
},
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn sbc(left: u32, right: u32, old_carry: u1) u32 {
|
||||
// TODO: Make your own version (thanks peach.bot)
|
||||
const subtrahend = @as(u64, right) -% old_carry +% 1;
|
||||
const ret = @truncate(u32, left -% subtrahend);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
pub fn add(overflow: *u1, left: u32, right: u32) u32 {
|
||||
const ret = @addWithOverflow(left, right);
|
||||
overflow.* = ret[1];
|
||||
|
||||
return ret[0];
|
||||
}
|
||||
|
||||
pub fn adc(overflow: *u1, left: u32, right: u32, old_carry: u1) u32 {
|
||||
const tmp = @addWithOverflow(left, right);
|
||||
const ret = @addWithOverflow(tmp[0], old_carry);
|
||||
overflow.* = tmp[1] | ret[1];
|
||||
|
||||
return ret[0];
|
||||
}
|
||||
|
||||
fn undefinedTestBehaviour(cpu: *Arm7tdmi) void {
|
||||
@setCold(true);
|
||||
cpu.setCpsr(cpu.spsr.raw);
|
||||
}
|
||||
|
|
@ -0,0 +1,53 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
||||
|
||||
const sext = @import("zba-util").sext;
|
||||
const rotr = @import("zba-util").rotr;
|
||||
|
||||
pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
|
||||
const rn = opcode >> 16 & 0xF;
|
||||
const rd = opcode >> 12 & 0xF;
|
||||
const rm = opcode & 0xF;
|
||||
const imm_offset_high = opcode >> 8 & 0xF;
|
||||
|
||||
const base = cpu.r[rn] + if (!L and rn == 0xF) 4 else @as(u32, 0);
|
||||
const offset = if (I) imm_offset_high << 4 | rm else cpu.r[rm];
|
||||
|
||||
const modified_base = if (U) base +% offset else base -% offset;
|
||||
var address = if (P) modified_base else base;
|
||||
|
||||
var result: u32 = undefined;
|
||||
if (L) {
|
||||
switch (@truncate(u2, opcode >> 5)) {
|
||||
0b01 => {
|
||||
// LDRH
|
||||
const value = bus.read(u16, address);
|
||||
result = rotr(u32, value, 8 * (address & 1));
|
||||
},
|
||||
0b10 => {
|
||||
// LDRSB
|
||||
result = sext(u32, u8, bus.read(u8, address));
|
||||
},
|
||||
0b11 => {
|
||||
// LDRSH
|
||||
const value = bus.read(u16, address);
|
||||
result = if (address & 1 == 1) sext(u32, u8, @truncate(u8, value >> 8)) else sext(u32, u16, value);
|
||||
},
|
||||
0b00 => unreachable, // SWP
|
||||
}
|
||||
} else {
|
||||
if (opcode >> 5 & 0x01 == 0x01) {
|
||||
// STRH
|
||||
bus.write(u16, address, @truncate(u16, cpu.r[rd]));
|
||||
} else unreachable; // SWP
|
||||
}
|
||||
|
||||
address = modified_base;
|
||||
if (W and P or !P) cpu.r[rn] = address;
|
||||
if (L) cpu.r[rd] = result; // // This emulates the LDR rd == rn behaviour
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -0,0 +1,57 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
||||
|
||||
pub fn multiply(comptime A: bool, comptime S: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
|
||||
const rd = opcode >> 16 & 0xF;
|
||||
const rn = opcode >> 12 & 0xF;
|
||||
const rs = opcode >> 8 & 0xF;
|
||||
const rm = opcode & 0xF;
|
||||
|
||||
const temp: u64 = @as(u64, cpu.r[rm]) * @as(u64, cpu.r[rs]) + if (A) cpu.r[rn] else 0;
|
||||
const result = @truncate(u32, temp);
|
||||
cpu.r[rd] = result;
|
||||
|
||||
if (S) {
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
// V is unaffected, C is *actually* undefined in ARMv4
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn multiplyLong(comptime U: bool, comptime A: bool, comptime S: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
|
||||
const rd_hi = opcode >> 16 & 0xF;
|
||||
const rd_lo = opcode >> 12 & 0xF;
|
||||
const rs = opcode >> 8 & 0xF;
|
||||
const rm = opcode & 0xF;
|
||||
|
||||
if (U) {
|
||||
// Signed (WHY IS IT U THEN?)
|
||||
var result: i64 = @as(i64, @bitCast(i32, cpu.r[rm])) * @as(i64, @bitCast(i32, cpu.r[rs]));
|
||||
if (A) result +%= @bitCast(i64, @as(u64, cpu.r[rd_hi]) << 32 | @as(u64, cpu.r[rd_lo]));
|
||||
|
||||
cpu.r[rd_hi] = @bitCast(u32, @truncate(i32, result >> 32));
|
||||
cpu.r[rd_lo] = @bitCast(u32, @truncate(i32, result));
|
||||
} else {
|
||||
// Unsigned
|
||||
var result: u64 = @as(u64, cpu.r[rm]) * @as(u64, cpu.r[rs]);
|
||||
if (A) result +%= @as(u64, cpu.r[rd_hi]) << 32 | @as(u64, cpu.r[rd_lo]);
|
||||
|
||||
cpu.r[rd_hi] = @truncate(u32, result >> 32);
|
||||
cpu.r[rd_lo] = @truncate(u32, result);
|
||||
}
|
||||
|
||||
if (S) {
|
||||
cpu.cpsr.z.write(cpu.r[rd_hi] == 0 and cpu.r[rd_lo] == 0);
|
||||
cpu.cpsr.n.write(cpu.r[rd_hi] >> 31 & 1 == 1);
|
||||
// C and V are set to meaningless values
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -0,0 +1,59 @@
|
|||
const std = @import("std");
|
||||
|
||||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
||||
const PSR = @import("../../cpu.zig").PSR;
|
||||
|
||||
const log = std.log.scoped(.PsrTransfer);
|
||||
|
||||
const rotr = @import("zba-util").rotr;
|
||||
|
||||
pub fn psrTransfer(comptime I: bool, comptime R: bool, comptime kind: u2) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
|
||||
switch (kind) {
|
||||
0b00 => {
|
||||
// MRS
|
||||
const rd = opcode >> 12 & 0xF;
|
||||
|
||||
if (R and !cpu.hasSPSR()) log.err("Tried to read SPSR from User/System Mode", .{});
|
||||
cpu.r[rd] = if (R) cpu.spsr.raw else cpu.cpsr.raw;
|
||||
},
|
||||
0b10 => {
|
||||
// MSR
|
||||
const field_mask = @truncate(u4, opcode >> 16 & 0xF);
|
||||
const rm_idx = opcode & 0xF;
|
||||
const right = if (I) rotr(u32, opcode & 0xFF, (opcode >> 8 & 0xF) * 2) else cpu.r[rm_idx];
|
||||
|
||||
if (R and !cpu.hasSPSR()) log.err("Tried to write to SPSR in User/System Mode", .{});
|
||||
|
||||
if (R) {
|
||||
// arm.gba seems to expect the SPSR to do somethign in SYS mode,
|
||||
// so we just assume that despite writing to the SPSR in USR or SYS mode
|
||||
// being UNPREDICTABLE, it just magically has a working SPSR somehow
|
||||
cpu.spsr.raw = fieldMask(&cpu.spsr, field_mask, right);
|
||||
} else {
|
||||
if (cpu.isPrivileged()) cpu.setCpsr(fieldMask(&cpu.cpsr, field_mask, right));
|
||||
}
|
||||
},
|
||||
else => cpu.panic("[CPU/PSR Transfer] Bits 21:220 of {X:0>8} are undefined", .{opcode}),
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
fn fieldMask(psr: *const PSR, field_mask: u4, right: u32) u32 {
|
||||
// This bitwise ORs bits 3 and 0 of the field mask into a u2
|
||||
// We do this because we only care about bits 7:0 and 31:28 of the CPSR
|
||||
const bits = @truncate(u2, (field_mask >> 2 & 0x2) | (field_mask & 1));
|
||||
|
||||
const mask: u32 = switch (bits) {
|
||||
0b00 => 0x0000_0000,
|
||||
0b01 => 0x0000_00FF,
|
||||
0b10 => 0xF000_0000,
|
||||
0b11 => 0xF000_00FF,
|
||||
};
|
||||
|
||||
return (psr.raw & ~mask) | (right & mask);
|
||||
}
|
||||
|
|
@ -0,0 +1,29 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
||||
|
||||
const rotr = @import("zba-util").rotr;
|
||||
|
||||
pub fn singleDataSwap(comptime B: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
|
||||
const rn = opcode >> 16 & 0xF;
|
||||
const rd = opcode >> 12 & 0xF;
|
||||
const rm = opcode & 0xF;
|
||||
|
||||
const address = cpu.r[rn];
|
||||
|
||||
if (B) {
|
||||
// SWPB
|
||||
const value = bus.read(u8, address);
|
||||
bus.write(u8, address, @truncate(u8, cpu.r[rm]));
|
||||
cpu.r[rd] = value;
|
||||
} else {
|
||||
// SWP
|
||||
const value = rotr(u32, bus.read(u32, address), 8 * (address & 0x3));
|
||||
bus.write(u32, address, cpu.r[rm]);
|
||||
cpu.r[rd] = value;
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -0,0 +1,55 @@
|
|||
const shifter = @import("../barrel_shifter.zig");
|
||||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
||||
|
||||
const rotr = @import("zba-util").rotr;
|
||||
|
||||
pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
|
||||
const rn = opcode >> 16 & 0xF;
|
||||
const rd = opcode >> 12 & 0xF;
|
||||
|
||||
const base = cpu.r[rn];
|
||||
const offset = if (I) shifter.immediate(false, cpu, opcode) else opcode & 0xFFF;
|
||||
|
||||
const modified_base = if (U) base +% offset else base -% offset;
|
||||
var address = if (P) modified_base else base;
|
||||
|
||||
var result: u32 = undefined;
|
||||
if (L) {
|
||||
if (B) {
|
||||
// LDRB
|
||||
result = bus.read(u8, address);
|
||||
} else {
|
||||
// LDR
|
||||
const value = bus.read(u32, address);
|
||||
result = rotr(u32, value, 8 * (address & 0x3));
|
||||
}
|
||||
} else {
|
||||
if (B) {
|
||||
// STRB
|
||||
const value = cpu.r[rd] + if (rd == 0xF) 4 else @as(u32, 0); // PC is 12 ahead
|
||||
bus.write(u8, address, @truncate(u8, value));
|
||||
} else {
|
||||
// STR
|
||||
const value = cpu.r[rd] + if (rd == 0xF) 4 else @as(u32, 0);
|
||||
bus.write(u32, address, value);
|
||||
}
|
||||
}
|
||||
|
||||
address = modified_base;
|
||||
if (W and P or !P) {
|
||||
cpu.r[rn] = address;
|
||||
if (rn == 0xF) cpu.pipe.reload(cpu);
|
||||
}
|
||||
|
||||
if (L) {
|
||||
// This emulates the LDR rd == rn behaviour
|
||||
cpu.r[rd] = result;
|
||||
if (rd == 0xF) cpu.pipe.reload(cpu);
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").arm.InstrFn;
|
||||
|
||||
pub fn armSoftwareInterrupt() InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, _: u32) void {
|
||||
// Copy Values from Current Mode
|
||||
const ret_addr = cpu.r[15] - 4;
|
||||
const cpsr = cpu.cpsr.raw;
|
||||
|
||||
// Switch Mode
|
||||
cpu.changeMode(.Supervisor);
|
||||
cpu.cpsr.t.write(false); // Force ARM Mode
|
||||
cpu.cpsr.i.write(true); // Disable normal interrupts
|
||||
|
||||
cpu.r[14] = ret_addr; // Resume Execution
|
||||
cpu.spsr.raw = cpsr; // Previous mode CPSR
|
||||
cpu.r[15] = 0x0000_0008;
|
||||
cpu.pipe.reload(cpu);
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -0,0 +1,147 @@
|
|||
const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
|
||||
const CPSR = @import("../cpu.zig").PSR;
|
||||
|
||||
const rotr = @import("zba-util").rotr;
|
||||
|
||||
pub fn exec(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
|
||||
var result: u32 = undefined;
|
||||
if (opcode >> 4 & 1 == 1) {
|
||||
result = register(S, cpu, opcode);
|
||||
} else {
|
||||
result = immediate(S, cpu, opcode);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
fn register(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
|
||||
const rs_idx = opcode >> 8 & 0xF;
|
||||
const rm = cpu.r[opcode & 0xF];
|
||||
const rs = @truncate(u8, cpu.r[rs_idx]);
|
||||
|
||||
return switch (@truncate(u2, opcode >> 5)) {
|
||||
0b00 => lsl(S, &cpu.cpsr, rm, rs),
|
||||
0b01 => lsr(S, &cpu.cpsr, rm, rs),
|
||||
0b10 => asr(S, &cpu.cpsr, rm, rs),
|
||||
0b11 => ror(S, &cpu.cpsr, rm, rs),
|
||||
};
|
||||
}
|
||||
|
||||
pub fn immediate(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
|
||||
const amount = @truncate(u8, opcode >> 7 & 0x1F);
|
||||
const rm = cpu.r[opcode & 0xF];
|
||||
|
||||
var result: u32 = undefined;
|
||||
if (amount == 0) {
|
||||
switch (@truncate(u2, opcode >> 5)) {
|
||||
0b00 => {
|
||||
// LSL #0
|
||||
result = rm;
|
||||
},
|
||||
0b01 => {
|
||||
// LSR #0 aka LSR #32
|
||||
if (S) cpu.cpsr.c.write(rm >> 31 & 1 == 1);
|
||||
result = 0x0000_0000;
|
||||
},
|
||||
0b10 => {
|
||||
// ASR #0 aka ASR #32
|
||||
result = @bitCast(u32, @bitCast(i32, rm) >> 31);
|
||||
if (S) cpu.cpsr.c.write(result >> 31 & 1 == 1);
|
||||
},
|
||||
0b11 => {
|
||||
// ROR #0 aka RRX
|
||||
const carry: u32 = @boolToInt(cpu.cpsr.c.read());
|
||||
if (S) cpu.cpsr.c.write(rm & 1 == 1);
|
||||
|
||||
result = (carry << 31) | (rm >> 1);
|
||||
},
|
||||
}
|
||||
} else {
|
||||
switch (@truncate(u2, opcode >> 5)) {
|
||||
0b00 => result = lsl(S, &cpu.cpsr, rm, amount),
|
||||
0b01 => result = lsr(S, &cpu.cpsr, rm, amount),
|
||||
0b10 => result = asr(S, &cpu.cpsr, rm, amount),
|
||||
0b11 => result = ror(S, &cpu.cpsr, rm, amount),
|
||||
}
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
pub fn lsl(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
|
||||
const amount = @truncate(u5, total_amount);
|
||||
const bit_count: u8 = @typeInfo(u32).Int.bits;
|
||||
|
||||
var result: u32 = 0x0000_0000;
|
||||
if (total_amount < bit_count) {
|
||||
// We can perform a well-defined shift here
|
||||
result = rm << amount;
|
||||
|
||||
if (S and total_amount != 0) {
|
||||
const carry_bit = @truncate(u5, bit_count - amount);
|
||||
cpsr.c.write(rm >> carry_bit & 1 == 1);
|
||||
}
|
||||
} else {
|
||||
if (S) {
|
||||
if (total_amount == bit_count) {
|
||||
// Shifted all bits out, carry bit is bit 0 of rm
|
||||
cpsr.c.write(rm & 1 == 1);
|
||||
} else {
|
||||
cpsr.c.write(false);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
pub fn lsr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u32 {
|
||||
const amount = @truncate(u5, total_amount);
|
||||
const bit_count: u8 = @typeInfo(u32).Int.bits;
|
||||
|
||||
var result: u32 = 0x0000_0000;
|
||||
if (total_amount < bit_count) {
|
||||
// We can perform a well-defined shift
|
||||
result = rm >> amount;
|
||||
if (S and total_amount != 0) cpsr.c.write(rm >> (amount - 1) & 1 == 1);
|
||||
} else {
|
||||
if (S) {
|
||||
if (total_amount == bit_count) {
|
||||
// LSR #32
|
||||
cpsr.c.write(rm >> 31 & 1 == 1);
|
||||
} else {
|
||||
// All bits have been shifted out, including carry bit
|
||||
cpsr.c.write(false);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
pub fn asr(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
|
||||
const amount = @truncate(u5, total_amount);
|
||||
const bit_count: u8 = @typeInfo(u32).Int.bits;
|
||||
|
||||
var result: u32 = 0x0000_0000;
|
||||
if (total_amount < bit_count) {
|
||||
result = @bitCast(u32, @bitCast(i32, rm) >> amount);
|
||||
if (S and total_amount != 0) cpsr.c.write(rm >> (amount - 1) & 1 == 1);
|
||||
} else {
|
||||
// ASR #32 and ASR #>32 have the same result
|
||||
result = @bitCast(u32, @bitCast(i32, rm) >> 31);
|
||||
if (S) cpsr.c.write(result >> 31 & 1 == 1);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
pub fn ror(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
|
||||
const result = rotr(u32, rm, total_amount);
|
||||
|
||||
if (S and total_amount != 0) {
|
||||
cpsr.c.write(result >> 31 & 1 == 1);
|
||||
}
|
||||
|
||||
return result;
|
||||
}
|
||||
|
|
@ -0,0 +1,108 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
|
||||
|
||||
const adc = @import("../arm/data_processing.zig").adc;
|
||||
const sbc = @import("../arm/data_processing.zig").sbc;
|
||||
|
||||
const lsl = @import("../barrel_shifter.zig").lsl;
|
||||
const lsr = @import("../barrel_shifter.zig").lsr;
|
||||
const asr = @import("../barrel_shifter.zig").asr;
|
||||
const ror = @import("../barrel_shifter.zig").ror;
|
||||
|
||||
pub fn fmt4(comptime op: u4) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
const rs = opcode >> 3 & 0x7;
|
||||
const rd = opcode & 0x7;
|
||||
const carry = @boolToInt(cpu.cpsr.c.read());
|
||||
|
||||
const op1 = cpu.r[rd];
|
||||
const op2 = cpu.r[rs];
|
||||
|
||||
var result: u32 = undefined;
|
||||
var overflow: u1 = undefined;
|
||||
|
||||
switch (op) {
|
||||
0x0 => result = op1 & op2, // AND
|
||||
0x1 => result = op1 ^ op2, // EOR
|
||||
0x2 => result = lsl(true, &cpu.cpsr, op1, @truncate(u8, op2)), // LSL
|
||||
0x3 => result = lsr(true, &cpu.cpsr, op1, @truncate(u8, op2)), // LSR
|
||||
0x4 => result = asr(true, &cpu.cpsr, op1, @truncate(u8, op2)), // ASR
|
||||
0x5 => result = adc(&overflow, op1, op2, carry), // ADC
|
||||
0x6 => result = sbc(op1, op2, carry), // SBC
|
||||
0x7 => result = ror(true, &cpu.cpsr, op1, @truncate(u8, op2)), // ROR
|
||||
0x8 => result = op1 & op2, // TST
|
||||
0x9 => result = 0 -% op2, // NEG
|
||||
0xA => result = op1 -% op2, // CMP
|
||||
0xB => {
|
||||
// CMN
|
||||
const tmp = @addWithOverflow(op1, op2);
|
||||
result = tmp[0];
|
||||
overflow = tmp[1];
|
||||
},
|
||||
0xC => result = op1 | op2, // ORR
|
||||
0xD => result = @truncate(u32, @as(u64, op2) * @as(u64, op1)),
|
||||
0xE => result = op1 & ~op2,
|
||||
0xF => result = ~op2,
|
||||
}
|
||||
|
||||
// Write to Destination Register
|
||||
switch (op) {
|
||||
0x8, 0xA, 0xB => {},
|
||||
else => cpu.r[rd] = result,
|
||||
}
|
||||
|
||||
// Write Flags
|
||||
switch (op) {
|
||||
0x0, 0x1, 0x2, 0x3, 0x4, 0x7, 0xC, 0xE, 0xF => {
|
||||
// Logic Operations
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
// C set by Barrel Shifter, V is unaffected
|
||||
},
|
||||
0x8, 0xA => {
|
||||
// Test Flags
|
||||
// CMN (0xB) is handled with ADC
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
|
||||
if (op == 0xA) {
|
||||
// CMP specific
|
||||
cpu.cpsr.c.write(op2 <= op1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
|
||||
}
|
||||
},
|
||||
0x5, 0xB => {
|
||||
// ADC, CMN
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
cpu.cpsr.c.write(overflow == 0b1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
|
||||
},
|
||||
0x6 => {
|
||||
// SBC
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
|
||||
const subtrahend = @as(u64, op2) -% carry +% 1;
|
||||
cpu.cpsr.c.write(subtrahend <= op1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
|
||||
},
|
||||
0x9 => {
|
||||
// NEG
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
cpu.cpsr.c.write(op2 <= 0);
|
||||
cpu.cpsr.v.write(((0 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
|
||||
},
|
||||
0xD => {
|
||||
// Multiplication
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
// V is unaffected, assuming similar behaviour to ARMv4 MUL C is undefined
|
||||
},
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -0,0 +1,100 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
|
||||
|
||||
pub fn fmt14(comptime L: bool, comptime R: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
|
||||
const count = @boolToInt(R) + countRlist(opcode);
|
||||
const start = cpu.r[13] - if (!L) count * 4 else 0;
|
||||
|
||||
var end = cpu.r[13];
|
||||
if (L) {
|
||||
end += count * 4;
|
||||
} else {
|
||||
end -= 4;
|
||||
}
|
||||
|
||||
var address = start;
|
||||
|
||||
var i: u4 = 0;
|
||||
while (i < 8) : (i += 1) {
|
||||
if (opcode >> i & 1 == 1) {
|
||||
if (L) {
|
||||
cpu.r[i] = bus.read(u32, address);
|
||||
} else {
|
||||
bus.write(u32, address, cpu.r[i]);
|
||||
}
|
||||
|
||||
address += 4;
|
||||
}
|
||||
}
|
||||
|
||||
if (R) {
|
||||
if (L) {
|
||||
const value = bus.read(u32, address);
|
||||
cpu.r[15] = value & ~@as(u32, 1);
|
||||
cpu.pipe.reload(cpu);
|
||||
} else {
|
||||
bus.write(u32, address, cpu.r[14]);
|
||||
}
|
||||
address += 4;
|
||||
}
|
||||
|
||||
cpu.r[13] = if (L) end else start;
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt15(comptime L: bool, comptime rb: u3) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
|
||||
var address = cpu.r[rb];
|
||||
const end_address = cpu.r[rb] + 4 * countRlist(opcode);
|
||||
|
||||
if (opcode & 0xFF == 0) {
|
||||
if (L) {
|
||||
cpu.r[15] = bus.read(u32, address);
|
||||
cpu.pipe.reload(cpu);
|
||||
} else {
|
||||
bus.write(u32, address, cpu.r[15] + 2);
|
||||
}
|
||||
|
||||
cpu.r[rb] += 0x40;
|
||||
return;
|
||||
}
|
||||
|
||||
var i: u4 = 0;
|
||||
var first_write = true;
|
||||
|
||||
while (i < 8) : (i += 1) {
|
||||
if (opcode >> i & 1 == 1) {
|
||||
if (L) {
|
||||
cpu.r[i] = bus.read(u32, address);
|
||||
} else {
|
||||
bus.write(u32, address, cpu.r[i]);
|
||||
}
|
||||
|
||||
if (!L and first_write) {
|
||||
cpu.r[rb] = end_address;
|
||||
first_write = false;
|
||||
}
|
||||
|
||||
address += 4;
|
||||
}
|
||||
}
|
||||
|
||||
if (L and opcode >> rb & 1 != 1) cpu.r[rb] = address;
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
inline fn countRlist(opcode: u16) u32 {
|
||||
var count: u32 = 0;
|
||||
|
||||
inline for (0..8) |i| {
|
||||
if (opcode >> (7 - i) & 1 == 1) count += 1;
|
||||
}
|
||||
|
||||
return count;
|
||||
}
|
||||
|
|
@ -0,0 +1,54 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
|
||||
|
||||
const checkCond = @import("../../cpu.zig").checkCond;
|
||||
const sext = @import("zba-util").sext;
|
||||
|
||||
pub fn fmt16(comptime cond: u4) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
// B
|
||||
if (cond == 0xE or cond == 0xF)
|
||||
cpu.panic("[CPU/THUMB.16] Undefined conditional branch with condition {}", .{cond});
|
||||
|
||||
if (!checkCond(cpu.cpsr, cond)) return;
|
||||
|
||||
cpu.r[15] +%= sext(u32, u8, opcode & 0xFF) << 1;
|
||||
cpu.pipe.reload(cpu);
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt18() InstrFn {
|
||||
return struct {
|
||||
// B but conditional
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
cpu.r[15] +%= sext(u32, u11, opcode & 0x7FF) << 1;
|
||||
cpu.pipe.reload(cpu);
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt19(comptime is_low: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
// BL
|
||||
const offset = opcode & 0x7FF;
|
||||
|
||||
if (is_low) {
|
||||
// Instruction 2
|
||||
const next_opcode = cpu.r[15] - 2;
|
||||
|
||||
cpu.r[15] = cpu.r[14] +% (offset << 1);
|
||||
cpu.r[14] = next_opcode | 1;
|
||||
|
||||
cpu.pipe.reload(cpu);
|
||||
} else {
|
||||
// Instruction 1
|
||||
const lr_offset = sext(u32, u11, offset) << 12;
|
||||
cpu.r[14] = (cpu.r[15] +% lr_offset) & ~@as(u32, 1);
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -0,0 +1,199 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
|
||||
|
||||
const add = @import("../arm/data_processing.zig").add;
|
||||
|
||||
const lsl = @import("../barrel_shifter.zig").lsl;
|
||||
const lsr = @import("../barrel_shifter.zig").lsr;
|
||||
const asr = @import("../barrel_shifter.zig").asr;
|
||||
|
||||
pub fn fmt1(comptime op: u2, comptime offset: u5) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
const rs = opcode >> 3 & 0x7;
|
||||
const rd = opcode & 0x7;
|
||||
|
||||
const result = switch (op) {
|
||||
0b00 => blk: {
|
||||
// LSL
|
||||
if (offset == 0) {
|
||||
break :blk cpu.r[rs];
|
||||
} else {
|
||||
break :blk lsl(true, &cpu.cpsr, cpu.r[rs], offset);
|
||||
}
|
||||
},
|
||||
0b01 => blk: {
|
||||
// LSR
|
||||
if (offset == 0) {
|
||||
cpu.cpsr.c.write(cpu.r[rs] >> 31 & 1 == 1);
|
||||
break :blk @as(u32, 0);
|
||||
} else {
|
||||
break :blk lsr(true, &cpu.cpsr, cpu.r[rs], offset);
|
||||
}
|
||||
},
|
||||
0b10 => blk: {
|
||||
// ASR
|
||||
if (offset == 0) {
|
||||
cpu.cpsr.c.write(cpu.r[rs] >> 31 & 1 == 1);
|
||||
break :blk @bitCast(u32, @bitCast(i32, cpu.r[rs]) >> 31);
|
||||
} else {
|
||||
break :blk asr(true, &cpu.cpsr, cpu.r[rs], offset);
|
||||
}
|
||||
},
|
||||
else => cpu.panic("[CPU/THUMB.1] 0b{b:0>2} is not a valid op", .{op}),
|
||||
};
|
||||
|
||||
// Equivalent to an ARM MOVS
|
||||
cpu.r[rd] = result;
|
||||
|
||||
// Write Flags
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt5(comptime op: u2, comptime h1: u1, comptime h2: u1) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
const rs = @as(u4, h2) << 3 | (opcode >> 3 & 0x7);
|
||||
const rd = @as(u4, h1) << 3 | (opcode & 0x7);
|
||||
|
||||
const op1 = cpu.r[rd];
|
||||
const op2 = cpu.r[rs];
|
||||
|
||||
var result: u32 = undefined;
|
||||
var overflow: u1 = undefined;
|
||||
switch (op) {
|
||||
0b00 => result = add(&overflow, op1, op2), // ADD
|
||||
0b01 => result = op1 -% op2, // CMP
|
||||
0b10 => result = op2, // MOV
|
||||
0b11 => {},
|
||||
}
|
||||
|
||||
// Write to Destination Register
|
||||
switch (op) {
|
||||
0b01 => {}, // Test Instruction
|
||||
0b11 => {
|
||||
// BX
|
||||
const is_thumb = op2 & 1 == 1;
|
||||
cpu.r[15] = op2 & ~@as(u32, 1);
|
||||
|
||||
cpu.cpsr.t.write(is_thumb);
|
||||
cpu.pipe.reload(cpu);
|
||||
},
|
||||
else => {
|
||||
cpu.r[rd] = result;
|
||||
if (rd == 0xF) {
|
||||
cpu.r[15] &= ~@as(u32, 1);
|
||||
cpu.pipe.reload(cpu);
|
||||
}
|
||||
},
|
||||
}
|
||||
|
||||
// Write Flags
|
||||
switch (op) {
|
||||
0b01 => {
|
||||
// CMP
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
cpu.cpsr.c.write(op2 <= op1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
|
||||
},
|
||||
0b00, 0b10, 0b11 => {}, // MOV and Branch Instruction
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt2(comptime I: bool, is_sub: bool, rn: u3) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
const rs = opcode >> 3 & 0x7;
|
||||
const rd = @truncate(u3, opcode);
|
||||
const op1 = cpu.r[rs];
|
||||
const op2: u32 = if (I) rn else cpu.r[rn];
|
||||
|
||||
if (is_sub) {
|
||||
// SUB
|
||||
const result = op1 -% op2;
|
||||
cpu.r[rd] = result;
|
||||
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
cpu.cpsr.c.write(op2 <= op1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
|
||||
} else {
|
||||
// ADD
|
||||
var overflow: u1 = undefined;
|
||||
const result = add(&overflow, op1, op2);
|
||||
cpu.r[rd] = result;
|
||||
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
cpu.cpsr.c.write(overflow == 0b1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt3(comptime op: u2, comptime rd: u3) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
const op1 = cpu.r[rd];
|
||||
const op2: u32 = opcode & 0xFF; // Offset
|
||||
|
||||
var overflow: u1 = undefined;
|
||||
const result: u32 = switch (op) {
|
||||
0b00 => op2, // MOV
|
||||
0b01 => op1 -% op2, // CMP
|
||||
0b10 => add(&overflow, op1, op2), // ADD
|
||||
0b11 => op1 -% op2, // SUB
|
||||
};
|
||||
|
||||
// Write to Register
|
||||
if (op != 0b01) cpu.r[rd] = result;
|
||||
|
||||
// Write Flags
|
||||
cpu.cpsr.n.write(result >> 31 & 1 == 1);
|
||||
cpu.cpsr.z.write(result == 0);
|
||||
|
||||
switch (op) {
|
||||
0b00 => {}, // MOV | C set by Barrel Shifter, V is unaffected
|
||||
0b01, 0b11 => {
|
||||
// SUB, CMP
|
||||
cpu.cpsr.c.write(op2 <= op1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (~op2 ^ result)) >> 31 & 1 == 1);
|
||||
},
|
||||
0b10 => {
|
||||
// ADD
|
||||
cpu.cpsr.c.write(overflow == 0b1);
|
||||
cpu.cpsr.v.write(((op1 ^ result) & (op2 ^ result)) >> 31 & 1 == 1);
|
||||
},
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt12(comptime isSP: bool, comptime rd: u3) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
// ADD
|
||||
const left = if (isSP) cpu.r[13] else cpu.r[15] & ~@as(u32, 2);
|
||||
const right = (opcode & 0xFF) << 2;
|
||||
cpu.r[rd] = left + right;
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt13(comptime S: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
|
||||
// ADD
|
||||
const offset = (opcode & 0x7F) << 2;
|
||||
cpu.r[13] = if (S) cpu.r[13] - offset else cpu.r[13] + offset;
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -0,0 +1,145 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
|
||||
|
||||
const rotr = @import("zba-util").rotr;
|
||||
const sext = @import("zba-util").sext;
|
||||
|
||||
pub fn fmt6(comptime rd: u3) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
|
||||
// LDR
|
||||
const offset = (opcode & 0xFF) << 2;
|
||||
|
||||
// Bit 1 of the PC intentionally ignored
|
||||
cpu.r[rd] = bus.read(u32, (cpu.r[15] & ~@as(u32, 2)) + offset);
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt78(comptime op: u2, comptime T: bool) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
|
||||
const ro = opcode >> 6 & 0x7;
|
||||
const rb = opcode >> 3 & 0x7;
|
||||
const rd = opcode & 0x7;
|
||||
|
||||
const address = cpu.r[rb] +% cpu.r[ro];
|
||||
|
||||
if (T) {
|
||||
// Format 8
|
||||
switch (op) {
|
||||
0b00 => {
|
||||
// STRH
|
||||
bus.write(u16, address, @truncate(u16, cpu.r[rd]));
|
||||
},
|
||||
0b01 => {
|
||||
// LDSB
|
||||
cpu.r[rd] = sext(u32, u8, bus.read(u8, address));
|
||||
},
|
||||
0b10 => {
|
||||
// LDRH
|
||||
const value = bus.read(u16, address);
|
||||
cpu.r[rd] = rotr(u32, value, 8 * (address & 1));
|
||||
},
|
||||
0b11 => {
|
||||
// LDRSH
|
||||
const value = bus.read(u16, address);
|
||||
cpu.r[rd] = if (address & 1 == 1) sext(u32, u8, @truncate(u8, value >> 8)) else sext(u32, u16, value);
|
||||
},
|
||||
}
|
||||
} else {
|
||||
// Format 7
|
||||
switch (op) {
|
||||
0b00 => {
|
||||
// STR
|
||||
bus.write(u32, address, cpu.r[rd]);
|
||||
},
|
||||
0b01 => {
|
||||
// STRB
|
||||
bus.write(u8, address, @truncate(u8, cpu.r[rd]));
|
||||
},
|
||||
0b10 => {
|
||||
// LDR
|
||||
const value = bus.read(u32, address);
|
||||
cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
|
||||
},
|
||||
0b11 => {
|
||||
// LDRB
|
||||
cpu.r[rd] = bus.read(u8, address);
|
||||
},
|
||||
}
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt9(comptime B: bool, comptime L: bool, comptime offset: u5) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
|
||||
const rb = opcode >> 3 & 0x7;
|
||||
const rd = opcode & 0x7;
|
||||
|
||||
if (L) {
|
||||
if (B) {
|
||||
// LDRB
|
||||
const address = cpu.r[rb] + offset;
|
||||
cpu.r[rd] = bus.read(u8, address);
|
||||
} else {
|
||||
// LDR
|
||||
const address = cpu.r[rb] + (@as(u32, offset) << 2);
|
||||
const value = bus.read(u32, address);
|
||||
cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
|
||||
}
|
||||
} else {
|
||||
if (B) {
|
||||
// STRB
|
||||
const address = cpu.r[rb] + offset;
|
||||
bus.write(u8, address, @truncate(u8, cpu.r[rd]));
|
||||
} else {
|
||||
// STR
|
||||
const address = cpu.r[rb] + (@as(u32, offset) << 2);
|
||||
bus.write(u32, address, cpu.r[rd]);
|
||||
}
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt10(comptime L: bool, comptime offset: u5) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
|
||||
const rb = opcode >> 3 & 0x7;
|
||||
const rd = opcode & 0x7;
|
||||
|
||||
const address = cpu.r[rb] + (@as(u6, offset) << 1);
|
||||
|
||||
if (L) {
|
||||
// LDRH
|
||||
const value = bus.read(u16, address);
|
||||
cpu.r[rd] = rotr(u32, value, 8 * (address & 1));
|
||||
} else {
|
||||
// STRH
|
||||
bus.write(u16, address, @truncate(u16, cpu.r[rd]));
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
||||
pub fn fmt11(comptime L: bool, comptime rd: u3) InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
|
||||
const offset = (opcode & 0xFF) << 2;
|
||||
const address = cpu.r[13] + offset;
|
||||
|
||||
if (L) {
|
||||
// LDR
|
||||
const value = bus.read(u32, address);
|
||||
cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
|
||||
} else {
|
||||
// STR
|
||||
bus.write(u32, address, cpu.r[rd]);
|
||||
}
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -0,0 +1,23 @@
|
|||
const Bus = @import("../../Bus.zig");
|
||||
const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
|
||||
const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
|
||||
|
||||
pub fn fmt17() InstrFn {
|
||||
return struct {
|
||||
fn inner(cpu: *Arm7tdmi, _: *Bus, _: u16) void {
|
||||
// Copy Values from Current Mode
|
||||
const ret_addr = cpu.r[15] - 2;
|
||||
const cpsr = cpu.cpsr.raw;
|
||||
|
||||
// Switch Mode
|
||||
cpu.changeMode(.Supervisor);
|
||||
cpu.cpsr.t.write(false); // Force ARM Mode
|
||||
cpu.cpsr.i.write(true); // Disable normal interrupts
|
||||
|
||||
cpu.r[14] = ret_addr; // Resume Execution
|
||||
cpu.spsr.raw = cpsr; // Previous mode CPSR
|
||||
cpu.r[15] = 0x0000_0008;
|
||||
cpu.pipe.reload(cpu);
|
||||
}
|
||||
}.inner;
|
||||
}
|
||||
|
|
@ -1,75 +0,0 @@
|
|||
const std = @import("std");
|
||||
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Bank = @import("arm32").Arm7tdmi.Bank;
|
||||
const Bus = @import("Bus.zig");
|
||||
|
||||
pub inline fn isHalted(cpu: *const Arm7tdmi) bool {
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
return bus_ptr.io.haltcnt == .Halt;
|
||||
}
|
||||
|
||||
pub fn stepDmaTransfer(cpu: *Arm7tdmi) bool {
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
inline for (0..4) |i| {
|
||||
if (bus_ptr.dma[i].in_progress) {
|
||||
bus_ptr.dma[i].step(cpu);
|
||||
return true;
|
||||
}
|
||||
}
|
||||
|
||||
return false;
|
||||
}
|
||||
|
||||
pub fn handleInterrupt(cpu: *Arm7tdmi) void {
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
const should_handle = bus_ptr.io.ie.raw & bus_ptr.io.irq.raw;
|
||||
|
||||
// Return if IME is disabled, CPSR I is set or there is nothing to handle
|
||||
if (!bus_ptr.io.ime or cpu.cpsr.i.read() or should_handle == 0) return;
|
||||
|
||||
// If Pipeline isn't full, we have a bug
|
||||
std.debug.assert(cpu.pipe.isFull());
|
||||
|
||||
// log.debug("Handling Interrupt!", .{});
|
||||
bus_ptr.io.haltcnt = .Execute;
|
||||
|
||||
// FIXME: This seems weird, but retAddr.gba suggests I need to make these changes
|
||||
const ret_addr = cpu.r[15] - if (cpu.cpsr.t.read()) 0 else @as(u32, 4);
|
||||
const new_spsr = cpu.cpsr.raw;
|
||||
|
||||
cpu.changeMode(.Irq);
|
||||
cpu.cpsr.t.write(false);
|
||||
cpu.cpsr.i.write(true);
|
||||
|
||||
cpu.r[14] = ret_addr;
|
||||
cpu.spsr.raw = new_spsr;
|
||||
cpu.r[15] = 0x0000_0018;
|
||||
cpu.pipe.reload(cpu);
|
||||
}
|
||||
|
||||
/// Advances state so that the BIOS is skipped
|
||||
///
|
||||
/// Note: This accesses the CPU's bus ptr so it only may be called
|
||||
/// once the Bus has been properly initialized
|
||||
///
|
||||
/// TODO: Make above notice impossible to do in code
|
||||
pub fn fastBoot(cpu: *Arm7tdmi) void {
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
cpu.r = std.mem.zeroes([16]u32);
|
||||
|
||||
// cpu.r[0] = 0x08000000;
|
||||
// cpu.r[1] = 0x000000EA;
|
||||
cpu.r[13] = 0x0300_7F00;
|
||||
cpu.r[15] = 0x0800_0000;
|
||||
|
||||
cpu.bank.r[Bank.regIdx(.Irq, .R13)] = 0x0300_7FA0;
|
||||
cpu.bank.r[Bank.regIdx(.Supervisor, .R13)] = 0x0300_7FE0;
|
||||
|
||||
// cpu.cpsr.raw = 0x6000001F;
|
||||
cpu.cpsr.raw = 0x0000_001F;
|
||||
|
||||
bus_ptr.bios.addr_latch = 0x0000_00DC + 8;
|
||||
}
|
||||
172
src/core/emu.zig
172
src/core/emu.zig
|
|
@ -3,42 +3,12 @@ const SDL = @import("sdl2");
|
|||
const config = @import("../config.zig");
|
||||
|
||||
const Scheduler = @import("scheduler.zig").Scheduler;
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Bus = @import("Bus.zig");
|
||||
const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
|
||||
const Tracker = @import("../util.zig").FpsTracker;
|
||||
const Channel = @import("../util.zig").Queue;
|
||||
|
||||
const stepDmaTransfer = @import("cpu_util.zig").stepDmaTransfer;
|
||||
const isHalted = @import("cpu_util.zig").isHalted;
|
||||
const TwoWayChannel = @import("zba-util").TwoWayChannel;
|
||||
|
||||
const Timer = std.time.Timer;
|
||||
|
||||
pub const Synchro = struct {
|
||||
const AtomicBool = std.atomic.Value(bool);
|
||||
|
||||
// FIXME: This Enum ends up being really LARGE!!!
|
||||
pub const Message = union(enum) {
|
||||
rom_path: [std.fs.MAX_PATH_BYTES]u8,
|
||||
bios_path: [std.fs.MAX_PATH_BYTES]u8,
|
||||
restart: void,
|
||||
};
|
||||
|
||||
paused: AtomicBool = AtomicBool.init(true), // FIXME: can ui_busy and paused be the same?
|
||||
should_quit: AtomicBool = AtomicBool.init(false),
|
||||
|
||||
ch: Channel(Message),
|
||||
|
||||
pub fn init(allocator: std.mem.Allocator) !@This() {
|
||||
const msg_buf = try allocator.alloc(Message, 1);
|
||||
return .{ .ch = Channel(Message).init(msg_buf) };
|
||||
}
|
||||
|
||||
pub fn deinit(self: *@This(), allocator: std.mem.Allocator) void {
|
||||
allocator.free(self.ch.inner.buf);
|
||||
self.* = undefined;
|
||||
}
|
||||
};
|
||||
|
||||
/// 4 Cycles in 1 dot
|
||||
const cycles_per_dot = 4;
|
||||
|
||||
|
|
@ -54,7 +24,7 @@ const frame_period = (std.time.ns_per_s * cycles_per_frame) / clock_rate;
|
|||
|
||||
/// Exact Value: 59.7275005696Hz
|
||||
/// The inverse of the frame period
|
||||
pub const frame_rate: f64 = @as(f64, @floatFromInt(clock_rate)) / cycles_per_frame;
|
||||
pub const frame_rate: f64 = @intToFloat(f64, clock_rate) / cycles_per_frame;
|
||||
|
||||
const log = std.log.scoped(.Emulation);
|
||||
|
||||
|
|
@ -65,37 +35,43 @@ const RunKind = enum {
|
|||
LimitedFPS,
|
||||
};
|
||||
|
||||
pub fn run(cpu: *Arm7tdmi, scheduler: *Scheduler, tracker: *Tracker, sync: *Synchro) void {
|
||||
pub fn run(cpu: *Arm7tdmi, scheduler: *Scheduler, tracker: *Tracker, channel: *TwoWayChannel) void {
|
||||
const audio_sync = config.config().guest.audio_sync and !config.config().host.mute;
|
||||
if (audio_sync) log.info("Audio sync enabled", .{});
|
||||
|
||||
if (config.config().guest.video_sync) {
|
||||
inner(.LimitedFPS, audio_sync, cpu, scheduler, tracker, sync);
|
||||
inner(.LimitedFPS, audio_sync, cpu, scheduler, tracker, channel);
|
||||
} else {
|
||||
inner(.UnlimitedFPS, audio_sync, cpu, scheduler, tracker, sync);
|
||||
inner(.UnlimitedFPS, audio_sync, cpu, scheduler, tracker, channel);
|
||||
}
|
||||
}
|
||||
|
||||
fn inner(comptime kind: RunKind, audio_sync: bool, cpu: *Arm7tdmi, scheduler: *Scheduler, tracker: ?*Tracker, sync: *Synchro) void {
|
||||
fn inner(comptime kind: RunKind, audio_sync: bool, cpu: *Arm7tdmi, scheduler: *Scheduler, tracker: ?*Tracker, channel: *TwoWayChannel) void {
|
||||
if (kind == .UnlimitedFPS or kind == .LimitedFPS) {
|
||||
std.debug.assert(tracker != null);
|
||||
log.info("FPS tracking enabled", .{});
|
||||
}
|
||||
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
// FIXME: audioSync accesses emulator state without any guarantees
|
||||
var paused: bool = false;
|
||||
|
||||
switch (kind) {
|
||||
.Unlimited, .UnlimitedFPS => {
|
||||
log.info("Emulation w/out video sync", .{});
|
||||
|
||||
while (!sync.should_quit.load(.monotonic)) {
|
||||
handleChannel(cpu, &sync.ch);
|
||||
if (sync.paused.load(.monotonic)) continue;
|
||||
while (true) {
|
||||
if (channel.emu.pop()) |e| switch (e) {
|
||||
.Quit => break,
|
||||
.Resume => paused = false,
|
||||
.Pause => {
|
||||
paused = true;
|
||||
channel.gui.push(.Paused);
|
||||
},
|
||||
};
|
||||
|
||||
if (paused) continue;
|
||||
|
||||
runFrame(scheduler, cpu);
|
||||
audioSync(audio_sync, bus_ptr.apu.stream, &bus_ptr.apu.is_buffer_full);
|
||||
audioSync(audio_sync, cpu.bus.apu.stream, &cpu.bus.apu.is_buffer_full);
|
||||
|
||||
if (kind == .UnlimitedFPS) tracker.?.tick();
|
||||
}
|
||||
|
|
@ -105,9 +81,17 @@ fn inner(comptime kind: RunKind, audio_sync: bool, cpu: *Arm7tdmi, scheduler: *S
|
|||
var timer = Timer.start() catch @panic("failed to initalize std.timer.Timer");
|
||||
var wake_time: u64 = frame_period;
|
||||
|
||||
while (!sync.should_quit.load(.monotonic)) {
|
||||
handleChannel(cpu, &sync.ch);
|
||||
if (sync.paused.load(.monotonic)) continue;
|
||||
while (true) {
|
||||
if (channel.emu.pop()) |e| switch (e) {
|
||||
.Quit => break,
|
||||
.Resume => paused = false,
|
||||
.Pause => {
|
||||
paused = true;
|
||||
channel.gui.push(.Paused);
|
||||
},
|
||||
};
|
||||
|
||||
if (paused) continue;
|
||||
|
||||
runFrame(scheduler, cpu);
|
||||
const new_wake_time = videoSync(&timer, wake_time);
|
||||
|
|
@ -117,7 +101,7 @@ fn inner(comptime kind: RunKind, audio_sync: bool, cpu: *Arm7tdmi, scheduler: *S
|
|||
// the amount of time needed for audio to catch up rather than
|
||||
// our expected wake-up time
|
||||
|
||||
audioSync(audio_sync, bus_ptr.apu.stream, &bus_ptr.apu.is_buffer_full);
|
||||
audioSync(audio_sync, cpu.bus.apu.stream, &cpu.bus.apu.is_buffer_full);
|
||||
if (!audio_sync) spinLoop(&timer, wake_time);
|
||||
wake_time = new_wake_time;
|
||||
|
||||
|
|
@ -127,28 +111,12 @@ fn inner(comptime kind: RunKind, audio_sync: bool, cpu: *Arm7tdmi, scheduler: *S
|
|||
}
|
||||
}
|
||||
|
||||
inline fn handleChannel(cpu: *Arm7tdmi, channel: *Channel(Synchro.Message)) void {
|
||||
const message = channel.pop() orelse return;
|
||||
|
||||
switch (message) {
|
||||
.rom_path => |path_buf| {
|
||||
const path = std.mem.sliceTo(&path_buf, 0);
|
||||
replaceGamepak(cpu, path) catch |e| log.err("failed to replace GamePak: {}", .{e});
|
||||
},
|
||||
.bios_path => |path_buf| {
|
||||
const path = std.mem.sliceTo(&path_buf, 0);
|
||||
replaceBios(cpu, path) catch |e| log.err("failed to replace BIOS: {}", .{e});
|
||||
},
|
||||
.restart => reset(cpu),
|
||||
}
|
||||
}
|
||||
|
||||
pub fn runFrame(sched: *Scheduler, cpu: *Arm7tdmi) void {
|
||||
const frame_end = sched.tick + cycles_per_frame;
|
||||
|
||||
while (sched.tick < frame_end) {
|
||||
if (!stepDmaTransfer(cpu)) {
|
||||
if (isHalted(cpu)) {
|
||||
if (!cpu.stepDmaTransfer()) {
|
||||
if (cpu.isHalted()) {
|
||||
// Fast-forward to next Event
|
||||
sched.tick = sched.nextTimestamp();
|
||||
} else {
|
||||
|
|
@ -172,10 +140,6 @@ fn audioSync(audio_sync: bool, stream: *SDL.SDL_AudioStream, is_buffer_full: *bo
|
|||
// If Busy is false, there's no need to sync here
|
||||
if (!still_full) return;
|
||||
|
||||
// TODO: Refactor!!!!
|
||||
// while (SDL.SDL_AudioStreamAvailable(stream) > sample_size * max_buf_size >> 1)
|
||||
// std.atomic.spinLoopHint();
|
||||
|
||||
while (true) {
|
||||
still_full = SDL.SDL_AudioStreamAvailable(stream) > sample_size * max_buf_size >> 1;
|
||||
if (!audio_sync or !still_full) break;
|
||||
|
|
@ -220,8 +184,7 @@ fn sleep(timer: *Timer, wake_time: u64) ?u64 {
|
|||
}
|
||||
|
||||
fn spinLoop(timer: *Timer, wake_time: u64) void {
|
||||
while (timer.read() < wake_time)
|
||||
std.atomic.spinLoopHint();
|
||||
while (true) if (timer.read() > wake_time) break;
|
||||
}
|
||||
|
||||
pub const EmuThing = struct {
|
||||
|
|
@ -229,49 +192,6 @@ pub const EmuThing = struct {
|
|||
const Interface = @import("gdbstub").Emulator;
|
||||
const Allocator = std.mem.Allocator;
|
||||
|
||||
pub const target =
|
||||
\\<target version="1.0">
|
||||
\\ <architecture>armv4t</architecture>
|
||||
\\ <feature name="org.gnu.gdb.arm.core">
|
||||
\\ <reg name="r0" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r1" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r2" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r3" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r4" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r5" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r6" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r7" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r8" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r9" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r10" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r11" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="r12" bitsize="32" type="uint32"/>
|
||||
\\ <reg name="sp" bitsize="32" type="data_ptr"/>
|
||||
\\ <reg name="lr" bitsize="32"/>
|
||||
\\ <reg name="pc" bitsize="32" type="code_ptr"/>
|
||||
\\
|
||||
\\ <reg name="cpsr" bitsize="32" regnum="25"/>
|
||||
\\ </feature>
|
||||
\\</target>
|
||||
;
|
||||
|
||||
// Game Pak SRAM isn't included
|
||||
// TODO: Can i be more specific here?
|
||||
pub const map =
|
||||
\\ <memory-map version="1.0">
|
||||
\\ <memory type="rom" start="0x00000000" length="0x00004000"/>
|
||||
\\ <memory type="ram" start="0x02000000" length="0x00040000"/>
|
||||
\\ <memory type="ram" start="0x03000000" length="0x00008000"/>
|
||||
\\ <memory type="ram" start="0x04000000" length="0x00000400"/>
|
||||
\\ <memory type="ram" start="0x05000000" length="0x00000400"/>
|
||||
\\ <memory type="ram" start="0x06000000" length="0x00018000"/>
|
||||
\\ <memory type="ram" start="0x07000000" length="0x00000400"/>
|
||||
\\ <memory type="rom" start="0x08000000" length="0x02000000"/>
|
||||
\\ <memory type="rom" start="0x0A000000" length="0x02000000"/>
|
||||
\\ <memory type="rom" start="0x0C000000" length="0x02000000"/>
|
||||
\\ </memory-map>
|
||||
;
|
||||
|
||||
cpu: *Arm7tdmi,
|
||||
scheduler: *Scheduler,
|
||||
|
||||
|
|
@ -308,8 +228,8 @@ pub const EmuThing = struct {
|
|||
|
||||
// TODO: How can I make it easier to keep this in lock-step with runFrame?
|
||||
while (!did_step) {
|
||||
if (!stepDmaTransfer(cpu)) {
|
||||
if (isHalted(cpu)) {
|
||||
if (!cpu.stepDmaTransfer()) {
|
||||
if (cpu.isHalted()) {
|
||||
// Fast-forward to next Event
|
||||
sched.tick = sched.queue.peek().?.tick;
|
||||
} else {
|
||||
|
|
@ -323,26 +243,14 @@ pub const EmuThing = struct {
|
|||
}
|
||||
};
|
||||
|
||||
fn reset(cpu: *Arm7tdmi) void {
|
||||
pub fn reset(cpu: *Arm7tdmi) void {
|
||||
// @breakpoint();
|
||||
cpu.sched.reset(); // Yes this is order sensitive, see the PPU reset for why
|
||||
cpu.bus.reset();
|
||||
cpu.reset();
|
||||
}
|
||||
|
||||
fn replaceGamepak(cpu: *Arm7tdmi, file_path: []const u8) !void {
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
try bus_ptr.replaceGamepak(file_path);
|
||||
pub fn replaceGamepak(cpu: *Arm7tdmi, file_path: []const u8) !void {
|
||||
try cpu.bus.replaceGamepak(file_path);
|
||||
reset(cpu);
|
||||
}
|
||||
|
||||
fn replaceBios(cpu: *Arm7tdmi, file_path: []const u8) !void {
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
const allocator = bus_ptr.bios.allocator;
|
||||
const bios_len = 0x4000;
|
||||
|
||||
bus_ptr.bios.buf = try allocator.alloc(u8, bios_len);
|
||||
try bus_ptr.bios.load(file_path);
|
||||
}
|
||||
|
|
|
|||
235
src/core/ppu.zig
235
src/core/ppu.zig
|
|
@ -10,8 +10,7 @@ const Oam = @import("ppu/Oam.zig");
|
|||
const Palette = @import("ppu/Palette.zig");
|
||||
const Vram = @import("ppu/Vram.zig");
|
||||
const Scheduler = @import("scheduler.zig").Scheduler;
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Bus = @import("Bus.zig");
|
||||
const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
|
||||
const FrameBuffer = @import("../util.zig").FrameBuffer;
|
||||
|
||||
const Allocator = std.mem.Allocator;
|
||||
|
|
@ -21,14 +20,12 @@ const getHalf = util.getHalf;
|
|||
const setHalf = util.setHalf;
|
||||
const setQuart = util.setQuart;
|
||||
|
||||
const handleInterrupt = @import("cpu_util.zig").handleInterrupt;
|
||||
|
||||
pub const width = 240;
|
||||
pub const height = 160;
|
||||
pub const framebuf_pitch = width * @sizeOf(u32);
|
||||
|
||||
pub fn read(comptime T: type, ppu: *const Ppu, addr: u32) ?T {
|
||||
const byte_addr: u8 = @truncate(addr);
|
||||
const byte_addr = @truncate(u8, addr);
|
||||
|
||||
return switch (T) {
|
||||
u32 => switch (byte_addr) {
|
||||
|
|
@ -69,24 +66,24 @@ pub fn read(comptime T: type, ppu: *const Ppu, addr: u32) ?T {
|
|||
else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
|
||||
},
|
||||
u8 => switch (byte_addr) {
|
||||
0x00, 0x01 => @truncate(ppu.dispcnt.raw >> getHalf(byte_addr)),
|
||||
0x00, 0x01 => @truncate(T, ppu.dispcnt.raw >> getHalf(byte_addr)),
|
||||
0x02, 0x03 => null,
|
||||
0x04, 0x05 => @truncate(ppu.dispstat.raw >> getHalf(byte_addr)),
|
||||
0x06, 0x07 => @truncate(ppu.vcount.raw >> getHalf(byte_addr)),
|
||||
0x08, 0x09 => @truncate(ppu.bg[0].bg0Cnt() >> getHalf(byte_addr)),
|
||||
0x0A, 0x0B => @truncate(ppu.bg[1].bg1Cnt() >> getHalf(byte_addr)),
|
||||
0x0C, 0x0D => @truncate(ppu.bg[2].cnt.raw >> getHalf(byte_addr)),
|
||||
0x0E, 0x0F => @truncate(ppu.bg[3].cnt.raw >> getHalf(byte_addr)),
|
||||
0x04, 0x05 => @truncate(T, ppu.dispstat.raw >> getHalf(byte_addr)),
|
||||
0x06, 0x07 => @truncate(T, ppu.vcount.raw >> getHalf(byte_addr)),
|
||||
0x08, 0x09 => @truncate(T, ppu.bg[0].bg0Cnt() >> getHalf(byte_addr)),
|
||||
0x0A, 0x0B => @truncate(T, ppu.bg[1].bg1Cnt() >> getHalf(byte_addr)),
|
||||
0x0C, 0x0D => @truncate(T, ppu.bg[2].cnt.raw >> getHalf(byte_addr)),
|
||||
0x0E, 0x0F => @truncate(T, ppu.bg[3].cnt.raw >> getHalf(byte_addr)),
|
||||
0x10...0x1F => null, // BGXHOFS/VOFS
|
||||
0x20...0x2F => null, // BG2 Rot/Scaling
|
||||
0x30...0x3F => null, // BG3 Rot/Scaling
|
||||
0x40...0x47 => null, // WINXH/V Registers
|
||||
0x48, 0x49 => @truncate(ppu.win.getIn() >> getHalf(byte_addr)),
|
||||
0x4A, 0x4B => @truncate(ppu.win.getOut() >> getHalf(byte_addr)),
|
||||
0x48, 0x49 => @truncate(T, ppu.win.getIn() >> getHalf(byte_addr)),
|
||||
0x4A, 0x4B => @truncate(T, ppu.win.getOut() >> getHalf(byte_addr)),
|
||||
0x4C, 0x4D => null, // MOSAIC
|
||||
0x4E, 0x4F => null,
|
||||
0x50, 0x51 => @truncate(ppu.bld.getCnt() >> getHalf(byte_addr)),
|
||||
0x52, 0x53 => @truncate(ppu.bld.getAlpha() >> getHalf(byte_addr)),
|
||||
0x50, 0x51 => @truncate(T, ppu.bld.getCnt() >> getHalf(byte_addr)),
|
||||
0x52, 0x53 => @truncate(T, ppu.bld.getAlpha() >> getHalf(byte_addr)),
|
||||
0x54, 0x55 => null, // BLDY
|
||||
else => util.io.read.err(T, log, "unexpected {} read from 0x{X:0>8}", .{ T, addr }),
|
||||
},
|
||||
|
|
@ -95,14 +92,14 @@ pub fn read(comptime T: type, ppu: *const Ppu, addr: u32) ?T {
|
|||
}
|
||||
|
||||
pub fn write(comptime T: type, ppu: *Ppu, addr: u32, value: T) void {
|
||||
const byte_addr: u8 = @truncate(addr); // prefixed with 0x0400_00
|
||||
const byte_addr = @truncate(u8, addr); // prefixed with 0x0400_00
|
||||
|
||||
switch (T) {
|
||||
u32 => switch (byte_addr) {
|
||||
0x00 => ppu.dispcnt.raw = @truncate(value),
|
||||
0x00 => ppu.dispcnt.raw = @truncate(u16, value),
|
||||
0x04 => {
|
||||
ppu.dispstat.set(@truncate(value));
|
||||
ppu.vcount.raw = @truncate(value >> 16);
|
||||
ppu.dispstat.set(@truncate(u16, value));
|
||||
ppu.vcount.raw = @truncate(u16, value >> 16);
|
||||
},
|
||||
0x08 => ppu.setAdjCnts(0, value),
|
||||
0x0C => ppu.setAdjCnts(2, value),
|
||||
|
|
@ -128,10 +125,10 @@ pub fn write(comptime T: type, ppu: *Ppu, addr: u32, value: T) void {
|
|||
0x4C => log.debug("Wrote 0x{X:0>8} to MOSAIC", .{value}),
|
||||
|
||||
0x50 => {
|
||||
ppu.bld.cnt.raw = @truncate(value);
|
||||
ppu.bld.alpha.raw = @truncate(value >> 16);
|
||||
ppu.bld.cnt.raw = @truncate(u16, value);
|
||||
ppu.bld.alpha.raw = @truncate(u16, value >> 16);
|
||||
},
|
||||
0x54 => ppu.bld.y.raw = @truncate(value),
|
||||
0x54 => ppu.bld.y.raw = @truncate(u16, value),
|
||||
else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
|
||||
},
|
||||
u16 => switch (byte_addr) {
|
||||
|
|
@ -154,19 +151,19 @@ pub fn write(comptime T: type, ppu: *Ppu, addr: u32, value: T) void {
|
|||
0x1C => ppu.bg[3].hofs.raw = value,
|
||||
0x1E => ppu.bg[3].vofs.raw = value,
|
||||
|
||||
0x20 => ppu.aff_bg[0].pa = @bitCast(value),
|
||||
0x22 => ppu.aff_bg[0].pb = @bitCast(value),
|
||||
0x24 => ppu.aff_bg[0].pc = @bitCast(value),
|
||||
0x26 => ppu.aff_bg[0].pd = @bitCast(value),
|
||||
0x28, 0x2A => ppu.aff_bg[0].x = @bitCast(setHalf(u32, @as(u32, @bitCast(ppu.aff_bg[0].x)), byte_addr, value)),
|
||||
0x2C, 0x2E => ppu.aff_bg[0].y = @bitCast(setHalf(u32, @as(u32, @bitCast(ppu.aff_bg[0].y)), byte_addr, value)),
|
||||
0x20 => ppu.aff_bg[0].pa = @bitCast(i16, value),
|
||||
0x22 => ppu.aff_bg[0].pb = @bitCast(i16, value),
|
||||
0x24 => ppu.aff_bg[0].pc = @bitCast(i16, value),
|
||||
0x26 => ppu.aff_bg[0].pd = @bitCast(i16, value),
|
||||
0x28, 0x2A => ppu.aff_bg[0].x = @bitCast(i32, setHalf(u32, @bitCast(u32, ppu.aff_bg[0].x), byte_addr, value)),
|
||||
0x2C, 0x2E => ppu.aff_bg[0].y = @bitCast(i32, setHalf(u32, @bitCast(u32, ppu.aff_bg[0].y), byte_addr, value)),
|
||||
|
||||
0x30 => ppu.aff_bg[1].pa = @bitCast(value),
|
||||
0x32 => ppu.aff_bg[1].pb = @bitCast(value),
|
||||
0x34 => ppu.aff_bg[1].pc = @bitCast(value),
|
||||
0x36 => ppu.aff_bg[1].pd = @bitCast(value),
|
||||
0x38, 0x3A => ppu.aff_bg[1].x = @bitCast(setHalf(u32, @as(u32, @bitCast(ppu.aff_bg[1].x)), byte_addr, value)),
|
||||
0x3C, 0x3E => ppu.aff_bg[1].y = @bitCast(setHalf(u32, @as(u32, @bitCast(ppu.aff_bg[1].y)), byte_addr, value)),
|
||||
0x30 => ppu.aff_bg[1].pa = @bitCast(i16, value),
|
||||
0x32 => ppu.aff_bg[1].pb = @bitCast(i16, value),
|
||||
0x34 => ppu.aff_bg[1].pc = @bitCast(i16, value),
|
||||
0x36 => ppu.aff_bg[1].pd = @bitCast(i16, value),
|
||||
0x38, 0x3A => ppu.aff_bg[1].x = @bitCast(i32, setHalf(u32, @bitCast(u32, ppu.aff_bg[1].x), byte_addr, value)),
|
||||
0x3C, 0x3E => ppu.aff_bg[1].y = @bitCast(i32, setHalf(u32, @bitCast(u32, ppu.aff_bg[1].y), byte_addr, value)),
|
||||
|
||||
0x40 => ppu.win.h[0].raw = value,
|
||||
0x42 => ppu.win.h[1].raw = value,
|
||||
|
|
@ -205,20 +202,20 @@ pub fn write(comptime T: type, ppu: *Ppu, addr: u32, value: T) void {
|
|||
0x1E, 0x1F => ppu.bg[3].vofs.raw = setHalf(u16, ppu.bg[3].vofs.raw, byte_addr, value),
|
||||
|
||||
// BG2 Rot/Scaling
|
||||
0x20, 0x21 => ppu.aff_bg[0].pa = @bitCast(setHalf(u16, @as(u16, @bitCast(ppu.aff_bg[0].pa)), byte_addr, value)),
|
||||
0x22, 0x23 => ppu.aff_bg[0].pb = @bitCast(setHalf(u16, @as(u16, @bitCast(ppu.aff_bg[0].pb)), byte_addr, value)),
|
||||
0x24, 0x25 => ppu.aff_bg[0].pc = @bitCast(setHalf(u16, @as(u16, @bitCast(ppu.aff_bg[0].pc)), byte_addr, value)),
|
||||
0x26, 0x27 => ppu.aff_bg[0].pd = @bitCast(setHalf(u16, @as(u16, @bitCast(ppu.aff_bg[0].pd)), byte_addr, value)),
|
||||
0x28, 0x29, 0x2A, 0x2B => ppu.aff_bg[0].x = @bitCast(setQuart(@bitCast(ppu.aff_bg[0].x), byte_addr, value)),
|
||||
0x2C, 0x2D, 0x2E, 0x2F => ppu.aff_bg[0].y = @bitCast(setQuart(@bitCast(ppu.aff_bg[0].y), byte_addr, value)),
|
||||
0x20, 0x21 => ppu.aff_bg[0].pa = @bitCast(i16, setHalf(u16, @bitCast(u16, ppu.aff_bg[0].pa), byte_addr, value)),
|
||||
0x22, 0x23 => ppu.aff_bg[0].pb = @bitCast(i16, setHalf(u16, @bitCast(u16, ppu.aff_bg[0].pb), byte_addr, value)),
|
||||
0x24, 0x25 => ppu.aff_bg[0].pc = @bitCast(i16, setHalf(u16, @bitCast(u16, ppu.aff_bg[0].pc), byte_addr, value)),
|
||||
0x26, 0x27 => ppu.aff_bg[0].pd = @bitCast(i16, setHalf(u16, @bitCast(u16, ppu.aff_bg[0].pd), byte_addr, value)),
|
||||
0x28, 0x29, 0x2A, 0x2B => ppu.aff_bg[0].x = @bitCast(i32, setQuart(@bitCast(u32, ppu.aff_bg[0].x), byte_addr, value)),
|
||||
0x2C, 0x2D, 0x2E, 0x2F => ppu.aff_bg[0].y = @bitCast(i32, setQuart(@bitCast(u32, ppu.aff_bg[0].y), byte_addr, value)),
|
||||
|
||||
// BG3 Rot/Scaling
|
||||
0x30, 0x31 => ppu.aff_bg[1].pa = @bitCast(setHalf(u16, @as(u16, @bitCast(ppu.aff_bg[1].pa)), byte_addr, value)),
|
||||
0x32, 0x33 => ppu.aff_bg[1].pb = @bitCast(setHalf(u16, @as(u16, @bitCast(ppu.aff_bg[1].pb)), byte_addr, value)),
|
||||
0x34, 0x35 => ppu.aff_bg[1].pc = @bitCast(setHalf(u16, @as(u16, @bitCast(ppu.aff_bg[1].pc)), byte_addr, value)),
|
||||
0x36, 0x37 => ppu.aff_bg[1].pd = @bitCast(setHalf(u16, @as(u16, @bitCast(ppu.aff_bg[1].pd)), byte_addr, value)),
|
||||
0x38, 0x39, 0x3A, 0x3B => ppu.aff_bg[1].x = @bitCast(setQuart(@bitCast(ppu.aff_bg[1].x), byte_addr, value)),
|
||||
0x3C, 0x3D, 0x3E, 0x3F => ppu.aff_bg[1].y = @bitCast(setQuart(@bitCast(ppu.aff_bg[1].y), byte_addr, value)),
|
||||
0x30, 0x31 => ppu.aff_bg[1].pa = @bitCast(i16, setHalf(u16, @bitCast(u16, ppu.aff_bg[1].pa), byte_addr, value)),
|
||||
0x32, 0x33 => ppu.aff_bg[1].pb = @bitCast(i16, setHalf(u16, @bitCast(u16, ppu.aff_bg[1].pb), byte_addr, value)),
|
||||
0x34, 0x35 => ppu.aff_bg[1].pc = @bitCast(i16, setHalf(u16, @bitCast(u16, ppu.aff_bg[1].pc), byte_addr, value)),
|
||||
0x36, 0x37 => ppu.aff_bg[1].pd = @bitCast(i16, setHalf(u16, @bitCast(u16, ppu.aff_bg[1].pd), byte_addr, value)),
|
||||
0x38, 0x39, 0x3A, 0x3B => ppu.aff_bg[1].x = @bitCast(i32, setQuart(@bitCast(u32, ppu.aff_bg[1].x), byte_addr, value)),
|
||||
0x3C, 0x3D, 0x3E, 0x3F => ppu.aff_bg[1].y = @bitCast(i32, setQuart(@bitCast(u32, ppu.aff_bg[1].y), byte_addr, value)),
|
||||
|
||||
// Window
|
||||
0x40, 0x41 => ppu.win.h[0].raw = setHalf(u16, ppu.win.h[0].raw, byte_addr, value),
|
||||
|
|
@ -269,7 +266,7 @@ pub const Ppu = struct {
|
|||
sched.push(.Draw, 240 * 4); // Add first PPU Event to Scheduler
|
||||
|
||||
const sprites = try allocator.create([128]?Sprite);
|
||||
@memset(sprites, null);
|
||||
std.mem.set(?Sprite, sprites, null);
|
||||
|
||||
return Self{
|
||||
.vram = try Vram.init(allocator),
|
||||
|
|
@ -310,7 +307,7 @@ pub const Ppu = struct {
|
|||
self.vcount = .{ .raw = 0x0000 };
|
||||
|
||||
self.scanline.reset();
|
||||
@memset(self.scanline_sprites, null);
|
||||
std.mem.set(?Sprite, self.scanline_sprites, null);
|
||||
}
|
||||
|
||||
pub fn deinit(self: *Self) void {
|
||||
|
|
@ -324,13 +321,13 @@ pub const Ppu = struct {
|
|||
}
|
||||
|
||||
pub fn setBgOffsets(self: *Self, comptime n: u2, word: u32) void {
|
||||
self.bg[n].hofs.raw = @truncate(word);
|
||||
self.bg[n].vofs.raw = @truncate(word >> 16);
|
||||
self.bg[n].hofs.raw = @truncate(u16, word);
|
||||
self.bg[n].vofs.raw = @truncate(u16, word >> 16);
|
||||
}
|
||||
|
||||
pub fn setAdjCnts(self: *Self, comptime n: u2, word: u32) void {
|
||||
self.bg[n].cnt.raw = @truncate(word);
|
||||
self.bg[n + 1].cnt.raw = @truncate(word >> 16);
|
||||
self.bg[n].cnt.raw = @truncate(u16, word);
|
||||
self.bg[n + 1].cnt.raw = @truncate(u16, word >> 16);
|
||||
}
|
||||
|
||||
/// Search OAM for Sprites that might be rendered on this scanline
|
||||
|
|
@ -341,11 +338,11 @@ pub const Ppu = struct {
|
|||
search: while (i < self.oam.buf.len) : (i += 8) {
|
||||
// Attributes in OAM are 6 bytes long, with 2 bytes of padding
|
||||
// Grab Attributes from OAM
|
||||
const attr0: Attr0 = @bitCast(self.oam.read(u16, i));
|
||||
const attr0 = @bitCast(Attr0, self.oam.read(u16, i));
|
||||
|
||||
// Only consider enabled Sprites
|
||||
if (attr0.is_affine.read() or !attr0.disabled.read()) {
|
||||
const attr1: Attr1 = @bitCast(self.oam.read(u16, i + 2));
|
||||
const attr1 = @bitCast(Attr1, self.oam.read(u16, i + 2));
|
||||
const d = spriteDimensions(attr0.shape.read(), attr1.size.read());
|
||||
|
||||
// Account for double-size affine sprites
|
||||
|
|
@ -368,7 +365,7 @@ pub const Ppu = struct {
|
|||
if (y_pos <= y and y < (y_pos + sprite_height)) {
|
||||
for (self.scanline_sprites) |*maybe_sprite| {
|
||||
if (maybe_sprite.* == null) {
|
||||
maybe_sprite.* = Sprite.init(attr0, attr1, @bitCast(self.oam.read(u16, i + 4)));
|
||||
maybe_sprite.* = Sprite.init(attr0, attr1, @bitCast(Attr2, self.oam.read(u16, i + 4)));
|
||||
continue :search;
|
||||
}
|
||||
}
|
||||
|
|
@ -414,7 +411,7 @@ pub const Ppu = struct {
|
|||
const pc = self.oam.read(u16, base + 11 * @sizeOf(u16));
|
||||
const pd = self.oam.read(u16, base + 15 * @sizeOf(u16));
|
||||
|
||||
const matrix: [4]i16 = @bitCast([_]u16{ pa, pb, pc, pd });
|
||||
const matrix = @bitCast([4]i16, [_]u16{ pa, pb, pc, pd });
|
||||
|
||||
const sprite_width = sprite.width << if (double_size) 1 else 0;
|
||||
const sprite_height = sprite.height << if (double_size) 1 else 0;
|
||||
|
|
@ -425,7 +422,7 @@ pub const Ppu = struct {
|
|||
var i: u9 = 0;
|
||||
while (i < sprite_width) : (i += 1) {
|
||||
// TODO: Something is wrong here
|
||||
const x: u9 = @truncate(@as(u16, @bitCast(sprite_x + i)));
|
||||
const x = @truncate(u9, @bitCast(u16, sprite_x + i));
|
||||
if (x >= width) continue;
|
||||
|
||||
if (!shouldDrawSprite(self.bld.cnt, &self.scanline, x)) continue;
|
||||
|
|
@ -447,11 +444,11 @@ pub const Ppu = struct {
|
|||
// Maybe this is the necessary check?
|
||||
if (rot_x >= sprite.width or rot_y >= sprite.height or rot_x < 0 or rot_y < 0) continue;
|
||||
|
||||
const tile_x: u16 = @bitCast(rot_x);
|
||||
const tile_y: u16 = @bitCast(rot_y);
|
||||
const tile_x = @bitCast(u16, rot_x);
|
||||
const tile_y = @bitCast(u16, rot_y);
|
||||
|
||||
const col: u3 = @truncate(tile_x);
|
||||
const row: u3 = @truncate(tile_y);
|
||||
const col = @truncate(u3, tile_x);
|
||||
const row = @truncate(u3, tile_y);
|
||||
|
||||
// TODO: Finish that 2D Sprites Test ROM
|
||||
const tile_base = char_base + (tile_id * 0x20) + (row * tile_row_offset) + if (is_8bpp) col else col >> 1;
|
||||
|
|
@ -461,12 +458,12 @@ pub const Ppu = struct {
|
|||
const tile = self.vram.buf[tile_base + tile_offset];
|
||||
const pal_id: u16 = if (!is_8bpp) get4bppTilePalette(sprite.palBank(), col, tile) else tile;
|
||||
|
||||
const global_x: u9 = @truncate(@as(u16, @bitCast(local_x + sprite_x)));
|
||||
const global_x = @truncate(u9, @bitCast(u16, local_x + sprite_x));
|
||||
|
||||
// Sprite Palette starts at 0x0500_0200
|
||||
if (pal_id != 0) {
|
||||
const bgr555 = self.palette.read(u16, 0x200 + pal_id * 2);
|
||||
drawSpritePixel(self.bld.cnt, &self.scanline, @as(Attr0, @bitCast(sprite.attr0)), global_x, bgr555);
|
||||
drawSpritePixel(self.bld.cnt, &self.scanline, @bitCast(Attr0, sprite.attr0), global_x, bgr555);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
|
@ -490,7 +487,7 @@ pub const Ppu = struct {
|
|||
var i: u9 = 0;
|
||||
while (i < sprite.width) : (i += 1) {
|
||||
// TODO: Something is Wrong Here
|
||||
const x = @as(u9, @truncate(@as(u16, @bitCast(sprite_x + i))));
|
||||
const x = @truncate(u9, @bitCast(u16, sprite_x + i));
|
||||
if (x >= width) continue;
|
||||
|
||||
if (!shouldDrawSprite(self.bld.cnt, &self.scanline, x)) continue;
|
||||
|
|
@ -504,11 +501,11 @@ pub const Ppu = struct {
|
|||
// Note that we flip the tile_pos not the (tile_pos % 8) like we do for
|
||||
// Background Tiles. By doing this we mirror the entire sprite instead of
|
||||
// just a specific tile (see how sprite.width and sprite.height are involved)
|
||||
const tile_x = @as(u9, @intCast(local_x)) ^ if (sprite.hFlip()) (sprite.width - 1) else 0;
|
||||
const tile_y = @as(u8, @intCast(local_y)) ^ if (sprite.vFlip()) (sprite.height - 1) else 0;
|
||||
const tile_x = @intCast(u9, local_x) ^ if (sprite.hFlip()) (sprite.width - 1) else 0;
|
||||
const tile_y = @intCast(u8, local_y) ^ if (sprite.vFlip()) (sprite.height - 1) else 0;
|
||||
|
||||
const col: u3 = @truncate(tile_x);
|
||||
const row: u3 = @truncate(tile_y);
|
||||
const col = @truncate(u3, tile_x);
|
||||
const row = @truncate(u3, tile_y);
|
||||
|
||||
// TODO: Finish that 2D Sprites Test ROM
|
||||
const tile_base = char_base + (tile_id * 0x20) + (row * tile_row_offset) + if (is_8bpp) col else col >> 1;
|
||||
|
|
@ -518,7 +515,7 @@ pub const Ppu = struct {
|
|||
const tile = self.vram.buf[tile_base + tile_offset];
|
||||
const pal_id: u16 = if (!is_8bpp) get4bppTilePalette(sprite.palBank(), col, tile) else tile;
|
||||
|
||||
const global_x: u9 = @truncate(@as(u16, @bitCast(local_x + sprite_x)));
|
||||
const global_x = @truncate(u9, @bitCast(u16, local_x + sprite_x));
|
||||
|
||||
// Sprite Palette starts at 0x0500_0200
|
||||
if (pal_id != 0) {
|
||||
|
|
@ -550,8 +547,8 @@ pub const Ppu = struct {
|
|||
aff_x += self.aff_bg[n - 2].pa;
|
||||
aff_y += self.aff_bg[n - 2].pc;
|
||||
|
||||
const _x: u9 = @truncate(@as(u32, @bitCast(ix)));
|
||||
const _y: u8 = @truncate(@as(u32, @bitCast(iy)));
|
||||
const _x = @truncate(u9, @bitCast(u32, ix));
|
||||
const _y = @truncate(u8, @bitCast(u32, iy));
|
||||
|
||||
const win_bounds = self.windowBounds(_x, _y);
|
||||
if (!shouldDrawBackground(self, n, win_bounds, i)) continue;
|
||||
|
|
@ -561,10 +558,10 @@ pub const Ppu = struct {
|
|||
iy = if (iy > px_height) @rem(iy, px_height) else if (iy < 0) px_height + @rem(iy, px_height) else iy;
|
||||
} else if (ix > px_width or iy > px_height or ix < 0 or iy < 0) continue;
|
||||
|
||||
const x: u32 = @bitCast(ix);
|
||||
const y: u32 = @bitCast(iy);
|
||||
const x = @bitCast(u32, ix);
|
||||
const y = @bitCast(u32, iy);
|
||||
|
||||
const tile_id: u32 = self.vram.read(u8, screen_base + ((y / 8) * @as(u32, @bitCast(tile_width)) + (x / 8)));
|
||||
const tile_id: u32 = self.vram.read(u8, screen_base + ((y / 8) * @bitCast(u32, tile_width) + (x / 8)));
|
||||
const row = y & 7;
|
||||
const col = x & 7;
|
||||
|
||||
|
|
@ -601,12 +598,12 @@ pub const Ppu = struct {
|
|||
while (i < width) : (i += 1) {
|
||||
const x = hofs + i;
|
||||
|
||||
const win_bounds = self.windowBounds(@truncate(x), @truncate(y));
|
||||
const win_bounds = self.windowBounds(@truncate(u9, x), @truncate(u8, y));
|
||||
if (!shouldDrawBackground(self, n, win_bounds, i)) continue;
|
||||
|
||||
// Grab the Screen Entry from VRAM
|
||||
const entry_addr = screen_base + tilemapOffset(size, x, y);
|
||||
const entry: ScreenEntry = @bitCast(self.vram.read(u16, entry_addr));
|
||||
const entry = @bitCast(ScreenEntry, self.vram.read(u16, entry_addr));
|
||||
|
||||
// Calculate the Address of the Tile in the designated Charblock
|
||||
// We also take this opportunity to flip tiles if necessary
|
||||
|
|
@ -615,8 +612,8 @@ pub const Ppu = struct {
|
|||
// Calculate row and column offsets. Understand that
|
||||
// `tile_len`, `tile_row_offset` and `col` are subject to different
|
||||
// values depending on whether we are in 4bpp or 8bpp mode.
|
||||
const row = @as(u3, @truncate(y)) ^ if (entry.v_flip.read()) 7 else @as(u3, 0);
|
||||
const col = @as(u3, @truncate(x)) ^ if (entry.h_flip.read()) 7 else @as(u3, 0);
|
||||
const row = @truncate(u3, y) ^ if (entry.v_flip.read()) 7 else @as(u3, 0);
|
||||
const col = @truncate(u3, x) ^ if (entry.h_flip.read()) 7 else @as(u3, 0);
|
||||
const tile_addr = char_base + (tile_id * tile_len) + (row * tile_row_offset) + if (is_8bpp) col else col >> 1;
|
||||
|
||||
const tile = self.vram.buf[tile_addr];
|
||||
|
|
@ -649,7 +646,7 @@ pub const Ppu = struct {
|
|||
if (obj_enable) self.fetchSprites();
|
||||
|
||||
for (0..4) |layer| {
|
||||
self.drawSprites(@truncate(layer));
|
||||
self.drawSprites(@truncate(u2, layer));
|
||||
if (layer == self.bg[0].cnt.priority.read() and bg_enable & 1 == 1) self.drawBackground(0);
|
||||
if (layer == self.bg[1].cnt.priority.read() and bg_enable >> 1 & 1 == 1) self.drawBackground(1);
|
||||
if (layer == self.bg[2].cnt.priority.read() and bg_enable >> 2 & 1 == 1) self.drawBackground(2);
|
||||
|
|
@ -663,7 +660,7 @@ pub const Ppu = struct {
|
|||
if (obj_enable) self.fetchSprites();
|
||||
|
||||
for (0..4) |layer| {
|
||||
self.drawSprites(@as(u2, @truncate(layer)));
|
||||
self.drawSprites(@truncate(u2, layer));
|
||||
if (layer == self.bg[0].cnt.priority.read() and bg_enable & 1 == 1) self.drawBackground(0);
|
||||
if (layer == self.bg[1].cnt.priority.read() and bg_enable >> 1 & 1 == 1) self.drawBackground(1);
|
||||
if (layer == self.bg[2].cnt.priority.read() and bg_enable >> 2 & 1 == 1) self.drawAffineBackground(2);
|
||||
|
|
@ -676,7 +673,7 @@ pub const Ppu = struct {
|
|||
if (obj_enable) self.fetchSprites();
|
||||
|
||||
for (0..4) |layer| {
|
||||
self.drawSprites(@truncate(layer));
|
||||
self.drawSprites(@truncate(u2, layer));
|
||||
if (layer == self.bg[2].cnt.priority.read() and bg_enable >> 2 & 1 == 1) self.drawAffineBackground(2);
|
||||
if (layer == self.bg[3].cnt.priority.read() and bg_enable >> 3 & 1 == 1) self.drawAffineBackground(3);
|
||||
}
|
||||
|
|
@ -688,8 +685,8 @@ pub const Ppu = struct {
|
|||
const framebuf_base = width * @as(usize, scanline);
|
||||
|
||||
// FIXME: @ptrCast between slices changing the length isn't implemented yet
|
||||
const vram_buf: [*]const u16 = @ptrCast(@alignCast(self.vram.buf));
|
||||
const framebuf: [*]u32 = @ptrCast(@alignCast(self.framebuf.get(.Emulator)));
|
||||
const vram_buf = @ptrCast([*]const u16, @alignCast(@alignOf(u16), self.vram.buf));
|
||||
const framebuf = @ptrCast([*]u32, @alignCast(@alignOf(u32), self.framebuf.get(.Emulator)));
|
||||
|
||||
for (vram_buf[vram_base .. vram_base + width], 0..) |bgr555, i| {
|
||||
framebuf[framebuf_base + i] = rgba888(bgr555);
|
||||
|
|
@ -702,8 +699,8 @@ pub const Ppu = struct {
|
|||
const framebuf_base = width * @as(usize, scanline);
|
||||
|
||||
// FIXME: @ptrCast between slices changing the length isn't implemented yet
|
||||
const pal_buf: [*]const u16 = @ptrCast(@alignCast(self.palette.buf));
|
||||
const framebuf: [*]u32 = @ptrCast(@alignCast(self.framebuf.get(.Emulator)));
|
||||
const pal_buf = @ptrCast([*]const u16, @alignCast(@alignOf(u16), self.palette.buf));
|
||||
const framebuf = @ptrCast([*]u32, @alignCast(@alignOf(u32), self.framebuf.get(.Emulator)));
|
||||
|
||||
for (self.vram.buf[vram_base .. vram_base + width], 0..) |pal_id, i| {
|
||||
framebuf[framebuf_base + i] = rgba888(pal_buf[pal_id]);
|
||||
|
|
@ -718,8 +715,8 @@ pub const Ppu = struct {
|
|||
const framebuf_base = width * @as(usize, scanline);
|
||||
|
||||
// FIXME: @ptrCast between slices changing the length isn't implemented yet
|
||||
const vram_buf: [*]const u16 = @ptrCast(@alignCast(self.vram.buf));
|
||||
const framebuf: [*]u32 = @ptrCast(@alignCast(self.framebuf.get(.Emulator)));
|
||||
const vram_buf = @ptrCast([*]const u16, @alignCast(@alignOf(u16), self.vram.buf));
|
||||
const framebuf = @ptrCast([*]u32, @alignCast(@alignOf(u32), self.framebuf.get(.Emulator)));
|
||||
|
||||
for (0..width) |i| {
|
||||
const bgr555 = if (scanline < m5_height and i < m5_width) vram_buf[vram_base + i] else self.palette.backdrop();
|
||||
|
|
@ -735,7 +732,7 @@ pub const Ppu = struct {
|
|||
// If there are any nulls present in self.scanline.top() it means that no background drew a pixel there, so draw backdrop
|
||||
|
||||
// FIXME: @ptrCast between slices changing the length isn't implemented yet
|
||||
const framebuf: [*]u32 = @ptrCast(@alignCast(self.framebuf.get(.Emulator)));
|
||||
const framebuf = @ptrCast([*]u32, @alignCast(@alignOf(u32), self.framebuf.get(.Emulator)));
|
||||
|
||||
for (self.scanline.top(), 0..) |maybe_top, i| {
|
||||
const maybe_btm = self.scanline.btm()[i];
|
||||
|
|
@ -747,7 +744,7 @@ pub const Ppu = struct {
|
|||
// Reset Current Scanline Pixel Buffer and list of fetched sprites
|
||||
// in prep for next scanline
|
||||
self.scanline.reset();
|
||||
@memset(self.scanline_sprites, null);
|
||||
std.mem.set(?Sprite, self.scanline_sprites, null);
|
||||
}
|
||||
|
||||
fn getBgr555(self: *Self, maybe_top: Scanline.Pixel, maybe_btm: Scanline.Pixel) u16 {
|
||||
|
|
@ -1003,25 +1000,21 @@ pub const Ppu = struct {
|
|||
}
|
||||
|
||||
pub fn onHdrawEnd(self: *Self, cpu: *Arm7tdmi, late: u64) void {
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
// Transitioning to a Hblank
|
||||
if (self.dispstat.hblank_irq.read()) {
|
||||
bus_ptr.io.irq.hblank.set();
|
||||
handleInterrupt(cpu);
|
||||
cpu.bus.io.irq.hblank.set();
|
||||
cpu.handleInterrupt();
|
||||
}
|
||||
|
||||
// If we're not also in VBlank, attempt to run any pending DMA Reqs
|
||||
if (!self.dispstat.vblank.read())
|
||||
dma.onBlanking(bus_ptr, .HBlank);
|
||||
dma.onBlanking(cpu.bus, .HBlank);
|
||||
|
||||
self.dispstat.hblank.set();
|
||||
self.sched.push(.HBlank, 68 * 4 -| late);
|
||||
}
|
||||
|
||||
pub fn onHblankEnd(self: *Self, cpu: *Arm7tdmi, late: u64) void {
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
// The End of a Hblank (During Draw or Vblank)
|
||||
const old_scanline = self.vcount.scanline.read();
|
||||
const scanline = (old_scanline + 1) % 228;
|
||||
|
|
@ -1034,8 +1027,8 @@ pub const Ppu = struct {
|
|||
self.dispstat.coincidence.write(coincidence);
|
||||
|
||||
if (coincidence and self.dispstat.vcount_irq.read()) {
|
||||
bus_ptr.io.irq.coincidence.set();
|
||||
handleInterrupt(cpu);
|
||||
cpu.bus.io.irq.coincidence.set();
|
||||
cpu.handleInterrupt();
|
||||
}
|
||||
|
||||
if (scanline < 160) {
|
||||
|
|
@ -1049,15 +1042,15 @@ pub const Ppu = struct {
|
|||
self.dispstat.vblank.set();
|
||||
|
||||
if (self.dispstat.vblank_irq.read()) {
|
||||
bus_ptr.io.irq.vblank.set();
|
||||
handleInterrupt(cpu);
|
||||
cpu.bus.io.irq.vblank.set();
|
||||
cpu.handleInterrupt();
|
||||
}
|
||||
|
||||
self.aff_bg[0].latchRefPoints();
|
||||
self.aff_bg[1].latchRefPoints();
|
||||
|
||||
// See if Vblank DMA is present and not enabled
|
||||
dma.onBlanking(bus_ptr, .VBlank);
|
||||
dma.onBlanking(cpu.bus, .VBlank);
|
||||
}
|
||||
|
||||
if (scanline == 227) self.dispstat.vblank.unset();
|
||||
|
|
@ -1148,18 +1141,18 @@ const Window = struct {
|
|||
}
|
||||
|
||||
pub fn setH(self: *Self, value: u32) void {
|
||||
self.h[0].raw = @truncate(value);
|
||||
self.h[1].raw = @truncate(value >> 16);
|
||||
self.h[0].raw = @truncate(u16, value);
|
||||
self.h[1].raw = @truncate(u16, value >> 16);
|
||||
}
|
||||
|
||||
pub fn setV(self: *Self, value: u32) void {
|
||||
self.v[0].raw = @truncate(value);
|
||||
self.v[1].raw = @truncate(value >> 16);
|
||||
self.v[0].raw = @truncate(u16, value);
|
||||
self.v[1].raw = @truncate(u16, value >> 16);
|
||||
}
|
||||
|
||||
pub fn setIo(self: *Self, value: u32) void {
|
||||
self.in.raw = @truncate(value);
|
||||
self.out.raw = @truncate(value >> 16);
|
||||
self.in.raw = @truncate(u16, value);
|
||||
self.out.raw = @truncate(u16, value >> 16);
|
||||
}
|
||||
};
|
||||
|
||||
|
|
@ -1222,23 +1215,23 @@ const AffineBackground = struct {
|
|||
}
|
||||
|
||||
pub fn setX(self: *Self, is_vblank: bool, value: u32) void {
|
||||
self.x = @bitCast(value);
|
||||
if (!is_vblank) self.x_latch = @bitCast(value);
|
||||
self.x = @bitCast(i32, value);
|
||||
if (!is_vblank) self.x_latch = @bitCast(i32, value);
|
||||
}
|
||||
|
||||
pub fn setY(self: *Self, is_vblank: bool, value: u32) void {
|
||||
self.y = @bitCast(value);
|
||||
if (!is_vblank) self.y_latch = @bitCast(value);
|
||||
self.y = @bitCast(i32, value);
|
||||
if (!is_vblank) self.y_latch = @bitCast(i32, value);
|
||||
}
|
||||
|
||||
pub fn writePaPb(self: *Self, value: u32) void {
|
||||
self.pa = @bitCast(@as(u16, @truncate(value)));
|
||||
self.pb = @bitCast(@as(u16, @truncate(value >> 16)));
|
||||
self.pa = @bitCast(i16, @truncate(u16, value));
|
||||
self.pb = @bitCast(i16, @truncate(u16, value >> 16));
|
||||
}
|
||||
|
||||
pub fn writePcPd(self: *Self, value: u32) void {
|
||||
self.pc = @bitCast(@as(u16, @truncate(value)));
|
||||
self.pd = @bitCast(@as(u16, @truncate(value >> 16)));
|
||||
self.pc = @bitCast(i16, @truncate(u16, value));
|
||||
self.pd = @bitCast(i16, @truncate(u16, value >> 16));
|
||||
}
|
||||
|
||||
// Every Vblank BG?X/Y registers are latched
|
||||
|
|
@ -1447,9 +1440,9 @@ fn alphaBlend(top: u16, btm: u16, bldalpha: io.BldAlpha) u16 {
|
|||
const btm_g = (btm >> 5) & 0x1F;
|
||||
const btm_b = (btm >> 10) & 0x1F;
|
||||
|
||||
const bld_r: u16 = @min(31, (top_r * eva + btm_r * evb) >> 4);
|
||||
const bld_g: u16 = @min(31, (top_g * eva + btm_g * evb) >> 4);
|
||||
const bld_b: u16 = @min(31, (top_b * eva + btm_b * evb) >> 4);
|
||||
const bld_r = std.math.min(31, (top_r * eva + btm_r * evb) >> 4);
|
||||
const bld_g = std.math.min(31, (top_g * eva + btm_g * evb) >> 4);
|
||||
const bld_b = std.math.min(31, (top_b * eva + btm_b * evb) >> 4);
|
||||
|
||||
return (bld_b << 10) | (bld_g << 5) | bld_r;
|
||||
}
|
||||
|
|
@ -1561,7 +1554,7 @@ const Scanline = struct {
|
|||
|
||||
fn init(allocator: Allocator) !Self {
|
||||
const buf = try allocator.alloc(Pixel, width * 2); // Top & Bottom Scanline
|
||||
@memset(buf, .unset);
|
||||
std.mem.set(Pixel, buf, .unset);
|
||||
|
||||
return .{
|
||||
// Top & Bototm Layers
|
||||
|
|
@ -1572,7 +1565,7 @@ const Scanline = struct {
|
|||
}
|
||||
|
||||
fn reset(self: *Self) void {
|
||||
@memset(self.buf, .unset);
|
||||
std.mem.set(Pixel, self.buf, .unset);
|
||||
}
|
||||
|
||||
fn deinit(self: *Self) void {
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ pub fn read(self: *const Self, comptime T: type, address: usize) T {
|
|||
const addr = address & 0x3FF;
|
||||
|
||||
return switch (T) {
|
||||
u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
|
||||
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
|
||||
else => @compileError("OAM: Unsupported read width"),
|
||||
};
|
||||
}
|
||||
|
|
@ -21,7 +21,7 @@ pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
|
|||
const addr = address & 0x3FF;
|
||||
|
||||
switch (T) {
|
||||
u32, u16 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
|
||||
u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
|
||||
u8 => return, // 8-bit writes are explicitly ignored
|
||||
else => @compileError("OAM: Unsupported write width"),
|
||||
}
|
||||
|
|
@ -29,13 +29,13 @@ pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
|
|||
|
||||
pub fn init(allocator: Allocator) !Self {
|
||||
const buf = try allocator.alloc(u8, buf_len);
|
||||
@memset(buf, 0);
|
||||
std.mem.set(u8, buf, 0);
|
||||
|
||||
return Self{ .buf = buf, .allocator = allocator };
|
||||
}
|
||||
|
||||
pub fn reset(self: *Self) void {
|
||||
@memset(self.buf, 0);
|
||||
std.mem.set(u8, self.buf, 0);
|
||||
}
|
||||
|
||||
pub fn deinit(self: *Self) void {
|
||||
|
|
|
|||
|
|
@ -12,7 +12,7 @@ pub fn read(self: *const Self, comptime T: type, address: usize) T {
|
|||
const addr = address & 0x3FF;
|
||||
|
||||
return switch (T) {
|
||||
u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
|
||||
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
|
||||
else => @compileError("PALRAM: Unsupported read width"),
|
||||
};
|
||||
}
|
||||
|
|
@ -21,10 +21,10 @@ pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
|
|||
const addr = address & 0x3FF;
|
||||
|
||||
switch (T) {
|
||||
u32, u16 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
|
||||
u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
|
||||
u8 => {
|
||||
const align_addr = addr & ~@as(u32, 1); // Aligned to Halfword boundary
|
||||
std.mem.writeInt(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101, .little);
|
||||
std.mem.writeIntSliceLittle(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
|
||||
},
|
||||
else => @compileError("PALRAM: Unsupported write width"),
|
||||
}
|
||||
|
|
@ -32,13 +32,13 @@ pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
|
|||
|
||||
pub fn init(allocator: Allocator) !Self {
|
||||
const buf = try allocator.alloc(u8, buf_len);
|
||||
@memset(buf, 0);
|
||||
std.mem.set(u8, buf, 0);
|
||||
|
||||
return Self{ .buf = buf, .allocator = allocator };
|
||||
}
|
||||
|
||||
pub fn reset(self: *Self) void {
|
||||
@memset(self.buf, 0);
|
||||
std.mem.set(u8, self.buf, 0);
|
||||
}
|
||||
|
||||
pub fn deinit(self: *Self) void {
|
||||
|
|
@ -47,5 +47,5 @@ pub fn deinit(self: *Self) void {
|
|||
}
|
||||
|
||||
pub inline fn backdrop(self: *const Self) u16 {
|
||||
return std.mem.readInt(u16, self.buf[0..2], .little);
|
||||
return std.mem.readIntNative(u16, self.buf[0..2]);
|
||||
}
|
||||
|
|
|
|||
|
|
@ -13,7 +13,7 @@ pub fn read(self: *const Self, comptime T: type, address: usize) T {
|
|||
const addr = Self.mirror(address);
|
||||
|
||||
return switch (T) {
|
||||
u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
|
||||
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
|
||||
else => @compileError("VRAM: Unsupported read width"),
|
||||
};
|
||||
}
|
||||
|
|
@ -23,7 +23,7 @@ pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address:
|
|||
const idx = Self.mirror(address);
|
||||
|
||||
switch (T) {
|
||||
u32, u16 => std.mem.writeInt(T, self.buf[idx..][0..@sizeOf(T)], value, .little),
|
||||
u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[idx..][0..@sizeOf(T)], value),
|
||||
u8 => {
|
||||
// Ignore write if it falls within the boundaries of OBJ VRAM
|
||||
switch (mode) {
|
||||
|
|
@ -32,7 +32,7 @@ pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address:
|
|||
}
|
||||
|
||||
const align_idx = idx & ~@as(u32, 1); // Aligned to a halfword boundary
|
||||
std.mem.writeInt(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101, .little);
|
||||
std.mem.writeIntSliceLittle(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
|
||||
},
|
||||
else => @compileError("VRAM: Unsupported write width"),
|
||||
}
|
||||
|
|
@ -40,13 +40,13 @@ pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address:
|
|||
|
||||
pub fn init(allocator: Allocator) !Self {
|
||||
const buf = try allocator.alloc(u8, buf_len);
|
||||
@memset(buf, 0);
|
||||
std.mem.set(u8, buf, 0);
|
||||
|
||||
return Self{ .buf = buf, .allocator = allocator };
|
||||
}
|
||||
|
||||
pub fn reset(self: *Self) void {
|
||||
@memset(self.buf, 0);
|
||||
std.mem.set(u8, self.buf, 0);
|
||||
}
|
||||
|
||||
pub fn deinit(self: *Self) void {
|
||||
|
|
|
|||
|
|
@ -1,7 +1,6 @@
|
|||
const std = @import("std");
|
||||
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Bus = @import("Bus.zig");
|
||||
const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
|
||||
const Clock = @import("bus/gpio.zig").Clock;
|
||||
|
||||
const Order = std.math.Order;
|
||||
|
|
@ -46,8 +45,6 @@ pub const Scheduler = struct {
|
|||
const event = self.queue.remove();
|
||||
const late = self.tick - event.tick;
|
||||
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
switch (event.kind) {
|
||||
.HeatDeath => {
|
||||
log.err("u64 overflow. This *actually* should never happen.", .{});
|
||||
|
|
@ -55,33 +52,33 @@ pub const Scheduler = struct {
|
|||
},
|
||||
.Draw => {
|
||||
// The end of a VDraw
|
||||
bus_ptr.ppu.drawScanline();
|
||||
bus_ptr.ppu.onHdrawEnd(cpu, late);
|
||||
cpu.bus.ppu.drawScanline();
|
||||
cpu.bus.ppu.onHdrawEnd(cpu, late);
|
||||
},
|
||||
.TimerOverflow => |id| {
|
||||
switch (id) {
|
||||
inline 0...3 => |idx| bus_ptr.tim[idx].onTimerExpire(cpu, late),
|
||||
inline 0...3 => |idx| cpu.bus.tim[idx].onTimerExpire(cpu, late),
|
||||
}
|
||||
},
|
||||
.ApuChannel => |id| {
|
||||
switch (id) {
|
||||
0 => bus_ptr.apu.ch1.onToneSweepEvent(late),
|
||||
1 => bus_ptr.apu.ch2.onToneEvent(late),
|
||||
2 => bus_ptr.apu.ch3.onWaveEvent(late),
|
||||
3 => bus_ptr.apu.ch4.onNoiseEvent(late),
|
||||
0 => cpu.bus.apu.ch1.onToneSweepEvent(late),
|
||||
1 => cpu.bus.apu.ch2.onToneEvent(late),
|
||||
2 => cpu.bus.apu.ch3.onWaveEvent(late),
|
||||
3 => cpu.bus.apu.ch4.onNoiseEvent(late),
|
||||
}
|
||||
},
|
||||
.RealTimeClock => {
|
||||
const device = &bus_ptr.pak.gpio.device;
|
||||
const device = &cpu.bus.pak.gpio.device;
|
||||
if (device.kind != .Rtc or device.ptr == null) return;
|
||||
|
||||
const clock: *Clock = @ptrCast(@alignCast(device.ptr.?));
|
||||
const clock = @ptrCast(*Clock, @alignCast(@alignOf(*Clock), device.ptr.?));
|
||||
clock.onClockUpdate(late);
|
||||
},
|
||||
.FrameSequencer => bus_ptr.apu.onSequencerTick(late),
|
||||
.SampleAudio => bus_ptr.apu.sampleAudio(late),
|
||||
.HBlank => bus_ptr.ppu.onHblankEnd(cpu, late), // The end of a HBlank
|
||||
.VBlank => bus_ptr.ppu.onHdrawEnd(cpu, late), // The end of a VBlank
|
||||
.FrameSequencer => cpu.bus.apu.onSequencerTick(late),
|
||||
.SampleAudio => cpu.bus.apu.sampleAudio(late),
|
||||
.HBlank => cpu.bus.ppu.onHblankEnd(cpu, late), // The end of a HBlank
|
||||
.VBlank => cpu.bus.ppu.onHdrawEnd(cpu, late), // The end of a VBlank
|
||||
}
|
||||
}
|
||||
|
||||
|
|
@ -93,7 +90,7 @@ pub const Scheduler = struct {
|
|||
// invalidates the slice we're iterating over
|
||||
_ = self.queue.removeIndex(i);
|
||||
|
||||
// log.debug("Removed {?}@{}", .{ event.kind, event.tick });
|
||||
log.debug("Removed {?}@{}", .{ event.kind, event.tick });
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
|
|
|||
276
src/imgui.zig
276
src/imgui.zig
|
|
@ -10,13 +10,8 @@ const config = @import("config.zig");
|
|||
const emu = @import("core/emu.zig");
|
||||
|
||||
const Gui = @import("platform.zig").Gui;
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Scheduler = @import("core/scheduler.zig").Scheduler;
|
||||
const Bus = @import("core/Bus.zig");
|
||||
const Synchro = @import("core/emu.zig").Synchro;
|
||||
|
||||
const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
|
||||
const RingBuffer = @import("zba-util").RingBuffer;
|
||||
const Dimensions = @import("platform.zig").Dimensions;
|
||||
|
||||
const Allocator = std.mem.Allocator;
|
||||
const GLuint = gl.GLuint;
|
||||
|
|
@ -35,34 +30,14 @@ pub const State = struct {
|
|||
|
||||
fps_hist: RingBuffer(u32),
|
||||
should_quit: bool = false,
|
||||
emulation: Emulation,
|
||||
|
||||
win_stat: WindowStatus = .{},
|
||||
|
||||
const WindowStatus = struct {
|
||||
show_deps: bool = false,
|
||||
show_regs: bool = false,
|
||||
show_schedule: bool = false,
|
||||
show_perf: bool = false,
|
||||
show_palette: bool = false,
|
||||
};
|
||||
|
||||
const Emulation = union(enum) {
|
||||
Active,
|
||||
Inactive,
|
||||
Transition: enum { Active, Inactive },
|
||||
};
|
||||
|
||||
/// if zba is initialized with a ROM already provided, this initializer should be called
|
||||
/// with `title_opt` being non-null
|
||||
pub fn init(allocator: Allocator, title_opt: ?*const [12]u8) !@This() {
|
||||
const history = try allocator.alloc(u32, histogram_len);
|
||||
|
||||
return .{
|
||||
.title = handleTitle(title_opt),
|
||||
.emulation = if (title_opt == null) .Inactive else .{ .Transition = .Active },
|
||||
.fps_hist = RingBuffer(u32).init(history),
|
||||
};
|
||||
const title: [12:0]u8 = if (title_opt) |t| t.* ++ [_:0]u8{} else "[No Title]\x00\x00".*;
|
||||
return .{ .title = title, .fps_hist = RingBuffer(u32).init(history) };
|
||||
}
|
||||
|
||||
pub fn deinit(self: *@This(), allocator: Allocator) void {
|
||||
|
|
@ -71,13 +46,8 @@ pub const State = struct {
|
|||
}
|
||||
};
|
||||
|
||||
pub fn draw(state: *State, sync: *Synchro, dim: Dimensions, cpu: *const Arm7tdmi, tex_id: GLuint) bool {
|
||||
const scn_scale = config.config().host.win_scale;
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
|
||||
zgui.backend.newFrame(@floatFromInt(dim.width), @floatFromInt(dim.height));
|
||||
|
||||
state.title = handleTitle(&bus_ptr.pak.title);
|
||||
pub fn draw(state: *State, tex_id: GLuint, cpu: *Arm7tdmi) void {
|
||||
const win_scale = config.config().host.win_scale;
|
||||
|
||||
{
|
||||
_ = zgui.beginMainMenuBar();
|
||||
|
|
@ -86,166 +56,52 @@ pub fn draw(state: *State, sync: *Synchro, dim: Dimensions, cpu: *const Arm7tdmi
|
|||
if (zgui.beginMenu("File", true)) {
|
||||
defer zgui.endMenu();
|
||||
|
||||
if (zgui.menuItem("Quit", .{}))
|
||||
state.should_quit = true;
|
||||
if (zgui.menuItem("Quit", .{})) state.should_quit = true;
|
||||
|
||||
if (zgui.menuItem("Insert ROM", .{})) blk: {
|
||||
const file_path = tmp: {
|
||||
const path_opt = nfd.openFileDialog("gba", null) catch |e| {
|
||||
log.err("file dialog failed to open: {}", .{e});
|
||||
const maybe_path = nfd.openFileDialog("gba", null) catch |e| {
|
||||
log.err("failed to open file dialog: {}", .{e});
|
||||
break :blk;
|
||||
};
|
||||
|
||||
break :tmp path_opt orelse {
|
||||
const file_path = maybe_path orelse {
|
||||
log.warn("did not receive a file path", .{});
|
||||
break :blk;
|
||||
};
|
||||
};
|
||||
defer nfd.freePath(file_path);
|
||||
|
||||
log.info("user chose: \"{s}\"", .{file_path});
|
||||
|
||||
const message = tmp: {
|
||||
var msg: Synchro.Message = .{ .rom_path = undefined };
|
||||
@memcpy(msg.rom_path[0..file_path.len], file_path);
|
||||
break :tmp msg;
|
||||
};
|
||||
|
||||
sync.ch.push(message) catch |e| {
|
||||
log.err("failed to send file path to emu thread: {}", .{e});
|
||||
emu.replaceGamepak(cpu, file_path) catch |e| {
|
||||
log.err("failed to replace GamePak: {}", .{e});
|
||||
break :blk;
|
||||
};
|
||||
|
||||
state.emulation = .{ .Transition = .Active };
|
||||
}
|
||||
|
||||
if (zgui.menuItem("Load BIOS", .{})) blk: {
|
||||
const file_path = tmp: {
|
||||
const path_opt = nfd.openFileDialog("bin", null) catch |e| {
|
||||
log.err("file dialog failed to open: {}", .{e});
|
||||
break :blk;
|
||||
};
|
||||
|
||||
break :tmp path_opt orelse {
|
||||
log.warn("did not receive a file path", .{});
|
||||
break :blk;
|
||||
};
|
||||
};
|
||||
defer nfd.freePath(file_path);
|
||||
|
||||
log.info("user chose: \"{s}\"", .{file_path});
|
||||
|
||||
const message = tmp: {
|
||||
var msg: Synchro.Message = .{ .bios_path = undefined };
|
||||
@memcpy(msg.bios_path[0..file_path.len], file_path);
|
||||
break :tmp msg;
|
||||
};
|
||||
|
||||
sync.ch.push(message) catch |e| {
|
||||
log.err("failed to send file path to emu thread: {}", .{e});
|
||||
break :blk;
|
||||
};
|
||||
state.title = cpu.bus.pak.title ++ [_:0]u8{};
|
||||
}
|
||||
}
|
||||
|
||||
if (zgui.beginMenu("Emulation", true)) {
|
||||
defer zgui.endMenu();
|
||||
|
||||
if (zgui.menuItem("Registers", .{ .selected = state.win_stat.show_regs }))
|
||||
state.win_stat.show_regs = true;
|
||||
|
||||
if (zgui.menuItem("Palette", .{ .selected = state.win_stat.show_palette }))
|
||||
state.win_stat.show_palette = true;
|
||||
|
||||
if (zgui.menuItem("Schedule", .{ .selected = state.win_stat.show_schedule }))
|
||||
state.win_stat.show_schedule = true;
|
||||
|
||||
if (zgui.menuItem("Paused", .{ .selected = state.emulation == .Inactive })) {
|
||||
state.emulation = switch (state.emulation) {
|
||||
.Active => .{ .Transition = .Inactive },
|
||||
.Inactive => .{ .Transition = .Active },
|
||||
else => state.emulation,
|
||||
};
|
||||
if (zgui.menuItem("Restart", .{})) {
|
||||
emu.reset(cpu);
|
||||
}
|
||||
|
||||
if (zgui.menuItem("Restart", .{}))
|
||||
sync.ch.push(.restart) catch |e| log.err("failed to send restart req to emu thread: {}", .{e});
|
||||
}
|
||||
|
||||
if (zgui.beginMenu("Stats", true)) {
|
||||
defer zgui.endMenu();
|
||||
|
||||
if (zgui.menuItem("Performance", .{ .selected = state.win_stat.show_perf }))
|
||||
state.win_stat.show_perf = true;
|
||||
}
|
||||
|
||||
if (zgui.beginMenu("Help", true)) {
|
||||
defer zgui.endMenu();
|
||||
|
||||
if (zgui.menuItem("Dependencies", .{ .selected = state.win_stat.show_deps }))
|
||||
state.win_stat.show_deps = true;
|
||||
}
|
||||
}
|
||||
|
||||
{
|
||||
const w: f32 = @floatFromInt(gba_width * scn_scale);
|
||||
const h: f32 = @floatFromInt(gba_height * scn_scale);
|
||||
const w = @intToFloat(f32, gba_width * win_scale);
|
||||
const h = @intToFloat(f32, gba_height * win_scale);
|
||||
|
||||
const window_title = std.mem.sliceTo(&state.title, 0);
|
||||
_ = zgui.begin(window_title, .{ .flags = .{ .no_resize = true, .always_auto_resize = true } });
|
||||
defer zgui.end();
|
||||
|
||||
zgui.image(@ptrFromInt(tex_id), .{ .w = w, .h = h });
|
||||
zgui.image(@intToPtr(*anyopaque, tex_id), .{ .w = w, .h = h, .uv0 = .{ 0, 1 }, .uv1 = .{ 1, 0 } });
|
||||
}
|
||||
|
||||
// TODO: Any other steps to respect the copyright of the libraries I use?
|
||||
if (state.win_stat.show_deps) {
|
||||
_ = zgui.begin("Dependencies", .{ .popen = &state.win_stat.show_deps });
|
||||
defer zgui.end();
|
||||
|
||||
zgui.bulletText("known-folders by ziglibs", .{});
|
||||
zgui.bulletText("nfd-zig by Fabio Arnold", .{});
|
||||
{
|
||||
zgui.indent(.{});
|
||||
defer zgui.unindent(.{});
|
||||
|
||||
zgui.bulletText("nativefiledialog by Michael Labbe", .{});
|
||||
}
|
||||
|
||||
zgui.bulletText("SDL.zig by Felix Queißner", .{});
|
||||
{
|
||||
zgui.indent(.{});
|
||||
defer zgui.unindent(.{});
|
||||
|
||||
zgui.bulletText("SDL by Sam Lantinga", .{});
|
||||
}
|
||||
|
||||
zgui.bulletText("tomlz by Matthew Hall", .{});
|
||||
zgui.bulletText("zba-gdbstub by Rekai Musuka", .{});
|
||||
zgui.bulletText("zba-util by Rekai Musuka", .{});
|
||||
zgui.bulletText("zgui by Michal Ziulek", .{});
|
||||
{
|
||||
zgui.indent(.{});
|
||||
defer zgui.unindent(.{});
|
||||
|
||||
zgui.bulletText("DearImGui by Omar Cornut", .{});
|
||||
}
|
||||
zgui.bulletText("zig-clap by Jimmi Holst Christensen", .{});
|
||||
zgui.bulletText("zig-datetime by Jairus Martin", .{});
|
||||
|
||||
zgui.newLine();
|
||||
zgui.bulletText("bitfield.zig by Hannes Bredberg and FlorenceOS contributors", .{});
|
||||
zgui.bulletText("zig-opengl by Felix Queißner", .{});
|
||||
{
|
||||
zgui.indent(.{});
|
||||
defer zgui.unindent(.{});
|
||||
|
||||
zgui.bulletText("OpenGL-Registry by The Khronos Group", .{});
|
||||
}
|
||||
}
|
||||
|
||||
if (state.win_stat.show_regs) {
|
||||
_ = zgui.begin("Guest Registers", .{ .popen = &state.win_stat.show_regs });
|
||||
_ = zgui.begin("Information", .{});
|
||||
defer zgui.end();
|
||||
|
||||
for (0..8) |i| {
|
||||
|
|
@ -264,12 +120,12 @@ pub fn draw(state: *State, sync: *Synchro, dim: Dimensions, cpu: *const Arm7tdmi
|
|||
|
||||
zgui.separator();
|
||||
|
||||
widgets.interrupts(" IE", bus_ptr.io.ie);
|
||||
widgets.interrupts("IRQ", bus_ptr.io.irq);
|
||||
widgets.interrupts(" IE", cpu.bus.io.ie);
|
||||
widgets.interrupts("IRQ", cpu.bus.io.irq);
|
||||
}
|
||||
|
||||
if (state.win_stat.show_perf) {
|
||||
_ = zgui.begin("Performance", .{ .popen = &state.win_stat.show_perf });
|
||||
{
|
||||
_ = zgui.begin("Performance", .{});
|
||||
defer zgui.end();
|
||||
|
||||
const tmp = blk: {
|
||||
|
|
@ -286,14 +142,14 @@ pub fn draw(state: *State, sync: *Synchro, dim: Dimensions, cpu: *const Arm7tdmi
|
|||
const sorted = blk: {
|
||||
var buf: @TypeOf(values) = undefined;
|
||||
|
||||
@memcpy(buf[0..len], values[0..len]);
|
||||
std.mem.sort(u32, buf[0..len], {}, std.sort.asc(u32));
|
||||
std.mem.copy(u32, buf[0..len], values[0..len]);
|
||||
std.sort.sort(u32, buf[0..len], {}, std.sort.asc(u32));
|
||||
|
||||
break :blk buf;
|
||||
};
|
||||
|
||||
const y_max: f64 = 2 * if (len != 0) @as(f64, @floatFromInt(sorted[len - 1])) else emu.frame_rate;
|
||||
const x_max: f64 = @floatFromInt(values.len);
|
||||
const y_max = 2 * if (len != 0) @intToFloat(f64, sorted[len - 1]) else emu.frame_rate;
|
||||
const x_max = @intToFloat(f64, values.len);
|
||||
|
||||
const y_args = .{ .flags = .{ .no_grid_lines = true } };
|
||||
const x_args = .{ .flags = .{ .no_grid_lines = true, .no_tick_labels = true, .no_tick_marks = true } };
|
||||
|
|
@ -314,11 +170,11 @@ pub fn draw(state: *State, sync: *Synchro, dim: Dimensions, cpu: *const Arm7tdmi
|
|||
const stats: struct { u32, u32, u32 } = blk: {
|
||||
if (len == 0) break :blk .{ 0, 0, 0 };
|
||||
|
||||
const average: u32 = average: {
|
||||
const average = average: {
|
||||
var sum: u32 = 0;
|
||||
for (sorted[0..len]) |value| sum += value;
|
||||
|
||||
break :average @intCast(sum / len);
|
||||
break :average @intCast(u32, sum / len);
|
||||
};
|
||||
const median = sorted[len / 2];
|
||||
const low = sorted[len / 100]; // 1% Low
|
||||
|
|
@ -331,84 +187,34 @@ pub fn draw(state: *State, sync: *Synchro, dim: Dimensions, cpu: *const Arm7tdmi
|
|||
zgui.text(" 1% Low: {:0>3} fps", .{stats[2]});
|
||||
}
|
||||
|
||||
if (state.win_stat.show_schedule) {
|
||||
_ = zgui.begin("Schedule", .{ .popen = &state.win_stat.show_schedule });
|
||||
{
|
||||
_ = zgui.begin("Scheduler", .{});
|
||||
defer zgui.end();
|
||||
|
||||
const scheduler = cpu.sched;
|
||||
|
||||
zgui.text("tick: {X:0>16}", .{scheduler.now()});
|
||||
zgui.text("tick: {X:0>16}", .{scheduler.tick});
|
||||
zgui.separator();
|
||||
|
||||
const sched_ptr: *Scheduler = @ptrCast(@alignCast(cpu.sched.ptr));
|
||||
const Event = std.meta.Child(@TypeOf(sched_ptr.queue.items));
|
||||
const Event = std.meta.Child(@TypeOf(scheduler.queue.items));
|
||||
|
||||
var items: [20]Event = undefined;
|
||||
const len = @min(sched_ptr.queue.items.len, items.len);
|
||||
const len = scheduler.queue.len;
|
||||
|
||||
@memcpy(items[0..len], sched_ptr.queue.items[0..len]);
|
||||
std.mem.sort(Event, items[0..len], {}, widgets.eventDesc(Event));
|
||||
std.mem.copy(Event, &items, scheduler.queue.items);
|
||||
std.sort.sort(Event, items[0..len], {}, widgets.eventDesc(Event));
|
||||
|
||||
for (items[0..len]) |event| {
|
||||
zgui.text("{X:0>16} | {?}", .{ event.tick, event.kind });
|
||||
}
|
||||
}
|
||||
|
||||
if (state.win_stat.show_palette) {
|
||||
_ = zgui.begin("Palette", .{ .popen = &state.win_stat.show_palette });
|
||||
defer zgui.end();
|
||||
|
||||
widgets.paletteGrid(.Background, cpu);
|
||||
|
||||
zgui.sameLine(.{ .spacing = 20.0 });
|
||||
|
||||
widgets.paletteGrid(.Object, cpu);
|
||||
}
|
||||
|
||||
// {
|
||||
// zgui.showDemoWindow(null);
|
||||
// }
|
||||
|
||||
return true; // request redraw
|
||||
}
|
||||
|
||||
const widgets = struct {
|
||||
const PaletteKind = enum { Background, Object };
|
||||
|
||||
fn paletteGrid(comptime kind: PaletteKind, cpu: *const Arm7tdmi) void {
|
||||
_ = zgui.beginGroup();
|
||||
defer zgui.endGroup();
|
||||
|
||||
const address: u32 = switch (kind) {
|
||||
.Background => 0x0500_0000,
|
||||
.Object => 0x0500_0200,
|
||||
};
|
||||
|
||||
for (0..0x100) |i| {
|
||||
const offset: u32 = @truncate(i);
|
||||
const bgr555 = cpu.bus.dbgRead(u16, address + offset * @sizeOf(u16));
|
||||
widgets.colourSquare(bgr555);
|
||||
|
||||
if ((i + 1) % 0x10 != 0) zgui.sameLine(.{});
|
||||
}
|
||||
zgui.text(@tagName(kind), .{});
|
||||
}
|
||||
|
||||
fn colourSquare(bgr555: u16) void {
|
||||
// FIXME: working with the packed struct enum is currently broken :pensive:
|
||||
const ImguiColorEditFlags_NoInputs: u32 = 1 << 5;
|
||||
const ImguiColorEditFlags_NoPicker: u32 = 1 << 2;
|
||||
const flags: zgui.ColorEditFlags = @bitCast(ImguiColorEditFlags_NoInputs | ImguiColorEditFlags_NoPicker);
|
||||
|
||||
const b: f32 = @floatFromInt(bgr555 >> 10 & 0x1f);
|
||||
const g: f32 = @floatFromInt(bgr555 >> 5 & 0x1F);
|
||||
const r: f32 = @floatFromInt(bgr555 & 0x1F);
|
||||
|
||||
var col = [_]f32{ r / 31.0, g / 31.0, b / 31.0 };
|
||||
|
||||
_ = zgui.colorEdit3("", .{ .col = &col, .flags = flags });
|
||||
}
|
||||
|
||||
fn interrupts(comptime label: []const u8, int: anytype) void {
|
||||
const h = 15.0;
|
||||
const w = 9.0 * 2 + 3.5;
|
||||
|
|
@ -466,7 +272,7 @@ const widgets = struct {
|
|||
}
|
||||
|
||||
fn psr(comptime label: []const u8, register: anytype) void {
|
||||
const Mode = @import("arm32").arm.Mode;
|
||||
const Mode = @import("core/cpu.zig").Mode;
|
||||
|
||||
const maybe_mode = std.meta.intToEnum(Mode, register.mode.read()) catch null;
|
||||
const mode = if (maybe_mode) |mode| mode.toString() else "???";
|
||||
|
|
@ -499,13 +305,3 @@ const widgets = struct {
|
|||
}.inner;
|
||||
}
|
||||
};
|
||||
|
||||
fn handleTitle(title_opt: ?*const [12]u8) [12:0]u8 {
|
||||
if (title_opt == null) return "[N/A Title]\x00".*; // No ROM present
|
||||
const title = title_opt.?;
|
||||
|
||||
// ROM Title is an empty string (ImGui hates these)
|
||||
if (title[0] == '\x00') return "[No Title]\x00\x00".*;
|
||||
|
||||
return title.* ++ [_:0]u8{};
|
||||
}
|
||||
|
|
|
|||
82
src/main.zig
82
src/main.zig
|
|
@ -6,18 +6,15 @@ const clap = @import("clap");
|
|||
const config = @import("config.zig");
|
||||
const emu = @import("core/emu.zig");
|
||||
|
||||
const Synchro = @import("core/emu.zig").Synchro;
|
||||
const TwoWayChannel = @import("zba-util").TwoWayChannel;
|
||||
const Gui = @import("platform.zig").Gui;
|
||||
const Bus = @import("core/Bus.zig");
|
||||
const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
|
||||
const Scheduler = @import("core/scheduler.zig").Scheduler;
|
||||
const FilePaths = @import("util.zig").FilePaths;
|
||||
const FpsTracker = @import("util.zig").FpsTracker;
|
||||
const Allocator = std.mem.Allocator;
|
||||
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const IBus = @import("arm32").Bus;
|
||||
const IScheduler = @import("arm32").Scheduler;
|
||||
|
||||
const log = std.log.scoped(.Cli);
|
||||
pub const log_level = if (builtin.mode != .Debug) .info else std.log.default_level;
|
||||
|
||||
|
|
@ -34,7 +31,7 @@ const params = clap.parseParamsComptime(
|
|||
pub fn main() void {
|
||||
// Main Allocator for ZBA
|
||||
var gpa = std.heap.GeneralPurposeAllocator(.{}){};
|
||||
defer std.debug.assert(gpa.deinit() == .ok);
|
||||
defer std.debug.assert(!gpa.deinit());
|
||||
|
||||
const allocator = gpa.allocator();
|
||||
|
||||
|
|
@ -61,8 +58,7 @@ pub fn main() void {
|
|||
defer allocator.free(config_path);
|
||||
|
||||
// Parse CLI
|
||||
|
||||
const result = clap.parse(clap.Help, ¶ms, clap.parsers.default, .{ .allocator = allocator }) catch |e| exitln("failed to parse cli: {}", .{e});
|
||||
const result = clap.parse(clap.Help, ¶ms, clap.parsers.default, .{}) catch |e| exitln("failed to parse cli: {}", .{e});
|
||||
defer result.deinit();
|
||||
|
||||
// TODO: Move config file to XDG Config directory?
|
||||
|
|
@ -71,24 +67,8 @@ pub fn main() void {
|
|||
|
||||
config.load(allocator, cfg_file_path) catch |e| exitln("failed to load config file: {}", .{e});
|
||||
|
||||
var paths = handleArguments(allocator, data_path, &result) catch |e| exitln("failed to handle cli arguments: {}", .{e});
|
||||
defer paths.deinit(allocator);
|
||||
|
||||
// if paths.bios is null, then we want to see if it's in the data directory
|
||||
if (paths.bios == null) blk: {
|
||||
const bios_path = std.mem.join(allocator, "/", &.{ data_path, "zba", "gba_bios.bin" }) catch |e| exitln("failed to allocate backup bios dir path: {}", .{e});
|
||||
defer allocator.free(bios_path);
|
||||
|
||||
_ = std.fs.cwd().statFile(bios_path) catch |e| switch (e) {
|
||||
error.FileNotFound => { // ZBA will crash on attempt to read BIOS but that's fine
|
||||
log.err("file located at {s} was not found", .{bios_path});
|
||||
break :blk;
|
||||
},
|
||||
else => exitln("error when checking \"{s}\": {}", .{ bios_path, e }),
|
||||
};
|
||||
|
||||
paths.bios = allocator.dupe(u8, bios_path) catch |e| exitln("failed to duplicate path to bios: {}", .{e});
|
||||
}
|
||||
const paths = handleArguments(allocator, data_path, &result) catch |e| exitln("failed to handle cli arguments: {}", .{e});
|
||||
defer if (paths.save) |path| allocator.free(path);
|
||||
|
||||
const log_file = switch (config.config().debug.cpu_trace) {
|
||||
true => std.fs.cwd().createFile("zba.log", .{}) catch |e| exitln("failed to create trace log file: {}", .{e}),
|
||||
|
|
@ -101,17 +81,13 @@ pub fn main() void {
|
|||
defer scheduler.deinit();
|
||||
|
||||
var bus: Bus = undefined;
|
||||
|
||||
const ischeduler = IScheduler.init(&scheduler);
|
||||
const ibus = IBus.init(&bus);
|
||||
|
||||
var cpu = Arm7tdmi.init(ischeduler, ibus);
|
||||
var cpu = Arm7tdmi.init(&scheduler, &bus, log_file);
|
||||
|
||||
bus.init(allocator, &scheduler, &cpu, paths) catch |e| exitln("failed to init zba bus: {}", .{e});
|
||||
defer bus.deinit();
|
||||
|
||||
if (config.config().guest.skip_bios or result.args.skip != 0 or paths.bios == null) {
|
||||
@import("core/cpu_util.zig").fastBoot(&cpu);
|
||||
if (config.config().guest.skip_bios or result.args.skip or paths.bios == null) {
|
||||
cpu.fastBoot();
|
||||
}
|
||||
|
||||
const title_ptr = if (paths.rom != null) &bus.pak.title else null;
|
||||
|
|
@ -120,10 +96,12 @@ pub fn main() void {
|
|||
var gui = Gui.init(allocator, &bus.apu, title_ptr) catch |e| exitln("failed to init gui: {}", .{e});
|
||||
defer gui.deinit();
|
||||
|
||||
var sync = Synchro.init(allocator) catch |e| exitln("failed to allocate sync types: {}", .{e});
|
||||
defer sync.deinit(allocator);
|
||||
var quit = std.atomic.Atomic(bool).init(false);
|
||||
|
||||
if (result.args.gdb != 0) {
|
||||
var items: [0x100]u8 = undefined;
|
||||
var channel = TwoWayChannel.init(&items);
|
||||
|
||||
if (result.args.gdb) {
|
||||
const Server = @import("gdbstub").Server;
|
||||
const EmuThing = @import("core/emu.zig").EmuThing;
|
||||
|
||||
|
|
@ -133,48 +111,42 @@ pub fn main() void {
|
|||
|
||||
log.info("Ready to connect", .{});
|
||||
|
||||
var server = Server.init(
|
||||
emulator,
|
||||
.{ .memory_map = EmuThing.map, .target = EmuThing.target },
|
||||
) catch |e| exitln("failed to init gdb server: {}", .{e});
|
||||
var server = Server.init(emulator) catch |e| exitln("failed to init gdb server: {}", .{e});
|
||||
defer server.deinit(allocator);
|
||||
|
||||
log.info("Starting GDB Server Thread", .{});
|
||||
|
||||
const thread = std.Thread.spawn(.{}, Server.run, .{ &server, allocator, &sync.should_quit }) catch |e| exitln("gdb server thread crashed: {}", .{e});
|
||||
const thread = std.Thread.spawn(.{}, Server.run, .{ &server, allocator, &quit }) catch |e| exitln("gdb server thread crashed: {}", .{e});
|
||||
defer thread.join();
|
||||
|
||||
gui.run(.{
|
||||
.cpu = &cpu,
|
||||
.scheduler = &scheduler,
|
||||
.sync = &sync,
|
||||
.channel = &channel,
|
||||
}) catch |e| exitln("main thread panicked: {}", .{e});
|
||||
} else {
|
||||
var tracker = FpsTracker.init();
|
||||
|
||||
const thread = std.Thread.spawn(.{}, emu.run, .{ &cpu, &scheduler, &tracker, &sync }) catch |e| exitln("emu thread panicked: {}", .{e});
|
||||
const thread = std.Thread.spawn(.{}, emu.run, .{ &cpu, &scheduler, &tracker, &channel }) catch |e| exitln("emu thread panicked: {}", .{e});
|
||||
defer thread.join();
|
||||
|
||||
gui.run(.{
|
||||
.cpu = &cpu,
|
||||
.scheduler = &scheduler,
|
||||
.channel = &channel,
|
||||
.tracker = &tracker,
|
||||
.sync = &sync,
|
||||
}) catch |e| exitln("main thread panicked: {}", .{e});
|
||||
}
|
||||
}
|
||||
|
||||
fn handleArguments(allocator: Allocator, data_path: []const u8, result: *const clap.Result(clap.Help, ¶ms, clap.parsers.default)) !FilePaths {
|
||||
const rom_path = try romPath(allocator, result);
|
||||
errdefer if (rom_path) |path| allocator.free(path);
|
||||
const rom_path = romPath(result);
|
||||
log.info("ROM path: {?s}", .{rom_path});
|
||||
|
||||
const bios_path: ?[]const u8 = if (result.args.bios) |path| try allocator.dupe(u8, path) else null;
|
||||
errdefer if (bios_path) |path| allocator.free(path);
|
||||
const bios_path = result.args.bios;
|
||||
if (bios_path) |path| log.info("BIOS path: {s}", .{path}) else log.warn("No BIOS provided", .{});
|
||||
|
||||
const save_path = try std.fs.path.join(allocator, &[_][]const u8{ data_path, "zba", "save" });
|
||||
|
||||
log.info("ROM path: {?s}", .{rom_path});
|
||||
log.info("BIOS path: {?s}", .{bios_path});
|
||||
log.info("Save path: {s}", .{save_path});
|
||||
|
||||
return .{
|
||||
|
|
@ -197,7 +169,7 @@ fn configFilePath(allocator: Allocator, config_path: []const u8) ![]const u8 {
|
|||
const config_file = std.fs.createFileAbsolute(path, .{}) catch |err| exitln("failed to create \"{s}\": {}", .{ path, err });
|
||||
defer config_file.close();
|
||||
|
||||
try config_file.writeAll(@embedFile("example.toml"));
|
||||
try config_file.writeAll(@embedFile("../example.toml"));
|
||||
};
|
||||
|
||||
return path;
|
||||
|
|
@ -218,10 +190,10 @@ fn ensureConfigDirExists(config_path: []const u8) !void {
|
|||
try dir.makePath("zba");
|
||||
}
|
||||
|
||||
fn romPath(allocator: Allocator, result: *const clap.Result(clap.Help, ¶ms, clap.parsers.default)) !?[]const u8 {
|
||||
fn romPath(result: *const clap.Result(clap.Help, ¶ms, clap.parsers.default)) ?[]const u8 {
|
||||
return switch (result.positionals.len) {
|
||||
0 => null,
|
||||
1 => try allocator.dupe(u8, result.positionals[0]),
|
||||
1 => result.positionals[0],
|
||||
else => exitln("ZBA received too many positional arguments.", .{}),
|
||||
};
|
||||
}
|
||||
|
|
@ -230,5 +202,5 @@ fn exitln(comptime format: []const u8, args: anytype) noreturn {
|
|||
const stderr = std.io.getStdErr().writer();
|
||||
stderr.print(format, args) catch {}; // Just exit already...
|
||||
stderr.writeByte('\n') catch {};
|
||||
std.process.exit(1);
|
||||
std.os.exit(1);
|
||||
}
|
||||
|
|
|
|||
407
src/platform.zig
407
src/platform.zig
|
|
@ -8,12 +8,10 @@ const config = @import("config.zig");
|
|||
const imgui = @import("imgui.zig");
|
||||
|
||||
const Apu = @import("core/apu.zig").Apu;
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Bus = @import("core/Bus.zig");
|
||||
const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
|
||||
const Scheduler = @import("core/scheduler.zig").Scheduler;
|
||||
const FpsTracker = @import("util.zig").FpsTracker;
|
||||
const Synchro = @import("core/emu.zig").Synchro;
|
||||
const KeyInput = @import("core/bus/io.zig").KeyInput;
|
||||
const TwoWayChannel = @import("zba-util").TwoWayChannel;
|
||||
|
||||
const gba_width = @import("core/ppu.zig").width;
|
||||
const gba_height = @import("core/ppu.zig").height;
|
||||
|
|
@ -23,8 +21,8 @@ const GLsizei = gl.GLsizei;
|
|||
const SDL_GLContext = *anyopaque;
|
||||
const Allocator = std.mem.Allocator;
|
||||
|
||||
pub const Dimensions = struct { width: u32, height: u32 };
|
||||
const default_dim: Dimensions = .{ .width = 1280, .height = 720 };
|
||||
const width = 1280;
|
||||
const height = 720;
|
||||
|
||||
pub const sample_rate = 1 << 15;
|
||||
pub const sample_format = SDL.AUDIO_U16;
|
||||
|
|
@ -35,12 +33,29 @@ pub const Gui = struct {
|
|||
const Self = @This();
|
||||
const log = std.log.scoped(.Gui);
|
||||
|
||||
// zig fmt: off
|
||||
const vertices: [32]f32 = [_]f32{
|
||||
// Positions // Colours // Texture Coords
|
||||
1.0, -1.0, 0.0, 1.0, 0.0, 0.0, 1.0, 1.0, // Top Right
|
||||
1.0, 1.0, 0.0, 0.0, 1.0, 0.0, 1.0, 0.0, // Bottom Right
|
||||
-1.0, 1.0, 0.0, 0.0, 0.0, 1.0, 0.0, 0.0, // Bottom Left
|
||||
-1.0, -1.0, 0.0, 1.0, 1.0, 0.0, 0.0, 1.0, // Top Left
|
||||
};
|
||||
|
||||
const indices: [6]u32 = [_]u32{
|
||||
0, 1, 3, // First Triangle
|
||||
1, 2, 3, // Second Triangle
|
||||
};
|
||||
// zig fmt: on
|
||||
|
||||
window: *SDL.SDL_Window,
|
||||
ctx: SDL_GLContext,
|
||||
audio: Audio,
|
||||
|
||||
state: imgui.State,
|
||||
|
||||
allocator: Allocator,
|
||||
program_id: gl.GLuint,
|
||||
|
||||
pub fn init(allocator: Allocator, apu: *Apu, title_opt: ?*const [12]u8) !Self {
|
||||
if (SDL.SDL_Init(SDL.SDL_INIT_VIDEO | SDL.SDL_INIT_EVENTS | SDL.SDL_INIT_AUDIO) < 0) panic();
|
||||
|
|
@ -52,16 +67,16 @@ pub const Gui = struct {
|
|||
window_title,
|
||||
SDL.SDL_WINDOWPOS_CENTERED,
|
||||
SDL.SDL_WINDOWPOS_CENTERED,
|
||||
default_dim.width,
|
||||
default_dim.height,
|
||||
SDL.SDL_WINDOW_OPENGL | SDL.SDL_WINDOW_SHOWN | SDL.SDL_WINDOW_RESIZABLE,
|
||||
width,
|
||||
height,
|
||||
SDL.SDL_WINDOW_OPENGL | SDL.SDL_WINDOW_SHOWN,
|
||||
) orelse panic();
|
||||
|
||||
const ctx = SDL.SDL_GL_CreateContext(window) orelse panic();
|
||||
if (SDL.SDL_GL_MakeCurrent(window, ctx) < 0) panic();
|
||||
|
||||
gl.load(ctx, Self.glGetProcAddress) catch {};
|
||||
if (SDL.SDL_GL_SetSwapInterval(@intFromBool(config.config().host.vsync)) < 0) panic();
|
||||
if (SDL.SDL_GL_SetSwapInterval(@boolToInt(config.config().host.vsync)) < 0) panic();
|
||||
|
||||
zgui.init(allocator);
|
||||
zgui.plot.init();
|
||||
|
|
@ -72,6 +87,7 @@ pub const Gui = struct {
|
|||
return Self{
|
||||
.window = window,
|
||||
.ctx = ctx,
|
||||
.program_id = try compileShaders(),
|
||||
.audio = Audio.init(apu),
|
||||
|
||||
.allocator = allocator,
|
||||
|
|
@ -87,6 +103,7 @@ pub const Gui = struct {
|
|||
zgui.plot.deinit();
|
||||
zgui.deinit();
|
||||
|
||||
gl.deleteProgram(self.program_id);
|
||||
SDL.SDL_GL_DeleteContext(self.ctx);
|
||||
SDL.SDL_DestroyWindow(self.window);
|
||||
SDL.SDL_Quit();
|
||||
|
|
@ -94,8 +111,139 @@ pub const Gui = struct {
|
|||
self.* = undefined;
|
||||
}
|
||||
|
||||
fn drawGbaTexture(self: *const Self, obj_ids: struct { GLuint, GLuint, GLuint }, tex_id: GLuint, buf: []const u8) void {
|
||||
gl.bindTexture(gl.TEXTURE_2D, tex_id);
|
||||
defer gl.bindTexture(gl.TEXTURE_2D, 0);
|
||||
|
||||
gl.texSubImage2D(gl.TEXTURE_2D, 0, 0, 0, gba_width, gba_height, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, buf.ptr);
|
||||
|
||||
// Bind VAO, EBO. VBO not bound
|
||||
gl.bindVertexArray(obj_ids[0]); // VAO
|
||||
defer gl.bindVertexArray(0);
|
||||
|
||||
gl.bindBuffer(gl.ELEMENT_ARRAY_BUFFER, obj_ids[2]); // EBO
|
||||
defer gl.bindBuffer(gl.ELEMENT_ARRAY_BUFFER, 0);
|
||||
|
||||
// Use compiled frag + vertex shader
|
||||
gl.useProgram(self.program_id);
|
||||
defer gl.useProgram(0);
|
||||
|
||||
gl.drawElements(gl.TRIANGLES, 6, gl.UNSIGNED_INT, null);
|
||||
}
|
||||
|
||||
fn compileShaders() !GLuint {
|
||||
const vert_shader = @embedFile("shader/pixelbuf.vert");
|
||||
const frag_shader = @embedFile("shader/pixelbuf.frag");
|
||||
|
||||
const vs = gl.createShader(gl.VERTEX_SHADER);
|
||||
defer gl.deleteShader(vs);
|
||||
|
||||
gl.shaderSource(vs, 1, &[_][*c]const u8{vert_shader}, 0);
|
||||
gl.compileShader(vs);
|
||||
|
||||
if (!shader.didCompile(vs)) return error.VertexCompileError;
|
||||
|
||||
const fs = gl.createShader(gl.FRAGMENT_SHADER);
|
||||
defer gl.deleteShader(fs);
|
||||
|
||||
gl.shaderSource(fs, 1, &[_][*c]const u8{frag_shader}, 0);
|
||||
gl.compileShader(fs);
|
||||
|
||||
if (!shader.didCompile(fs)) return error.FragmentCompileError;
|
||||
|
||||
const program = gl.createProgram();
|
||||
gl.attachShader(program, vs);
|
||||
gl.attachShader(program, fs);
|
||||
gl.linkProgram(program);
|
||||
|
||||
return program;
|
||||
}
|
||||
|
||||
// Returns the VAO ID since it's used in run()
|
||||
fn genBufferObjects() struct { GLuint, GLuint, GLuint } {
|
||||
var vao_id: GLuint = undefined;
|
||||
var vbo_id: GLuint = undefined;
|
||||
var ebo_id: GLuint = undefined;
|
||||
|
||||
gl.genVertexArrays(1, &vao_id);
|
||||
gl.genBuffers(1, &vbo_id);
|
||||
gl.genBuffers(1, &ebo_id);
|
||||
|
||||
gl.bindVertexArray(vao_id);
|
||||
defer gl.bindVertexArray(0);
|
||||
|
||||
gl.bindBuffer(gl.ARRAY_BUFFER, vbo_id);
|
||||
defer gl.bindBuffer(gl.ARRAY_BUFFER, 0);
|
||||
|
||||
gl.bindBuffer(gl.ELEMENT_ARRAY_BUFFER, ebo_id);
|
||||
defer gl.bindBuffer(gl.ELEMENT_ARRAY_BUFFER, 0);
|
||||
|
||||
gl.bufferData(gl.ARRAY_BUFFER, @sizeOf(@TypeOf(vertices)), &vertices, gl.STATIC_DRAW);
|
||||
gl.bufferData(gl.ELEMENT_ARRAY_BUFFER, @sizeOf(@TypeOf(indices)), &indices, gl.STATIC_DRAW);
|
||||
|
||||
// Position
|
||||
gl.vertexAttribPointer(0, 3, gl.FLOAT, gl.FALSE, 8 * @sizeOf(f32), null); // lmao
|
||||
gl.enableVertexAttribArray(0);
|
||||
// Colour
|
||||
gl.vertexAttribPointer(1, 3, gl.FLOAT, gl.FALSE, 8 * @sizeOf(f32), @intToPtr(?*anyopaque, (3 * @sizeOf(f32))));
|
||||
gl.enableVertexAttribArray(1);
|
||||
// Texture Coord
|
||||
gl.vertexAttribPointer(2, 2, gl.FLOAT, gl.FALSE, 8 * @sizeOf(f32), @intToPtr(?*anyopaque, (6 * @sizeOf(f32))));
|
||||
gl.enableVertexAttribArray(2);
|
||||
|
||||
return .{ vao_id, vbo_id, ebo_id };
|
||||
}
|
||||
|
||||
fn genGbaTexture(buf: []const u8) GLuint {
|
||||
var tex_id: GLuint = undefined;
|
||||
gl.genTextures(1, &tex_id);
|
||||
|
||||
gl.bindTexture(gl.TEXTURE_2D, tex_id);
|
||||
defer gl.bindTexture(gl.TEXTURE_2D, 0);
|
||||
|
||||
gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MIN_FILTER, gl.NEAREST);
|
||||
gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MAG_FILTER, gl.NEAREST);
|
||||
|
||||
gl.texImage2D(gl.TEXTURE_2D, 0, gl.RGBA, gba_width, gba_height, 0, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, buf.ptr);
|
||||
|
||||
return tex_id;
|
||||
}
|
||||
|
||||
fn genOutTexture() GLuint {
|
||||
var tex_id: GLuint = undefined;
|
||||
gl.genTextures(1, &tex_id);
|
||||
|
||||
gl.bindTexture(gl.TEXTURE_2D, tex_id);
|
||||
defer gl.bindTexture(gl.TEXTURE_2D, 0);
|
||||
|
||||
gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MIN_FILTER, gl.NEAREST);
|
||||
gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MAG_FILTER, gl.NEAREST);
|
||||
|
||||
gl.texImage2D(gl.TEXTURE_2D, 0, gl.RGBA, gba_width, gba_height, 0, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, null);
|
||||
|
||||
return tex_id;
|
||||
}
|
||||
|
||||
fn genFrameBufObject(tex_id: c_uint) !GLuint {
|
||||
var fbo_id: GLuint = undefined;
|
||||
gl.genFramebuffers(1, &fbo_id);
|
||||
|
||||
gl.bindFramebuffer(gl.FRAMEBUFFER, fbo_id);
|
||||
defer gl.bindFramebuffer(gl.FRAMEBUFFER, 0);
|
||||
|
||||
gl.framebufferTexture(gl.FRAMEBUFFER, gl.COLOR_ATTACHMENT0, tex_id, 0);
|
||||
|
||||
const draw_buffers: [1]GLuint = .{gl.COLOR_ATTACHMENT0};
|
||||
gl.drawBuffers(1, &draw_buffers);
|
||||
|
||||
if (gl.checkFramebufferStatus(gl.FRAMEBUFFER) != gl.FRAMEBUFFER_COMPLETE)
|
||||
return error.FrameBufferObejctInitFailed;
|
||||
|
||||
return fbo_id;
|
||||
}
|
||||
|
||||
const RunOptions = struct {
|
||||
sync: *Synchro,
|
||||
channel: *TwoWayChannel,
|
||||
tracker: ?*FpsTracker = null,
|
||||
cpu: *Arm7tdmi,
|
||||
scheduler: *Scheduler,
|
||||
|
|
@ -104,29 +252,29 @@ pub const Gui = struct {
|
|||
pub fn run(self: *Self, opt: RunOptions) !void {
|
||||
const cpu = opt.cpu;
|
||||
const tracker = opt.tracker;
|
||||
const sync = opt.sync;
|
||||
const channel = opt.channel;
|
||||
|
||||
const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
|
||||
const obj_ids = Self.genBufferObjects();
|
||||
defer gl.deleteBuffers(3, @as(*const [3]c_uint, &obj_ids));
|
||||
|
||||
const vao_id = opengl_impl.vao();
|
||||
defer gl.deleteVertexArrays(1, &[_]GLuint{vao_id});
|
||||
const emu_tex = Self.genGbaTexture(cpu.bus.ppu.framebuf.get(.Renderer));
|
||||
const out_tex = Self.genOutTexture();
|
||||
defer gl.deleteTextures(2, &[_]c_uint{ emu_tex, out_tex });
|
||||
|
||||
const emu_tex = opengl_impl.screenTex(bus_ptr.ppu.framebuf.get(.Renderer));
|
||||
const out_tex = opengl_impl.outTex();
|
||||
defer gl.deleteTextures(2, &[_]GLuint{ emu_tex, out_tex });
|
||||
|
||||
const fbo_id = try opengl_impl.frameBuffer(out_tex);
|
||||
const fbo_id = try Self.genFrameBufObject(out_tex);
|
||||
defer gl.deleteFramebuffers(1, &fbo_id);
|
||||
|
||||
const prog_id = try opengl_impl.program(); // Dynamic Shaders?
|
||||
defer gl.deleteProgram(prog_id);
|
||||
|
||||
var win_dim: Dimensions = default_dim;
|
||||
|
||||
emu_loop: while (true) {
|
||||
// `quit` from RunOptions may be modified by the GDBSTUB thread,
|
||||
// so we want to recognize that it may change to `true` and exit the GUI thread
|
||||
if (channel.gui.pop()) |event| switch (event) {
|
||||
.Quit => break :emu_loop,
|
||||
.Paused => @panic("TODO: We want to peek (and then pop if it's .Quit), not always pop"),
|
||||
};
|
||||
|
||||
// Outside of `SDL.SDL_QUIT` below, the DearImgui UI might signal that the program
|
||||
// should exit, in which case we should also handle this
|
||||
if (self.state.should_quit or sync.should_quit.load(.monotonic)) break :emu_loop;
|
||||
if (self.state.should_quit) break :emu_loop;
|
||||
|
||||
var event: SDL.SDL_Event = undefined;
|
||||
while (SDL.SDL_PollEvent(&event) != 0) {
|
||||
|
|
@ -135,30 +283,28 @@ pub const Gui = struct {
|
|||
switch (event.type) {
|
||||
SDL.SDL_QUIT => break :emu_loop,
|
||||
SDL.SDL_KEYDOWN => {
|
||||
// TODO: Make use of compare_and_xor?
|
||||
const key_code = event.key.keysym.sym;
|
||||
var keyinput: KeyInput = .{ .raw = 0x0000 };
|
||||
var keyinput = cpu.bus.io.keyinput.load(.Monotonic);
|
||||
|
||||
switch (key_code) {
|
||||
SDL.SDLK_UP => keyinput.up.set(),
|
||||
SDL.SDLK_DOWN => keyinput.down.set(),
|
||||
SDL.SDLK_LEFT => keyinput.left.set(),
|
||||
SDL.SDLK_RIGHT => keyinput.right.set(),
|
||||
SDL.SDLK_x => keyinput.a.set(),
|
||||
SDL.SDLK_z => keyinput.b.set(),
|
||||
SDL.SDLK_a => keyinput.shoulder_l.set(),
|
||||
SDL.SDLK_s => keyinput.shoulder_r.set(),
|
||||
SDL.SDLK_RETURN => keyinput.start.set(),
|
||||
SDL.SDLK_RSHIFT => keyinput.select.set(),
|
||||
SDL.SDLK_UP => keyinput.up.unset(),
|
||||
SDL.SDLK_DOWN => keyinput.down.unset(),
|
||||
SDL.SDLK_LEFT => keyinput.left.unset(),
|
||||
SDL.SDLK_RIGHT => keyinput.right.unset(),
|
||||
SDL.SDLK_x => keyinput.a.unset(),
|
||||
SDL.SDLK_z => keyinput.b.unset(),
|
||||
SDL.SDLK_a => keyinput.shoulder_l.unset(),
|
||||
SDL.SDLK_s => keyinput.shoulder_r.unset(),
|
||||
SDL.SDLK_RETURN => keyinput.start.unset(),
|
||||
SDL.SDLK_RSHIFT => keyinput.select.unset(),
|
||||
else => {},
|
||||
}
|
||||
|
||||
bus_ptr.io.keyinput.fetchAnd(~keyinput.raw, .monotonic);
|
||||
cpu.bus.io.keyinput.store(keyinput.raw, .Monotonic);
|
||||
},
|
||||
SDL.SDL_KEYUP => {
|
||||
// TODO: Make use of compare_and_xor?
|
||||
const key_code = event.key.keysym.sym;
|
||||
var keyinput: KeyInput = .{ .raw = 0x0000 };
|
||||
var keyinput = cpu.bus.io.keyinput.load(.Monotonic);
|
||||
|
||||
switch (key_code) {
|
||||
SDL.SDLK_UP => keyinput.up.set(),
|
||||
|
|
@ -174,39 +320,22 @@ pub const Gui = struct {
|
|||
else => {},
|
||||
}
|
||||
|
||||
bus_ptr.io.keyinput.fetchOr(keyinput.raw, .monotonic);
|
||||
},
|
||||
SDL.SDL_WINDOWEVENT => {
|
||||
if (event.window.event == SDL.SDL_WINDOWEVENT_RESIZED) {
|
||||
log.debug("window resized to: {}x{}", .{ event.window.data1, event.window.data2 });
|
||||
|
||||
win_dim.width = @intCast(event.window.data1);
|
||||
win_dim.height = @intCast(event.window.data2);
|
||||
}
|
||||
cpu.bus.io.keyinput.store(keyinput.raw, .Monotonic);
|
||||
},
|
||||
else => {},
|
||||
}
|
||||
}
|
||||
|
||||
var zgui_redraw: bool = false;
|
||||
{
|
||||
channel.emu.push(.Pause);
|
||||
defer channel.emu.push(.Resume);
|
||||
|
||||
switch (self.state.emulation) {
|
||||
.Transition => |inner| switch (inner) {
|
||||
.Active => {
|
||||
sync.paused.store(false, .monotonic);
|
||||
if (!config.config().host.mute) SDL.SDL_PauseAudioDevice(self.audio.device, 0);
|
||||
// Spin Loop until we know that the emu is paused
|
||||
wait: while (true) switch (channel.gui.pop() orelse continue) {
|
||||
.Paused => break :wait,
|
||||
else => |any| std.debug.panic("[Gui/Channel]: Unhandled Event: {}", .{any}),
|
||||
};
|
||||
|
||||
self.state.emulation = .Active;
|
||||
},
|
||||
.Inactive => {
|
||||
// Assert that double pausing is impossible
|
||||
SDL.SDL_PauseAudioDevice(self.audio.device, 1);
|
||||
sync.paused.store(true, .monotonic);
|
||||
|
||||
self.state.emulation = .Inactive;
|
||||
},
|
||||
},
|
||||
.Active => {
|
||||
// Add FPS count to the histogram
|
||||
if (tracker) |t| self.state.fps_hist.push(t.value()) catch {};
|
||||
|
||||
|
|
@ -215,35 +344,26 @@ pub const Gui = struct {
|
|||
gl.bindFramebuffer(gl.FRAMEBUFFER, fbo_id);
|
||||
defer gl.bindFramebuffer(gl.FRAMEBUFFER, 0);
|
||||
|
||||
const buf = cpu.bus.ppu.framebuf.get(.Renderer);
|
||||
gl.viewport(0, 0, gba_width, gba_height);
|
||||
opengl_impl.drawScreen(emu_tex, prog_id, vao_id, bus_ptr.ppu.framebuf.get(.Renderer));
|
||||
self.drawGbaTexture(obj_ids, emu_tex, buf);
|
||||
}
|
||||
|
||||
// FIXME: We only really care about locking the audio device (and therefore writing silence)
|
||||
// since if nfd-zig is used the emu may be paused for way too long. Perhaps we should try and limit
|
||||
// spurious calls to SDL_LockAudioDevice?
|
||||
SDL.SDL_LockAudioDevice(self.audio.device);
|
||||
defer SDL.SDL_UnlockAudioDevice(self.audio.device);
|
||||
|
||||
zgui_redraw = imgui.draw(&self.state, sync, win_dim, cpu, out_tex);
|
||||
},
|
||||
.Inactive => zgui_redraw = imgui.draw(&self.state, sync, win_dim, cpu, out_tex),
|
||||
}
|
||||
|
||||
if (zgui_redraw) {
|
||||
// Background Colour
|
||||
const size = zgui.io.getDisplaySize();
|
||||
gl.viewport(0, 0, @intFromFloat(size[0]), @intFromFloat(size[1]));
|
||||
gl.viewport(0, 0, @floatToInt(c_int, size[0]), @floatToInt(c_int, size[1]));
|
||||
gl.clearColor(0, 0, 0, 1.0);
|
||||
gl.clear(gl.COLOR_BUFFER_BIT);
|
||||
|
||||
zgui.backend.newFrame(width, height);
|
||||
imgui.draw(&self.state, out_tex, cpu);
|
||||
zgui.backend.draw();
|
||||
}
|
||||
|
||||
SDL.SDL_GL_SwapWindow(self.window);
|
||||
}
|
||||
|
||||
sync.should_quit.store(true, .monotonic);
|
||||
channel.emu.push(.Quit);
|
||||
}
|
||||
|
||||
fn glGetProcAddress(ctx: SDL.SDL_GLContext, proc: [:0]const u8) ?*anyopaque {
|
||||
|
|
@ -274,6 +394,11 @@ const Audio = struct {
|
|||
const device = SDL.SDL_OpenAudioDevice(null, 0, &want, &have, 0);
|
||||
if (device == 0) panic();
|
||||
|
||||
if (!config.config().host.mute) {
|
||||
SDL.SDL_PauseAudioDevice(device, 0); // Unpause Audio
|
||||
log.info("Unpaused Device", .{});
|
||||
}
|
||||
|
||||
return .{ .device = device };
|
||||
}
|
||||
|
||||
|
|
@ -283,118 +408,16 @@ const Audio = struct {
|
|||
}
|
||||
|
||||
export fn callback(userdata: ?*anyopaque, stream: [*c]u8, len: c_int) void {
|
||||
const apu: *Apu = @ptrCast(@alignCast(userdata));
|
||||
const T = *Apu;
|
||||
const apu = @ptrCast(T, @alignCast(@alignOf(T), userdata));
|
||||
|
||||
_ = SDL.SDL_AudioStreamGet(apu.stream, stream, len);
|
||||
}
|
||||
};
|
||||
|
||||
fn panic() noreturn {
|
||||
const str = @as(?[*:0]const u8, SDL.SDL_GetError()) orelse "unknown error";
|
||||
@panic(std.mem.sliceTo(str, 0));
|
||||
}
|
||||
|
||||
const opengl_impl = struct {
|
||||
fn drawScreen(tex_id: GLuint, prog_id: GLuint, vao_id: GLuint, buf: []const u8) void {
|
||||
gl.bindTexture(gl.TEXTURE_2D, tex_id);
|
||||
defer gl.bindTexture(gl.TEXTURE_2D, 0);
|
||||
|
||||
gl.texSubImage2D(gl.TEXTURE_2D, 0, 0, 0, gba_width, gba_height, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, buf.ptr);
|
||||
|
||||
// Bind VAO
|
||||
gl.bindVertexArray(vao_id);
|
||||
defer gl.bindVertexArray(0);
|
||||
|
||||
// Use compiled frag + vertex shader
|
||||
gl.useProgram(prog_id);
|
||||
defer gl.useProgram(0);
|
||||
|
||||
gl.drawArrays(gl.TRIANGLE_STRIP, 0, 3);
|
||||
}
|
||||
|
||||
fn program() !GLuint {
|
||||
const vert_shader = @embedFile("shader/pixelbuf.vert");
|
||||
const frag_shader = @embedFile("shader/pixelbuf.frag");
|
||||
|
||||
const vs = gl.createShader(gl.VERTEX_SHADER);
|
||||
defer gl.deleteShader(vs);
|
||||
|
||||
gl.shaderSource(vs, 1, &[_][*c]const u8{vert_shader}, 0);
|
||||
gl.compileShader(vs);
|
||||
|
||||
if (!shader.didCompile(vs)) return error.VertexCompileError;
|
||||
|
||||
const fs = gl.createShader(gl.FRAGMENT_SHADER);
|
||||
defer gl.deleteShader(fs);
|
||||
|
||||
gl.shaderSource(fs, 1, &[_][*c]const u8{frag_shader}, 0);
|
||||
gl.compileShader(fs);
|
||||
|
||||
if (!shader.didCompile(fs)) return error.FragmentCompileError;
|
||||
|
||||
const prog = gl.createProgram();
|
||||
gl.attachShader(prog, vs);
|
||||
gl.attachShader(prog, fs);
|
||||
gl.linkProgram(prog);
|
||||
|
||||
return prog;
|
||||
}
|
||||
|
||||
fn vao() GLuint {
|
||||
var vao_id: GLuint = undefined;
|
||||
gl.genVertexArrays(1, &vao_id);
|
||||
|
||||
return vao_id;
|
||||
}
|
||||
|
||||
fn screenTex(buf: []const u8) GLuint {
|
||||
var tex_id: GLuint = undefined;
|
||||
gl.genTextures(1, &tex_id);
|
||||
|
||||
gl.bindTexture(gl.TEXTURE_2D, tex_id);
|
||||
defer gl.bindTexture(gl.TEXTURE_2D, 0);
|
||||
|
||||
gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MIN_FILTER, gl.NEAREST);
|
||||
gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MAG_FILTER, gl.NEAREST);
|
||||
|
||||
gl.texImage2D(gl.TEXTURE_2D, 0, gl.RGBA, gba_width, gba_height, 0, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, buf.ptr);
|
||||
|
||||
return tex_id;
|
||||
}
|
||||
|
||||
fn outTex() GLuint {
|
||||
var tex_id: GLuint = undefined;
|
||||
gl.genTextures(1, &tex_id);
|
||||
|
||||
gl.bindTexture(gl.TEXTURE_2D, tex_id);
|
||||
defer gl.bindTexture(gl.TEXTURE_2D, 0);
|
||||
|
||||
gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MIN_FILTER, gl.NEAREST);
|
||||
gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MAG_FILTER, gl.NEAREST);
|
||||
|
||||
gl.texImage2D(gl.TEXTURE_2D, 0, gl.RGBA, gba_width, gba_height, 0, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, null);
|
||||
|
||||
return tex_id;
|
||||
}
|
||||
|
||||
fn frameBuffer(tex_id: GLuint) !GLuint {
|
||||
var fbo_id: GLuint = undefined;
|
||||
gl.genFramebuffers(1, &fbo_id);
|
||||
|
||||
gl.bindFramebuffer(gl.FRAMEBUFFER, fbo_id);
|
||||
defer gl.bindFramebuffer(gl.FRAMEBUFFER, 0);
|
||||
|
||||
gl.framebufferTexture(gl.FRAMEBUFFER, gl.COLOR_ATTACHMENT0, tex_id, 0);
|
||||
gl.drawBuffers(1, &@as(GLuint, gl.COLOR_ATTACHMENT0));
|
||||
|
||||
if (gl.checkFramebufferStatus(gl.FRAMEBUFFER) != gl.FRAMEBUFFER_COMPLETE)
|
||||
return error.FrameBufferObejctInitFailed;
|
||||
|
||||
return fbo_id;
|
||||
}
|
||||
|
||||
const shader = struct {
|
||||
const log = std.log.scoped(.shader);
|
||||
const shader = struct {
|
||||
const Kind = enum { vertex, fragment };
|
||||
const log = std.log.scoped(.Shader);
|
||||
|
||||
fn didCompile(id: gl.GLuint) bool {
|
||||
var success: gl.GLint = undefined;
|
||||
|
|
@ -412,5 +435,9 @@ const opengl_impl = struct {
|
|||
gl.getShaderInfoLog(id, buf_len, 0, &error_msg);
|
||||
log.err("{s}", .{std.mem.sliceTo(&error_msg, 0)});
|
||||
}
|
||||
};
|
||||
};
|
||||
|
||||
fn panic() noreturn {
|
||||
const str = @as(?[*:0]const u8, SDL.SDL_GetError()) orelse "unknown error";
|
||||
@panic(std.mem.sliceTo(str, 0));
|
||||
}
|
||||
|
|
|
|||
|
|
@ -1,6 +1,7 @@
|
|||
#version 330 core
|
||||
out vec4 frag_color;
|
||||
|
||||
in vec3 color;
|
||||
in vec2 uv;
|
||||
|
||||
uniform sampler2D screen;
|
||||
|
|
|
|||
|
|
@ -1,10 +1,13 @@
|
|||
#version 330 core
|
||||
layout (location = 0) in vec3 pos;
|
||||
layout (location = 1) in vec3 in_color;
|
||||
layout (location = 2) in vec2 in_uv;
|
||||
|
||||
out vec3 color;
|
||||
out vec2 uv;
|
||||
|
||||
const vec2 pos[3] = vec2[3](vec2(-1.0f, -1.0f), vec2(-1.0f, 3.0f), vec2(3.0f, -1.0f));
|
||||
const vec2 uvs[3] = vec2[3](vec2( 0.0f, 0.0f), vec2( 0.0f, 2.0f), vec2(2.0f, 0.0f));
|
||||
|
||||
void main() {
|
||||
uv = uvs[gl_VertexID];
|
||||
gl_Position = vec4(pos[gl_VertexID], 0.0, 1.0);
|
||||
color = in_color;
|
||||
uv = in_uv;
|
||||
gl_Position = vec4(pos, 1.0);
|
||||
}
|
||||
56
src/util.zig
56
src/util.zig
|
|
@ -3,7 +3,7 @@ const builtin = @import("builtin");
|
|||
const config = @import("config.zig");
|
||||
|
||||
const Log2Int = std.math.Log2Int;
|
||||
const Arm7tdmi = @import("arm32").Arm7tdmi;
|
||||
const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
|
||||
|
||||
const Allocator = std.mem.Allocator;
|
||||
|
||||
|
|
@ -11,24 +11,24 @@ pub const FpsTracker = struct {
|
|||
const Self = @This();
|
||||
|
||||
fps: u32,
|
||||
count: std.atomic.Value(u32),
|
||||
count: std.atomic.Atomic(u32),
|
||||
timer: std.time.Timer,
|
||||
|
||||
pub fn init() Self {
|
||||
return .{
|
||||
.fps = 0,
|
||||
.count = std.atomic.Value(u32).init(0),
|
||||
.count = std.atomic.Atomic(u32).init(0),
|
||||
.timer = std.time.Timer.start() catch unreachable,
|
||||
};
|
||||
}
|
||||
|
||||
pub fn tick(self: *Self) void {
|
||||
_ = self.count.fetchAdd(1, .monotonic);
|
||||
_ = self.count.fetchAdd(1, .Monotonic);
|
||||
}
|
||||
|
||||
pub fn value(self: *Self) u32 {
|
||||
if (self.timer.read() >= std.time.ns_per_s) {
|
||||
self.fps = self.count.swap(0, .monotonic);
|
||||
self.fps = self.count.swap(0, .Monotonic);
|
||||
self.timer.reset();
|
||||
}
|
||||
|
||||
|
|
@ -52,13 +52,7 @@ pub fn escape(title: [12]u8) [12]u8 {
|
|||
pub const FilePaths = struct {
|
||||
rom: ?[]const u8,
|
||||
bios: ?[]const u8,
|
||||
save: []const u8,
|
||||
|
||||
pub fn deinit(self: @This(), allocator: Allocator) void {
|
||||
if (self.rom) |path| allocator.free(path);
|
||||
if (self.bios) |path| allocator.free(path);
|
||||
allocator.free(self.save);
|
||||
}
|
||||
save: ?[]const u8,
|
||||
};
|
||||
|
||||
pub const io = struct {
|
||||
|
|
@ -209,7 +203,7 @@ pub const audio = struct {
|
|||
|
||||
/// Sets a quarter (8) of the bits of the u32 `left` to the value of u8 `right`
|
||||
pub inline fn setQuart(left: u32, addr: u8, right: u8) u32 {
|
||||
const offset: u2 = @truncate(addr);
|
||||
const offset = @truncate(u2, addr);
|
||||
|
||||
return switch (offset) {
|
||||
0b00 => (left & 0xFFFF_FF00) | right,
|
||||
|
|
@ -223,11 +217,11 @@ pub inline fn setQuart(left: u32, addr: u8, right: u8) u32 {
|
|||
///
|
||||
/// TODO: Support u16 reads of u32 values?
|
||||
pub inline fn getHalf(byte: u8) u4 {
|
||||
return @as(u4, @truncate(byte & 1)) << 3;
|
||||
return @truncate(u4, byte & 1) << 3;
|
||||
}
|
||||
|
||||
pub inline fn setHalf(comptime T: type, left: T, addr: u8, right: HalfInt(T)) T {
|
||||
const offset: u1 = @truncate(addr >> if (T == u32) 1 else 0);
|
||||
const offset = @truncate(u1, addr >> if (T == u32) 1 else 0);
|
||||
|
||||
return switch (T) {
|
||||
u32 => switch (offset) {
|
||||
|
|
@ -266,7 +260,7 @@ pub const FrameBuffer = struct {
|
|||
|
||||
pub fn init(allocator: Allocator, comptime len: comptime_int) !Self {
|
||||
const buf = try allocator.alloc(u8, len * 2);
|
||||
@memset(buf, 0);
|
||||
std.mem.set(u8, buf, 0);
|
||||
|
||||
return .{
|
||||
// Front and Back Framebuffers
|
||||
|
|
@ -278,7 +272,7 @@ pub const FrameBuffer = struct {
|
|||
}
|
||||
|
||||
pub fn reset(self: *Self) void {
|
||||
@memset(self.buf, 0);
|
||||
std.mem.set(u8, self.buf, 0);
|
||||
self.current = 0;
|
||||
}
|
||||
|
||||
|
|
@ -295,31 +289,3 @@ pub const FrameBuffer = struct {
|
|||
return self.layers[if (dev == .Emulator) self.current else ~self.current];
|
||||
}
|
||||
};
|
||||
|
||||
const RingBuffer = @import("zba-util").RingBuffer;
|
||||
|
||||
// TODO: Lock Free Queue?
|
||||
pub fn Queue(comptime T: type) type {
|
||||
return struct {
|
||||
inner: RingBuffer(T),
|
||||
mtx: std.Thread.Mutex = .{},
|
||||
|
||||
pub fn init(buf: []T) @This() {
|
||||
return .{ .inner = RingBuffer(T).init(buf) };
|
||||
}
|
||||
|
||||
pub fn push(self: *@This(), value: T) !void {
|
||||
self.mtx.lock();
|
||||
defer self.mtx.unlock();
|
||||
|
||||
try self.inner.push(value);
|
||||
}
|
||||
|
||||
pub fn pop(self: *@This()) ?T {
|
||||
self.mtx.lock();
|
||||
defer self.mtx.unlock();
|
||||
|
||||
return self.inner.pop();
|
||||
}
|
||||
};
|
||||
}
|
||||
|
|
|
|||
Loading…
Reference in New Issue