fix: remove undefined

feat: pass thumb.gba
fix: don't fake the pipeline in swi
2022-07-12 19:29:10 -03:00 · 2022-07-12 19:29:10 -03:00 · 2022-07-12 19:29:10 -03:00 · 2022-07-12 19:29:10 -03:00 · 2022-07-12 19:29:10 -03:00 · 2022-07-12 19:29:10 -03:00
80 changed files with 7288 additions and 13474 deletions
--- a/.github/workflows/main.yml
+++ b/.github/workflows/main.yml
@@ -1,59 +0,0 @@
-name: Nightly
-
-on:
-  push:
-    paths:
-      - "**.zig"
-      - "dl_sdl2.ps1"
-    branches:
-      - main
-  schedule:
-    - cron: '0 0 * * *'
-  workflow_dispatch:
-
-jobs:
-  build:
-    strategy:
-      matrix:
-        os: [ubuntu-latest, windows-latest] # TODO: Figure out Apple Silicon macOS
-    runs-on: ${{matrix.os}}
-    steps:
-      - uses: goto-bus-stop/setup-zig@v2
-        with:
-          version: 0.13.0
-      - run: |
-            git config --global core.autocrlf false
-      - uses: actions/checkout@v3
-        with:
-          submodules: recursive
-      - name: prepare-linux
-        if: runner.os == 'Linux'
-        run: |
-            sudo apt update
-            sudo apt install libgtk-3-dev libsdl2-dev
-      - name: prepare-windows
-        if: runner.os == 'Windows'
-        run: |
-            .\dl_sdl2.ps1
-      - name: prepare-macos
-        if: runner.os == 'macOS'
-        run: |
-            brew install sdl2
-      - name: build 
-        run: zig build -Doptimize=ReleaseSafe -Dcpu=baseline
-      - name: upload
-        uses: actions/upload-artifact@v3
-        with:
-          name: zba-${{matrix.os}}
-          path: zig-out
-
-  lint:
-    runs-on: ubuntu-latest
-    steps: 
-      - uses: actions/checkout@v3
-        with:
-          submodules: recursive
-      - uses: goto-bus-stop/setup-zig@v2
-        with:
-          version: 0.13.0
-      - run: zig fmt --check {src,lib}/**/*.zig build.zig build.zig.zon
--- a/.gitignore
+++ b/.gitignore
@@ -1,8 +1,7 @@
 /.vscode
 /bin
-**/zig-cache
-**/.zig-cache
-**/zig-out
+/zig-cache
+/zig-out
 /docs
 **/*.log
 **/*.bin
@@ -13,7 +12,3 @@

 # Any Custom Scripts for Debugging purposes
 *.sh
-
-
-# Dear ImGui
-**/imgui.ini
--- a/.gitmodules
+++ b/.gitmodules
@@ -1,3 +1,9 @@
 [submodule "lib/SDL.zig"]
 	path = lib/SDL.zig
-	url = https://github.com/paoda/SDL.zig
+	url = https://github.com/MasterQ32/SDL.zig
+[submodule "lib/zig-clap"]
+	path = lib/zig-clap
+	url = https://github.com/Hejsil/zig-clap
+[submodule "lib/known-folders"]
+	path = lib/known-folders
+	url = https://github.com/ziglibs/known-folders
--- a/.vscode/extensions.json
+++ b/.vscode/extensions.json
@@ -0,0 +1,8 @@
+{
+    "recommendations": [
+        "augusterame.zls-vscode",
+        "usernamehw.errorlens",
+        "vadimcn.vscode-lldb",
+        "dan-c-underwood.arm"
+    ]
+}
--- a/README.md
+++ b/README.md
@@ -1,96 +1,70 @@
 # ZBA (working title)
+An in-progress Gameboy Advance Emulator written in Zig ⚡!

-A Game Boy Advance Emulator written in Zig ⚡!
+## Tests 
+- [ ] [jsmolka's GBA Test Collection](https://github.com/jsmolka/gba-tests)
+    - [x] `arm.gba` and `thumb.gba`
+    - [x] `flash64.gba`, `flash128.gba`, `none.gba`, and `sram.gba`
+    - [x] `hello.gba`, `shades.gba`, and `stripes.gba`
+    - [x] `memory.gba`
+    - [x] `bios.gba`
+    - [ ] `nes.gba`
+- [ ] [DenSinH's GBA ROMs](https://github.com/DenSinH/GBARoms)
+    - [x] `eeprom-test`
+    - [x] `flash-test`
+    - [x] `midikey2freq`
+    - [ ] `swi-tests-random`
+- [ ] [destoer's GBA Tests](https://github.com/destoer/gba_tests)
+    - [x] `cond_invalid.gba`
+    - [x] `dma_priority.gba`
+    - [x] `hello_world.gba`
+    - [x] `if_ack.gba`
+    - [ ] `line_timing.gba`
+    - [ ] `lyc_midline.gba`
+    - [ ] `window_midframe.gba`
+- [x] [ladystarbreeze's GBA Test Collection](https://github.com/ladystarbreeze/GBA-Test-Collection)
+    - [x] `retAddr.gba`
+    - [x] `helloWorld.gba`
+    - [x] `helloAudio.gba`
+- [x] [`armwrestler-gba-fixed.gba`](https://github.com/destoer/armwrestler-gba-fixed)
+- [x] [FuzzARM](https://github.com/DenSinH/FuzzARM)

-![ZBA running リズム天国](assets/screenshot.png)
-
-## Scope
-
-I'm hardly the first to write a Game Boy Advance Emulator nor will I be the last. This project isn't going to compete with the GOATs like [mGBA](https://github.com/mgba-emu) or [NanoBoyAdvance](https://github.com/nba-emu/NanoBoyAdvance). There aren't any interesting ideas either like in [DSHBA](https://github.com/DenSinH/DSHBA).
-
-This is a simple (read: incomplete) for-fun long-term project. I hope to get "mostly there", which to me means that I'm not missing any major hardware features and the set of possible improvements would be in memory timing or in UI/UX. With respect to that goal, here's what's outstanding:
-
-### TODO
-
- [x] Affine Sprites
- [ ] Windowing (see [this branch](https://git.musuka.dev/paoda/zba/src/branch/window))
- [ ] Audio Resampler (Having issues with SDL2's)
- [ ] Refactoring for easy-ish perf boosts
-
-## Usage
-
-ZBA supports both a CLI and a GUI. If running from the terminal, try using `zba --help` to see what you can do. If you want to use the GUI, feel free to just run `zba` without any arguments.
-
-ZBA does not feature any BIOS HLE, so providing one will be necessary if a ROM makes use of it. Need one? Why not try using the open-source [Cult-Of-GBA BIOS](https://github.com/Cult-of-GBA/BIOS) written by [fleroviux](https://github.com/fleroviux) and [DenSinH](https://github.com/DenSinH)?
-
-Finally it's worth noting that ZBA uses a TOML config file it'll store in your OS's data directory. See `example.toml` to learn about the defaults and what exactly you can mess around with.
+## Resources
+* [GBATEK](https://problemkaputt.de/gbatek.htm)
+* [TONC](https://coranac.com/tonc/text/toc.htm)
+* [ARM Architecture Reference Manual](https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/third-party/ddi0100e_arm_arm.pdf)
+* [ARM7TDMI Data Sheet](https://www.dca.fee.unicamp.br/cursos/EA871/references/ARM/ARM7TDMIDataSheet.pdf)

 ## Compiling
-
-Most recently built on Zig [v0.11.0](https://github.com/ziglang/zig/tree/0.11.0)
+Most recently built on Zig [0.10.0-dev.2978+803376708](https://github.com/ziglang/zig/tree/803376708)

 ### Dependencies
+* [SDL.zig](https://github.com/MasterQ32/SDL.zig)
+    * [SDL2](https://www.libsdl.org/download-2.0.php)
+* [zig-clap](https://github.com/Hejsil/zig-clap)
+* [known-folders](https://github.com/ziglibs/known-folders)
+* [`bitfields.zig`](https://github.com/FlorenceOS/Florence/blob/f6044db788d35d43d66c1d7e58ef1e3c79f10d6f/lib/util/bitfields.zig)

-Dependency | Source
--- | ---
-known-folders | <https://github.com/ziglibs/known-folders>
-nfd-zig | <https://github.com/fabioarnold/nfd-zig>
-SDL.zig | <https://github.com/MasterQ32/SDL.zig>
-tomlz | <https://github.com/mattyhall/tomlz>
-zba-gdbstub | <https://github.com/paoda/zba-gdbstub>
-zba-util | <https://git.musuka.dev/paoda/zba-util>
-zgui | <https://github.com/michal-z/zig-gamedev/tree/main/libs/zgui>
-zig-clap | <https://github.com/Hejsil/zig-clap>
-zig-datetime | <https://github.com/frmdstryr/zig-datetime>
-`bitfield.zig` | [https://github.com/FlorenceOS/Florence](https://github.com/FlorenceOS/Florence/blob/aaa5a9e568/lib/util/bitfields.zig)
-`gl.zig` | <https://github.com/MasterQ32/zig-opengl>
+`bitfields.zig` from [FlorenceOS](https://github.com/FlorenceOS) is included under `lib/util/bitfield.zig`.

-Use `git submodule update --init` from the project root to pull the git relevant git submodules
+Use `git submodule update --init` from the project root to pull the git submodules `SDL.zig`, `zig-clap`, and `known-folders`

 Be sure to provide SDL2 using: 
-
- Linux: Your distro's package manager
- macOS: ¯\\\_(ツ)_/¯ (try [this formula](https://formulae.brew.sh/formula/sdl2)?)
- Windows: [`vcpkg`](https://github.com/Microsoft/vcpkg) (install `sdl2:x64-windows`)
+* Linux: Your distro's package manager
+* MacOS: ¯\\\_(ツ)_/¯
+* Windows: [`vcpkg`](https://github.com/Microsoft/vcpkg) (install `sdl2:x64-windows`)

 `SDL.zig` will provide a helpful compile error if the zig compiler is unable to find SDL2. 

-Once you've got all the dependencies, execute `zig build -Doptimize=ReleaseSafe`. The executable will be under `zig-out/bin` and the shared libraries (if enabled) under `zig-out/lib`. If working with shared libraries on windows, be sure to add all artifacts to the same directory. On Unix, you'll want to make use of `LD_PRELOAD`.
+Once you've got all the dependencies, execute `zig build -Drelease-fast`. The executable is located at `zig-out/bin/`. 

 ## Controls
-
-Key | Button | | Key | Button
--- | --- | --- | --- | ---
-<kbd>A</kbd> | L | | <kbd>S</kbd> | R
-<kbd>X</kbd> | A | | <kbd>Z</kbd> | B
-<kbd>Return</kbd> | Start | | <kbd>RShift</kbd> | Select
+Key | Button
+--- | ---
+<kbd>X</kbd> | A
+<kbd>Z</kbd> | B
+<kbd>A</kbd> | L
+<kbd>S</kbd> | R
+<kbd>Return</kbd> | Start
+<kbd>RShift</kbd> | Select
 Arrow Keys | D-Pad
-
-## Tests
-
-GBA Tests | [jsmolka](https://github.com/jsmolka/) | gba_tests | [destoer](https://github.com/destoer/)
--- | --- | --- | ---
-`arm.gba`,  `thumb.gba` | PASS | `cond_invalid.gba` | PASS
-`memory.gba`, `bios.gba` | PASS | `dma_priority.gba` | PASS
-`flash64.gba`, `flash128.gba` | PASS | `hello_world.gba` | PASS
-`sram.gba` | PASS | `if_ack.gba` | PASS
-`none.gba` | PASS | `line_timing.gba` | FAIL
-`hello.gba`, `shades.gba`, `stripes.gba` | PASS | `lyc_midline.gba` | FAIL
-`nes.gba` | PASS | `window_midframe.gba` | FAIL
-
-GBARoms | [DenSinH](https://github.com/DenSinH/) | GBA Test Collection | [ladystarbreeze](https://github.com/ladystarbreeze)
--- | --- | --- | ---
-`eeprom-test`, `flash-test` | PASS | `retAddr.gba` | PASS
-`midikey2freq` | PASS | `helloWorld.gba` | PASS
-`swi-tests-random` | FAIL | `helloAudio.gba` | PASS
-
-FuzzARM | [DenSinH](https://github.com/DenSinH/) |  arm7wrestler GBA Fixed | [destoer](https://github.com/destoer)
--- | --- | --- | ---
-`main.gba` | PASS | `armwrestler-gba-fixed.gba` | PASS
-
-## Resources
-
- [GBATEK](https://problemkaputt.de/gbatek.htm)
- [TONC](https://coranac.com/tonc/text/toc.htm)
- [ARM Architecture Reference Manual](https://www.intel.com/content/dam/www/programmable/us/en/pdfs/literature/third-party/ddi0100e_arm_arm.pdf)
- [ARM7TDMI Data Sheet](https://www.dca.fee.unicamp.br/cursos/EA871/references/ARM/ARM7TDMIDataSheet.pdf)
--- a/assets/screenshot.png
+++ b/assets/screenshot.png
--- a/build.zig
+++ b/build.zig
@@ -1,65 +1,51 @@
 const std = @import("std");
-const builtin = @import("builtin");
-
-const sdl = @import("lib/SDL.zig/build.zig");
-
-const SemVer = std.SemanticVersion;
-
-const target_version = "0.13.0";
-
-pub fn build(b: *std.Build) void {
-    const actual_version = builtin.zig_version;
-    if (comptime actual_version.order(SemVer.parse(target_version) catch unreachable) != .eq) {
-        @compileError("ZBA must be built with Zig v" ++ target_version ++ ".");
-    }
+const Sdk = @import("lib/SDL.zig/Sdk.zig");

+pub fn build(b: *std.build.Builder) void {
+    // Standard target options allows the person running `zig build` to choose
+    // what target to build for. Here we do not override the defaults, which
+    // means any target is allowed, and the default is native. Other options
+    // for restricting supported target set are available.
    const target = b.standardTargetOptions(.{});
-    const optimize = b.standardOptimizeOption(.{});

-    const exe = b.addExecutable(.{
-        .name = "zba",
-        .root_source_file = b.path("src/main.zig"),
-        .target = target,
-        .optimize = optimize,
-    });
+    // Standard release options allow the person running `zig build` to select
+    // between Debug, ReleaseSafe, ReleaseFast, and ReleaseSmall.
+    const mode = b.standardReleaseOptions();

-    const sdk = sdl.init(b, null, null);
-    const zgui = b.dependency("zgui", .{ .shared = false, .with_implot = true, .backend = .sdl2_opengl3 });
-    const imgui = zgui.artifact("imgui");
+    const exe = b.addExecutable("zba", "src/main.zig");
    
-    exe.root_module.addImport("known_folders", b.dependency("known-folders", .{}).module("known-folders")); // https://github.com/ziglibs/known-folders
-    exe.root_module.addImport("datetime", b.dependency("zig-datetime", .{}).module("zig-datetime")); // https://github.com/frmdstryr/zig-datetime
-    exe.root_module.addImport("clap", b.dependency("zig-clap", .{}).module("clap")); // https://github.com/Hejsil/zig-clap
-    exe.root_module.addImport("zba-util", b.dependency("zba-util", .{}).module("zba-util")); // https://git.musuka.dev/paoda/zba-util
-    exe.root_module.addImport("tomlz", b.dependency("tomlz", .{}).module("tomlz")); // https://github.com/mattyhall/tomlz
-    exe.root_module.addImport("arm32", b.dependency("arm32", .{}).module("arm32")); // https://git.musuka.dev/paoda/arm32
-    exe.root_module.addImport("gdbstub", b.dependency("zba-gdbstub", .{}).module("zba-gdbstub")); // https://git.musuka.dev/paoda/gdbstub
-    exe.root_module.addImport("nfd", b.dependency("nfd", .{}).module("nfd")); // https://github.com/fabioarnold/nfd-zig
-    exe.root_module.addImport("zgui", zgui.module("root")); // https://git.musuka.dev/paoda/zgui
-    exe.root_module.addImport("sdl2", sdk.getNativeModule()); // https://github.com/MasterQ32/SDL.zig
+    // Known Folders (%APPDATA%, XDG, etc.)
+    exe.addPackagePath("known_folders", "lib/known-folders/known-folders.zig");

-    exe.root_module.addAnonymousImport("bitfield", .{ .root_source_file = b.path("lib/bitfield.zig") }); // https://github.com/FlorenceOS/
-    exe.root_module.addAnonymousImport("gl", .{ .root_source_file = b.path("lib/gl.zig") }); // https://github.com/MasterQ32/zig-opengl
-    exe.root_module.addAnonymousImport("example.toml", .{ .root_source_file = b.path("example.toml") });
+    // Bitfield type from FlorenceOS: https://github.com/FlorenceOS/
+    // exe.addPackage(.{ .name = "bitfield", .path = .{ .path = "lib/util/bitfield.zig" } });
+    exe.addPackagePath("bitfield", "lib/util/bitfield.zig");

-    sdk.link(exe, .dynamic, .SDL2);
-    sdk.link(imgui, .dynamic, .SDL2);
-    exe.linkLibrary(imgui);
+    // Argument Parsing Library
+    exe.addPackagePath("clap", "lib/zig-clap/clap.zig");

-    b.installArtifact(exe);
+    // Zig SDL Bindings: https://github.com/MasterQ32/SDL.zig
+    const sdk = Sdk.init(b);
+    sdk.link(exe, .dynamic);

-    const run_cmd = b.addRunArtifact(exe);
+    exe.addPackage(sdk.getNativePackage("sdl2"));
+
+    exe.setTarget(target);
+    exe.setBuildMode(mode);
+    exe.install();
+
+    const run_cmd = exe.run();
    run_cmd.step.dependOn(b.getInstallStep());
-    if (b.args) |args| run_cmd.addArgs(args);
+    if (b.args) |args| {
+        run_cmd.addArgs(args);
+    }

    const run_step = b.step("run", "Run the app");
    run_step.dependOn(&run_cmd.step);

-    const exe_tests = b.addTest(.{
-        .root_source_file = b.path("src/main.zig"),
-        .target = target,
-        .optimize = optimize,
-    });
+    const exe_tests = b.addTest("src/main.zig");
+    exe_tests.setTarget(target);
+    exe_tests.setBuildMode(mode);

    const test_step = b.step("test", "Run unit tests");
    test_step.dependOn(&exe_tests.step);
--- a/build.zig.zon
+++ b/build.zig.zon
@@ -1,50 +0,0 @@
-.{
-    .name = "zba",
-    .version = "0.1.0",
-    .paths = .{
-        "build.zig",
-        "build.zig.zon",
-        "lib/bitfield.zig",
-        "lib/gl.zig",
-        "src",
-    },
-    .minimum_zig_version = "0.13.0",
-    .dependencies = .{
-        .nfd = .{
-            .url = "git+https://github.com/paoda/nfd-zig#ad81729d33da30d5f4fd23718debec48245121ca",
-            .hash = "1220a679380847513262c8c5c474d4a415f9ecc4921c8c6aefbdbdce66cf2aa19ceb",
-        },
-        .@"known-folders" = .{
-            .url = "git+https://github.com/ziglibs/known-folders#1cceeb70e77dec941a4178160ff6c8d05a74de6f",
-            .hash = "12205f5e7505c96573f6fc5144592ec38942fb0a326d692f9cddc0c7dd38f9028f29",
-        },
-        .@"zig-datetime" = .{
-            .url = "git+https://github.com/frmdstryr/zig-datetime#70aebf28fb3e137cd84123a9349d157a74708721",
-            .hash = "122077215ce36e125a490e59ec1748ffd4f6ba00d4d14f7308978e5360711d72d77f",
-        },
-        .@"zig-clap" = .{
-            .url = "git+https://github.com/Hejsil/zig-clap#c0193e9247335a6c1688b946325060289405de2a",
-            .hash = "12207ee987ce045596cb992cfb15b0d6d9456e50d4721c3061c69dabc2962053644d",
-        },
-        .@"zba-util" = .{
-            .url = "git+https://git.musuka.dev/paoda/zba-util#bf0e744047ce1ec90172dbcc0c72bfcc29a063e3",
-            .hash = "1220d044ecfbeacc3b3cebeff131d587e24167d61435a3cb96dffd4d4521bb06aed0",
-        },
-        .@"zba-gdbstub" = .{
-            .url = "git+https://git.musuka.dev/paoda/zba-gdbstub#9a50607d5f48293f950a4e823344f2bc24582a5a",
-            .hash = "1220ac267744ed2a735f03c4620d7c6210fbd36d7bfb2b376ddc3436faebadee0f61",
-        },
-        .tomlz = .{
-            .url = "git+https://github.com/paoda/tomlz#9a16dd53927ef2012478b6494bafb4475e44f4c9",
-            .hash = "12204f922cab84980e36b5c058d354ec0ee169bda401c8e0e80a463580349b476569",
-        },
-        .arm32 = .{
-            .url = "git+https://git.musuka.dev/paoda/arm32#814d081ea0983bc48841a6baad7158c157b17ad6",
-            .hash = "12203c3dacf3a7aa7aee5fc5763dd7b40399bd1c34d1483330b6bd5a76bffef22d82",
-        },
-        .zgui = .{
-            .url = "git+https://git.musuka.dev/paoda/zgui#7f8d05101e96c64314d7926c80ee157dcb89da4e",
-            .hash = "1220bd81a1c7734892b1d4233ed047710487787873c85dd5fc76d1764a331ed2ff43",
-        },
-    },
-}
--- a/dl_sdl2.ps1
+++ b/dl_sdl2.ps1
@@ -1,36 +0,0 @@
-$SDL2Version = "2.30.0"
-$ArchiveFile = ".\SDL2-devel-mingw.zip"
-$Json = @"
-{
-	"x86_64-windows-gnu": {
-		"include": ".build_config\\SDL2\\include",
-		"libs": ".build_config\\SDL2\\lib",
-		"bin": ".build_config\\SDL2\\bin"
-	}
-}	
-"@
-
-New-Item -Force -ItemType Directory -Path .\.build_config
-Set-Location -Path .build_config -PassThru
-
-if (!(Test-Path -PathType Leaf $ArchiveFile)) {
-	Invoke-WebRequest "https://github.com/libsdl-org/SDL/releases/download/release-$SDL2Version/SDL2-devel-$SDL2Version-mingw.zip" -OutFile $ArchiveFile
-}
-
-Expand-Archive $ArchiveFile
-
-if (Test-Path -PathType Container .\SDL2) {
-	Remove-Item -Recurse .\SDL2
-}
-
-New-Item -Force -ItemType Directory -Path .\SDL2 
-Get-ChildItem -Path ".\SDL2-devel-mingw\SDL2-$SDL2Version\x86_64-w64-mingw32" | Move-Item -Destination .\SDL2
-
-# #include <SDL.h>
-Move-Item -Force -Path .\SDL2\include\SDL2\* -Destination .\SDL2\include
-Remove-Item -Force .\SDL2\include\SDL2
-
-New-Item -Force .\sdl.json -Value $Json
-
-Remove-Item -Recurse .\SDL2-devel-mingw
-Set-Location -Path .. -PassThru
--- a/example.toml
+++ b/example.toml
@@ -1,25 +0,0 @@
-[host]
-# Using nearest-neighbour scaling, how many times the native resolution 
-# of the game bow should the screen be?
-win_scale = 3
-# Enable VSYNC on the UI thread
-vsync = true
-# Mute ZBA
-mute = false
-
-[guest]
-# Sync Emulation to Audio 
-audio_sync = true
-# Sync Emulation to Video
-video_sync = true
-# Force RTC support
-force_rtc = false
-# Skip BIOS
-skip_bios = false
-
-[debug]
-# Enable detailed CPU logs
-cpu_trace = false
-# When false and builtin.mode == .Debug, ZBA will panic
-# on unknown I/O reads
-unhandled_io = true
--- a/lib/SDL.zig
+++ b/lib/SDL.zig
--- a/lib/gl.zig
+++ b/lib/gl.zig
--- a/lib/known-folders
+++ b/lib/known-folders
--- a/lib/util/bitfield.zig
+++ b/lib/util/bitfield.zig
@@ -14,7 +14,7 @@ fn PtrCastPreserveCV(comptime T: type, comptime PtrToT: type, comptime NewT: typ
 fn BitType(comptime FieldType: type, comptime ValueType: type, comptime shamt: usize) type {
    const self_bit: FieldType = (1 << shamt);

-    return extern struct {
+    return struct {
        bits: Bitfield(FieldType, shamt, 1),

        pub fn set(self: anytype) void {
@@ -26,13 +26,13 @@ fn BitType(comptime FieldType: type, comptime ValueType: type, comptime shamt: u
        }

        pub fn read(self: anytype) ValueType {
-            return @bitCast(@as(u1, @truncate(self.bits.field().* >> shamt)));
+            return @bitCast(ValueType, @truncate(u1, self.bits.field().* >> shamt));
        }

        // Since these are mostly used with MMIO, I want to avoid
        // reading the memory just to write it again, also races
        pub fn write(self: anytype, val: ValueType) void {
-            if (@as(bool, @bitCast(val))) {
+            if (@bitCast(bool, val)) {
                self.set();
            } else {
                self.unset();
@@ -63,21 +63,21 @@ pub fn Bitfield(comptime FieldType: type, comptime shamt: usize, comptime num_bi

    const ValueType = std.meta.Int(.unsigned, num_bits);

-    return extern struct {
+    return struct {
        dummy: FieldType,

        fn field(self: anytype) PtrCastPreserveCV(@This(), @TypeOf(self), FieldType) {
-            return @ptrCast(self);
+            return @ptrCast(PtrCastPreserveCV(@This(), @TypeOf(self), FieldType), self);
        }

        pub fn write(self: anytype, val: ValueType) void {
            self.field().* &= ~self_mask;
-            self.field().* |= @as(FieldType, @intCast(val)) << shamt;
+            self.field().* |= @intCast(FieldType, val) << shamt;
        }

        pub fn read(self: anytype) ValueType {
            const val: FieldType = self.field().*;
-            return @intCast((val & self_mask) >> shamt);
+            return @intCast(ValueType, (val & self_mask) >> shamt);
        }
    };
 }
--- a/lib/zig-clap
+++ b/lib/zig-clap
--- a/src/Bus.zig
+++ b/src/Bus.zig
@@ -0,0 +1,200 @@
+const std = @import("std");
+
+const AudioDeviceId = @import("sdl2").SDL_AudioDeviceID;
+const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
+const Bios = @import("bus/Bios.zig");
+const Ewram = @import("bus/Ewram.zig");
+const GamePak = @import("bus/GamePak.zig");
+const Io = @import("bus/io.zig").Io;
+const Iwram = @import("bus/Iwram.zig");
+const Ppu = @import("ppu.zig").Ppu;
+const Apu = @import("apu.zig").Apu;
+const DmaTuple = @import("bus/dma.zig").DmaTuple;
+const TimerTuple = @import("bus/timer.zig").TimerTuple;
+const Scheduler = @import("scheduler.zig").Scheduler;
+const FilePaths = @import("util.zig").FilePaths;
+
+const io = @import("bus/io.zig");
+const Allocator = std.mem.Allocator;
+const log = std.log.scoped(.Bus);
+
+const createDmaTuple = @import("bus/dma.zig").create;
+const createTimerTuple = @import("bus/timer.zig").create;
+const rotr = @import("util.zig").rotr;
+
+const timings: [2][0x10]u8 = [_][0x10]u8{
+    // BIOS, Unused, EWRAM, IWRAM, I/0, PALRAM, VRAM, OAM, ROM0, ROM0, ROM1, ROM1, ROM2, ROM2, SRAM, Unused
+    [_]u8{ 1, 1, 3, 1, 1, 1, 1, 1, 5, 5, 5, 5, 5, 5, 5, 5 }, // 8-bit & 16-bit
+    [_]u8{ 1, 1, 6, 1, 1, 2, 2, 1, 8, 8, 8, 8, 8, 8, 8, 8 }, // 32-bit
+};
+
+pub const fetch_timings: [2][0x10]u8 = [_][0x10]u8{
+    // BIOS, Unused, EWRAM, IWRAM, I/0, PALRAM, VRAM, OAM, ROM0, ROM0, ROM1, ROM1, ROM2, ROM2, SRAM, Unused
+    [_]u8{ 1, 1, 3, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 5, 5 }, // 8-bit & 16-bit
+    [_]u8{ 1, 1, 6, 1, 1, 2, 2, 1, 4, 4, 4, 4, 4, 4, 8, 8 }, // 32-bit
+};
+
+const Self = @This();
+
+pak: GamePak,
+bios: Bios,
+ppu: Ppu,
+apu: Apu,
+dma: DmaTuple,
+tim: TimerTuple,
+iwram: Iwram,
+ewram: Ewram,
+io: Io,
+
+cpu: ?*Arm7tdmi,
+sched: *Scheduler,
+
+pub fn init(alloc: Allocator, sched: *Scheduler, paths: FilePaths) !Self {
+    return Self{
+        .pak = try GamePak.init(alloc, paths.rom, paths.save),
+        .bios = try Bios.init(alloc, paths.bios),
+        .ppu = try Ppu.init(alloc, sched),
+        .apu = Apu.init(sched),
+        .iwram = try Iwram.init(alloc),
+        .ewram = try Ewram.init(alloc),
+        .dma = createDmaTuple(),
+        .tim = createTimerTuple(sched),
+        .io = Io.init(),
+        .cpu = null,
+        .sched = sched,
+    };
+}
+
+pub fn deinit(self: Self) void {
+    self.iwram.deinit();
+    self.ewram.deinit();
+    self.pak.deinit();
+    self.bios.deinit();
+    self.ppu.deinit();
+}
+
+pub fn attach(self: *Self, cpu: *Arm7tdmi) void {
+    self.cpu = cpu;
+}
+
+pub fn debugRead(self: *const Self, comptime T: type, address: u32) T {
+    const cached = self.sched.tick;
+    defer self.sched.tick = cached;
+
+    // FIXME: This is bad but it's a debug read so I don't care that much?
+    const this = @intToPtr(*Self, @ptrToInt(self));
+
+    return this.read(T, address);
+}
+
+fn readOpenBus(self: *const Self, comptime T: type, address: u32) T {
+    const r15 = self.cpu.?.r[15];
+
+    const word = if (self.cpu.?.cpsr.t.read()) blk: {
+        const page = @truncate(u8, r15 >> 24);
+
+        switch (page) {
+            // EWRAM, PALRAM, VRAM, and Game ROM (16-bit)
+            0x02, 0x05, 0x06, 0x08...0x0D => {
+                const halfword = self.debugRead(u16, r15 + 2);
+                break :blk @as(u32, halfword) << 16 | halfword;
+            },
+            // BIOS or OAM (32-bit)
+            0x00, 0x07 => {
+                const offset: u32 = if (address & 3 == 0b00) 2 else 0;
+                break :blk @as(u32, self.debugRead(u16, (r15 + 2) + offset)) << 16 | self.debugRead(u16, r15 + offset);
+            },
+            // IWRAM (16-bit but special)
+            0x03 => {
+                const offset: u32 = if (address & 3 == 0b00) 2 else 0;
+                break :blk @as(u32, self.debugRead(u16, (r15 + 2) - offset)) << 16 | self.debugRead(u16, r15 + offset);
+            },
+            else => unreachable,
+        }
+    } else self.debugRead(u32, r15 + 4);
+
+    return @truncate(T, rotr(u32, word, 8 * (address & 3)));
+}
+
+fn readBios(self: *Self, comptime T: type, address: u32) T {
+    if (address < Bios.size) return self.bios.checkedRead(T, self.cpu.?.r[15], alignAddress(T, address));
+
+    return self.readOpenBus(T, address);
+}
+
+pub fn read(self: *Self, comptime T: type, address: u32) T {
+    const page = @truncate(u8, address >> 24);
+    const align_addr = alignAddress(T, address);
+    defer self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
+
+    return switch (page) {
+        // General Internal Memory
+        0x00 => self.readBios(T, address),
+        0x02 => self.ewram.read(T, align_addr),
+        0x03 => self.iwram.read(T, align_addr),
+        0x04 => io.read(self, T, align_addr),
+
+        // Internal Display Memory
+        0x05 => self.ppu.palette.read(T, align_addr),
+        0x06 => self.ppu.vram.read(T, align_addr),
+        0x07 => self.ppu.oam.read(T, align_addr),
+
+        // External Memory (Game Pak)
+        0x08...0x0D => self.pak.read(T, align_addr),
+        0x0E...0x0F => blk: {
+            const value = self.pak.backup.read(address);
+
+            const multiplier = switch (T) {
+                u32 => 0x01010101,
+                u16 => 0x0101,
+                u8 => 1,
+                else => @compileError("Backup: Unsupported read width"),
+            };
+
+            break :blk @as(T, value) * multiplier;
+        },
+        else => readOpenBus(self, T, address),
+    };
+}
+
+pub fn write(self: *Self, comptime T: type, address: u32, value: T) void {
+    const page = @truncate(u8, address >> 24);
+    const align_addr = alignAddress(T, address);
+    defer self.sched.tick += timings[@boolToInt(T == u32)][@truncate(u4, page)];
+
+    switch (page) {
+        // General Internal Memory
+        0x00 => self.bios.write(T, align_addr, value),
+        0x02 => self.ewram.write(T, align_addr, value),
+        0x03 => self.iwram.write(T, align_addr, value),
+        0x04 => io.write(self, T, align_addr, value),
+
+        // Internal Display Memory
+        0x05 => self.ppu.palette.write(T, align_addr, value),
+        0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, align_addr, value),
+        0x07 => self.ppu.oam.write(T, align_addr, value),
+
+        // External Memory (Game Pak)
+        0x08...0x0D => self.pak.write(T, self.dma[3].word_count, align_addr, value),
+        0x0E...0x0F => {
+            const rotate_by = switch (T) {
+                u32 => address & 3,
+                u16 => address & 1,
+                u8 => 0,
+                else => @compileError("Backup: Unsupported write width"),
+            };
+
+            self.pak.backup.write(address, @truncate(u8, rotr(T, value, 8 * rotate_by)));
+        },
+        else => {},
+    }
+}
+
+fn alignAddress(comptime T: type, address: u32) u32 {
+    return switch (T) {
+        u32 => address & 0xFFFF_FFFC,
+        u16 => address & 0xFFFF_FFFE,
+        u8 => address,
+        else => @compileError("Bus: Invalid read/write type"),
+    };
+}
--- a/src/apu.zig
+++ b/src/apu.zig
--- a/src/bus/Bios.zig
+++ b/src/bus/Bios.zig
@@ -0,0 +1,58 @@
+const std = @import("std");
+
+const Allocator = std.mem.Allocator;
+const log = std.log.scoped(.Bios);
+
+/// Size of the BIOS in bytes
+pub const size = 0x4000;
+const Self = @This();
+
+buf: ?[]u8,
+alloc: Allocator,
+
+addr_latch: u32,
+
+pub fn init(alloc: Allocator, maybe_path: ?[]const u8) !Self {
+    var buf: ?[]u8 = null;
+    if (maybe_path) |path| {
+        const file = try std.fs.cwd().openFile(path, .{});
+        defer file.close();
+        buf = try file.readToEndAlloc(alloc, try file.getEndPos());
+    }
+
+    return Self{
+        .buf = buf,
+        .alloc = alloc,
+        .addr_latch = 0,
+    };
+}
+
+pub fn deinit(self: Self) void {
+    if (self.buf) |buf| self.alloc.free(buf);
+}
+
+pub fn checkedRead(self: *Self, comptime T: type, r15: u32, addr: u32) T {
+    if (r15 < Self.size) {
+        self.addr_latch = addr;
+        return self.read(T, addr);
+    }
+
+    log.debug("Rejected read since r15=0x{X:0>8}", .{r15});
+    return @truncate(T, self.read(T, self.addr_latch + 8));
+}
+
+fn read(self: *const Self, comptime T: type, addr: u32) T {
+    if (self.buf) |buf| {
+        return switch (T) {
+            u32, u16, u8 => std.mem.readIntSliceLittle(T, buf[addr..][0..@sizeOf(T)]),
+            else => @compileError("BIOS: Unsupported read width"),
+        };
+    }
+
+    std.debug.panic("[BIOS] ZBA tried to read {} from 0x{X:0>8} but not BIOS was present", .{ T, addr });
+}
+
+pub fn write(_: *Self, comptime T: type, addr: u32, value: T) void {
+    @setCold(true);
+    log.debug("Tried to write {} 0x{X:} to 0x{X:0>8} ", .{ T, value, addr });
+}
--- a/src/core/bus/Ewram.zig
+++ b/src/core/bus/Ewram.zig
@@ -5,13 +5,27 @@ const ewram_size = 0x40000;
 const Self = @This();

 buf: []u8,
-allocator: Allocator,
+alloc: Allocator,
+
+pub fn init(alloc: Allocator) !Self {
+    const buf = try alloc.alloc(u8, ewram_size);
+    std.mem.set(u8, buf, 0);
+
+    return Self{
+        .buf = buf,
+        .alloc = alloc,
+    };
+}
+
+pub fn deinit(self: Self) void {
+    self.alloc.free(self.buf);
+}

 pub fn read(self: *const Self, comptime T: type, address: usize) T {
    const addr = address & 0x3FFFF;

    return switch (T) {
-        u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
+        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
        else => @compileError("EWRAM: Unsupported read width"),
    };
 }
@@ -20,26 +34,7 @@ pub fn write(self: *const Self, comptime T: type, address: usize, value: T) void
    const addr = address & 0x3FFFF;

    return switch (T) {
-        u32, u16, u8 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
+        u32, u16, u8 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
        else => @compileError("EWRAM: Unsupported write width"),
    };
 }
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, ewram_size);
-    @memset(buf, 0);
-
-    return Self{
-        .buf = buf,
-        .allocator = allocator,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    @memset(self.buf, 0);
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
--- a/src/bus/GamePak.zig
+++ b/src/bus/GamePak.zig
@@ -0,0 +1,157 @@
+const std = @import("std");
+
+const Backup = @import("backup.zig").Backup;
+const Allocator = std.mem.Allocator;
+const log = std.log.scoped(.GamePak);
+
+const Self = @This();
+
+title: [12]u8,
+buf: []u8,
+alloc: Allocator,
+backup: Backup,
+
+pub fn init(alloc: Allocator, rom_path: []const u8, save_path: ?[]const u8) !Self {
+    const file = try std.fs.cwd().openFile(rom_path, .{});
+    defer file.close();
+
+    const file_buf = try file.readToEndAlloc(alloc, try file.getEndPos());
+    const title = parseTitle(file_buf);
+    const kind = Backup.guessKind(file_buf) orelse .None;
+
+    const pak = Self{
+        .buf = file_buf,
+        .alloc = alloc,
+        .title = title,
+        .backup = try Backup.init(alloc, kind, title, save_path),
+    };
+    pak.parseHeader();
+
+    return pak;
+}
+
+fn parseHeader(self: *const Self) void {
+    const title = parseTitle(self.buf);
+    const code = self.buf[0xAC..0xB0];
+    const maker = self.buf[0xB0..0xB2];
+    const version = self.buf[0xBC];
+
+    log.info("Title: {s}", .{title});
+    if (version != 0) log.info("Version: {}", .{version});
+    log.info("Game Code: {s}", .{code});
+    if (lookupMaker(maker)) |c| log.info("Maker: {s}", .{c}) else log.info("Maker Code: {s}", .{maker});
+}
+
+fn parseTitle(buf: []u8) [12]u8 {
+    return buf[0xA0..0xAC].*;
+}
+
+fn lookupMaker(slice: *const [2]u8) ?[]const u8 {
+    const id = @as(u16, slice[1]) << 8 | @as(u16, slice[0]);
+    return switch (id) {
+        0x3130 => "Nintendo",
+        else => null,
+    };
+}
+
+inline fn isLarge(self: *const Self) bool {
+    return self.buf.len > 0x100_0000;
+}
+
+pub fn deinit(self: Self) void {
+    self.alloc.free(self.buf);
+    self.backup.deinit();
+}
+
+pub fn read(self: *Self, comptime T: type, address: u32) T {
+    const addr = address & 0x1FF_FFFF;
+
+    if (self.backup.kind == .Eeprom) {
+        if (self.isLarge()) {
+            // Addresses 0x1FF_FF00 to 0x1FF_FFFF are reserved from EEPROM accesses if
+            // * Backup type is EEPROM
+            // * Large ROM (Size is greater than 16MB)
+            if (addr > 0x1FF_FEFF)
+                return self.backup.eeprom.read();
+        } else {
+            // Addresses 0x0D00_0000 to 0x0DFF_FFFF are reserved for EEPROM accesses if
+            // * Backup type is EEPROM
+            // * Small ROM (less than 16MB)
+            if (@truncate(u8, address >> 24) == 0x0D)
+                return self.backup.eeprom.read();
+        }
+    }
+
+    return switch (T) {
+        u32 => (@as(T, self.get(addr + 3)) << 24) | (@as(T, self.get(addr + 2)) << 16) | (@as(T, self.get(addr + 1)) << 8) | (@as(T, self.get(addr))),
+        u16 => (@as(T, self.get(addr + 1)) << 8) | @as(T, self.get(addr)),
+        u8 => self.get(addr),
+        else => @compileError("GamePak: Unsupported read width"),
+    };
+}
+
+pub fn write(self: *Self, comptime T: type, word_count: u16, address: u32, value: T) void {
+    const addr = address & 0x1FF_FFFF;
+
+    if (self.backup.kind == .Eeprom) {
+        const bit = @truncate(u1, value);
+
+        if (self.isLarge()) {
+            // Addresses 0x1FF_FF00 to 0x1FF_FFFF are reserved from EEPROM accesses if
+            // * Backup type is EEPROM
+            // * Large ROM (Size is greater than 16MB)
+            if (addr > 0x1FF_FEFF)
+                return self.backup.eeprom.write(word_count, &self.backup.buf, bit);
+        } else {
+            // Addresses 0x0D00_0000 to 0x0DFF_FFFF are reserved for EEPROM accesses if
+            // * Backup type is EEPROM
+            // * Small ROM (less than 16MB)
+            if (@truncate(u8, address >> 24) == 0x0D)
+                return self.backup.eeprom.write(word_count, &self.backup.buf, bit);
+        }
+    }
+
+    switch (T) {
+        u32 => switch (address) {
+            0x0800_00C4 => log.debug("Wrote {} 0x{X:} to I/O Port Data and Direction", .{ T, value }),
+            0x0800_00C6 => log.debug("Wrote {} 0x{X:} to I/O Port Direction and Control", .{ T, value }),
+            else => {},
+        },
+        u16 => switch (address) {
+            0x0800_00C4 => log.debug("Wrote {} 0x{X:} to I/O Port Data", .{ T, value }),
+            0x0800_00C6 => log.debug("Wrote {} 0x{X:} to I/O Port Direction", .{ T, value }),
+            0x0800_00C8 => log.debug("Wrote {} 0x{X:} to I/O Port Control", .{ T, value }),
+            else => {},
+        },
+        u8 => log.debug("Wrote {} 0x{X:} to 0x{X:0>8}, Ignored.", .{ T, value, address }),
+        else => @compileError("GamePak: Unsupported write width"),
+    }
+}
+
+fn get(self: *const Self, i: u32) u8 {
+    @setRuntimeSafety(false);
+    if (i < self.buf.len) return self.buf[i];
+
+    const lhs = i >> 1 & 0xFFFF;
+    return @truncate(u8, lhs >> 8 * @truncate(u5, i & 1));
+}
+
+test "OOB Access" {
+    const title = .{ 'H', 'E', 'L', 'L', 'O', ' ', 'W', 'O', 'R', 'L', 'D', '!' };
+    const alloc = std.testing.allocator;
+    const pak = Self{
+        .buf = &.{},
+        .alloc = alloc,
+        .title = title,
+        .backup = try Backup.init(alloc, .None, title, null),
+    };
+
+    std.debug.assert(pak.get(0) == 0x00); // 0x0000
+    std.debug.assert(pak.get(1) == 0x00);
+
+    std.debug.assert(pak.get(2) == 0x01); // 0x0001
+    std.debug.assert(pak.get(3) == 0x00);
+
+    std.debug.assert(pak.get(4) == 0x02); // 0x0002
+    std.debug.assert(pak.get(5) == 0x00);
+}
--- a/src/core/bus/Iwram.zig
+++ b/src/core/bus/Iwram.zig
@@ -5,13 +5,27 @@ const iwram_size = 0x8000;
 const Self = @This();

 buf: []u8,
-allocator: Allocator,
+alloc: Allocator,
+
+pub fn init(alloc: Allocator) !Self {
+    const buf = try alloc.alloc(u8, iwram_size);
+    std.mem.set(u8, buf, 0);
+
+    return Self{
+        .buf = buf,
+        .alloc = alloc,
+    };
+}
+
+pub fn deinit(self: Self) void {
+    self.alloc.free(self.buf);
+}

 pub fn read(self: *const Self, comptime T: type, address: usize) T {
    const addr = address & 0x7FFF;

    return switch (T) {
-        u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
+        u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
        else => @compileError("IWRAM: Unsupported read width"),
    };
 }
@@ -20,26 +34,7 @@ pub fn write(self: *const Self, comptime T: type, address: usize, value: T) void
    const addr = address & 0x7FFF;

    return switch (T) {
-        u32, u16, u8 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
+        u32, u16, u8 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
        else => @compileError("IWRAM: Unsupported write width"),
    };
 }
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, iwram_size);
-    @memset(buf, 0);
-
-    return Self{
-        .buf = buf,
-        .allocator = allocator,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    @memset(self.buf, 0);
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
--- a/src/bus/backup.zig
+++ b/src/bus/backup.zig
@@ -0,0 +1,547 @@
+const std = @import("std");
+const Allocator = std.mem.Allocator;
+const log = std.log.scoped(.Backup);
+
+const escape = @import("../util.zig").escape;
+const asString = @import("../util.zig").asString;
+
+const backup_kinds = [5]Needle{
+    .{ .str = "EEPROM_V", .kind = .Eeprom },
+    .{ .str = "SRAM_V", .kind = .Sram },
+    .{ .str = "FLASH_V", .kind = .Flash },
+    .{ .str = "FLASH512_V", .kind = .Flash },
+    .{ .str = "FLASH1M_V", .kind = .Flash1M },
+};
+
+pub const Backup = struct {
+    const Self = @This();
+
+    buf: []u8,
+    alloc: Allocator,
+    kind: BackupKind,
+
+    title: [12]u8,
+    save_path: ?[]const u8,
+
+    flash: Flash,
+    eeprom: Eeprom,
+
+    pub fn init(alloc: Allocator, kind: BackupKind, title: [12]u8, path: ?[]const u8) !Self {
+        log.info("Kind: {}", .{kind});
+
+        const buf_size: usize = switch (kind) {
+            .Sram => 0x8000, // 32K
+            .Flash => 0x10000, // 64K
+            .Flash1M => 0x20000, // 128K
+            .None, .Eeprom => 0, // EEPROM is handled upon first Read Request to it
+        };
+
+        const buf = try alloc.alloc(u8, buf_size);
+        std.mem.set(u8, buf, 0xFF);
+
+        var backup = Self{
+            .buf = buf,
+            .alloc = alloc,
+            .kind = kind,
+            .title = title,
+            .save_path = path,
+            .flash = Flash.init(),
+            .eeprom = Eeprom.init(alloc),
+        };
+
+        if (backup.save_path) |p| backup.loadSaveFromDisk(p) catch |e| log.err("Failed to load save: {}", .{e});
+        return backup;
+    }
+
+    pub fn guessKind(rom: []const u8) ?BackupKind {
+        for (backup_kinds) |needle| {
+            const needle_len = needle.str.len;
+
+            var i: usize = 0;
+            while ((i + needle_len) < rom.len) : (i += 1) {
+                if (std.mem.eql(u8, needle.str, rom[i..][0..needle_len])) return needle.kind;
+            }
+        }
+
+        return null;
+    }
+
+    pub fn deinit(self: Self) void {
+        if (self.save_path) |path| self.writeSaveToDisk(path) catch |e| log.err("Failed to write save: {}", .{e});
+        self.alloc.free(self.buf);
+    }
+
+    fn loadSaveFromDisk(self: *Self, path: []const u8) !void {
+        const file_path = try self.getSaveFilePath(path);
+        defer self.alloc.free(file_path);
+
+        // FIXME: Don't rely on this lol
+        if (std.mem.eql(u8, file_path[file_path.len - 12 .. file_path.len], "untitled.sav")) {
+            return log.err("ROM header lacks title, no save loaded", .{});
+        }
+
+        const file: std.fs.File = try std.fs.openFileAbsolute(file_path, .{});
+        const file_buf = try file.readToEndAlloc(self.alloc, try file.getEndPos());
+        defer self.alloc.free(file_buf);
+
+        switch (self.kind) {
+            .Sram, .Flash, .Flash1M => {
+                if (self.buf.len == file_buf.len) {
+                    std.mem.copy(u8, self.buf, file_buf);
+                    return log.info("Loaded Save from {s}", .{file_path});
+                }
+
+                log.err("{s} is {} bytes, but we expected {} bytes", .{ file_path, file_buf.len, self.buf.len });
+            },
+            .Eeprom => {
+                if (file_buf.len == 0x200 or file_buf.len == 0x2000) {
+                    self.eeprom.kind = if (file_buf.len == 0x200) .Small else .Large;
+
+                    self.buf = try self.alloc.alloc(u8, file_buf.len);
+                    std.mem.copy(u8, self.buf, file_buf);
+                    return log.info("Loaded Save from {s}", .{file_path});
+                }
+
+                log.err("EEPROM can either be 0x200 bytes or 0x2000 byes, but {s} was {X:} bytes", .{
+                    file_path,
+                    file_buf.len,
+                });
+            },
+            .None => return SaveError.UnsupportedBackupKind,
+        }
+    }
+
+    fn getSaveFilePath(self: *const Self, path: []const u8) ![]const u8 {
+        const filename = try self.getSaveFilename();
+        defer self.alloc.free(filename);
+
+        return try std.fs.path.join(self.alloc, &[_][]const u8{ path, filename });
+    }
+
+    fn getSaveFilename(self: *const Self) ![]const u8 {
+        const title = asString(escape(self.title));
+        const name = if (title.len != 0) title else "untitled";
+
+        return try std.mem.concat(self.alloc, u8, &[_][]const u8{ name, ".sav" });
+    }
+
+    fn writeSaveToDisk(self: Self, path: []const u8) !void {
+        const file_path = try self.getSaveFilePath(path);
+        defer self.alloc.free(file_path);
+
+        switch (self.kind) {
+            .Sram, .Flash, .Flash1M, .Eeprom => {
+                const file = try std.fs.createFileAbsolute(file_path, .{});
+                defer file.close();
+
+                try file.writeAll(self.buf);
+                log.info("Wrote Save to {s}", .{file_path});
+            },
+            else => return SaveError.UnsupportedBackupKind,
+        }
+    }
+
+    pub fn read(self: *const Self, address: usize) u8 {
+        const addr = address & 0xFFFF;
+
+        switch (self.kind) {
+            .Flash => {
+                switch (addr) {
+                    0x0000 => if (self.flash.id_mode) return 0x32, // Panasonic manufacturer ID
+                    0x0001 => if (self.flash.id_mode) return 0x1B, // Panasonic device ID
+                    else => {},
+                }
+
+                return self.flash.read(self.buf, addr);
+            },
+            .Flash1M => {
+                switch (addr) {
+                    0x0000 => if (self.flash.id_mode) return 0x62, // Sanyo manufacturer ID
+                    0x0001 => if (self.flash.id_mode) return 0x13, // Sanyo device ID
+                    else => {},
+                }
+
+                return self.flash.read(self.buf, addr);
+            },
+            .Sram => return self.buf[addr & 0x7FFF], // 32K SRAM chip is mirrored
+            .None, .Eeprom => return 0xFF,
+        }
+    }
+
+    pub fn write(self: *Self, address: usize, byte: u8) void {
+        const addr = address & 0xFFFF;
+
+        switch (self.kind) {
+            .Flash, .Flash1M => {
+                if (self.flash.prep_write) return self.flash.write(self.buf, addr, byte);
+                if (self.flash.shouldEraseSector(addr, byte)) return self.flash.eraseSector(self.buf, addr);
+
+                switch (addr) {
+                    0x0000 => if (self.kind == .Flash1M and self.flash.set_bank) {
+                        self.flash.bank = @truncate(u1, byte);
+                    },
+                    0x5555 => {
+                        if (self.flash.state == .Command) {
+                            self.flash.handleCommand(self.buf, byte);
+                        } else if (byte == 0xAA and self.flash.state == .Ready) {
+                            self.flash.state = .Set;
+                        } else if (byte == 0xF0) {
+                            self.flash.state = .Ready;
+                        }
+                    },
+                    0x2AAA => if (byte == 0x55 and self.flash.state == .Set) {
+                        self.flash.state = .Command;
+                    },
+                    else => {},
+                }
+            },
+            .Sram => self.buf[addr & 0x7FFF] = byte,
+            .None, .Eeprom => {},
+        }
+    }
+};
+
+const BackupKind = enum {
+    Eeprom,
+    Sram,
+    Flash,
+    Flash1M,
+    None,
+};
+
+const Needle = struct {
+    const Self = @This();
+
+    str: []const u8,
+    kind: BackupKind,
+
+    fn init(str: []const u8, kind: BackupKind) Self {
+        return .{
+            .str = str,
+            .kind = kind,
+        };
+    }
+};
+
+const SaveError = error{
+    UnsupportedBackupKind,
+};
+
+const Flash = struct {
+    const Self = @This();
+
+    state: FlashState,
+
+    id_mode: bool,
+    set_bank: bool,
+    prep_erase: bool,
+    prep_write: bool,
+
+    bank: u1,
+
+    fn init() Self {
+        return .{
+            .state = .Ready,
+            .id_mode = false,
+            .set_bank = false,
+            .prep_erase = false,
+            .prep_write = false,
+            .bank = 0,
+        };
+    }
+
+    fn handleCommand(self: *Self, buf: []u8, byte: u8) void {
+        switch (byte) {
+            0x90 => self.id_mode = true,
+            0xF0 => self.id_mode = false,
+            0xB0 => self.set_bank = true,
+            0x80 => self.prep_erase = true,
+            0x10 => {
+                std.mem.set(u8, buf, 0xFF);
+                self.prep_erase = false;
+            },
+            0xA0 => self.prep_write = true,
+            else => std.debug.panic("Unhandled Flash Command: 0x{X:0>2}", .{byte}),
+        }
+
+        self.state = .Ready;
+    }
+
+    fn shouldEraseSector(self: *const Self, addr: usize, byte: u8) bool {
+        return self.state == .Command and self.prep_erase and byte == 0x30 and addr & 0xFFF == 0x000;
+    }
+
+    fn write(self: *Self, buf: []u8, idx: usize, byte: u8) void {
+        buf[self.baseAddress() + idx] = byte;
+        self.prep_write = false;
+    }
+
+    fn read(self: *const Self, buf: []u8, idx: usize) u8 {
+        return buf[self.baseAddress() + idx];
+    }
+
+    fn eraseSector(self: *Self, buf: []u8, idx: usize) void {
+        const start = self.baseAddress() + (idx & 0xF000);
+
+        std.mem.set(u8, buf[start..][0..0x1000], 0xFF);
+        self.prep_erase = false;
+        self.state = .Ready;
+    }
+
+    inline fn baseAddress(self: *const Self) usize {
+        return if (self.bank == 1) 0x10000 else @as(usize, 0);
+    }
+};
+
+const FlashState = enum {
+    Ready,
+    Set,
+    Command,
+};
+
+const Eeprom = struct {
+    const Self = @This();
+
+    addr: u14,
+
+    kind: Kind,
+    state: State,
+    writer: Writer,
+    reader: Reader,
+
+    alloc: Allocator,
+
+    const Kind = enum {
+        Unknown,
+        Small, // 512B
+        Large, // 8KB
+    };
+
+    const State = enum {
+        Ready,
+        Read,
+        Write,
+        WriteTransfer,
+        RequestEnd,
+    };
+
+    fn init(alloc: Allocator) Self {
+        return .{
+            .kind = .Unknown,
+            .state = .Ready,
+            .writer = Writer.init(),
+            .reader = Reader.init(),
+            .addr = 0,
+            .alloc = alloc,
+        };
+    }
+
+    pub fn read(self: *Self) u1 {
+        return self.reader.read();
+    }
+
+    pub fn write(self: *Self, word_count: u16, buf: *[]u8, bit: u1) void {
+        if (self.guessKind(word_count)) |found| {
+            log.info("EEPROM Kind: {}", .{found});
+            self.kind = found;
+
+            // buf.len will not equal zero when a save file was found and loaded.
+            // Right now, we assume that the save file is of the correct size which
+            // isn't necessarily true, since we can't trust anything a user can influence
+            // TODO: use ?[]u8 instead of a 0-sized slice?
+            if (buf.len == 0) {
+                const len: usize = switch (found) {
+                    .Small => 0x200,
+                    .Large => 0x2000,
+                    else => unreachable,
+                };
+
+                buf.* = self.alloc.alloc(u8, len) catch |e| {
+                    log.err("Failed to resize EEPROM buf to {} bytes", .{len});
+                    std.debug.panic("EEPROM entered irrecoverable state {}", .{e});
+                };
+                std.mem.set(u8, buf.*, 0xFF);
+            }
+        }
+
+        if (self.state == .RequestEnd) {
+            if (bit != 0) log.debug("EEPROM Request did not end in 0u1. TODO: is this ok?", .{});
+            self.state = .Ready;
+            return;
+        }
+
+        switch (self.state) {
+            .Ready => self.writer.requestWrite(bit),
+            .Read, .Write => self.writer.addressWrite(self.kind, bit),
+            .WriteTransfer => self.writer.dataWrite(bit),
+            .RequestEnd => unreachable, // We return early just above this block
+        }
+
+        self.tick(buf.*);
+    }
+
+    fn guessKind(self: *const Self, word_count: u16) ?Kind {
+        if (self.kind != .Unknown or self.state != .Read) return null;
+
+        return switch (word_count) {
+            17 => .Large,
+            9 => .Small,
+            else => blk: {
+                log.err("Unexpected length of DMA3 Transfer upon initial EEPROM read: {}", .{word_count});
+                break :blk null;
+            },
+        };
+    }
+
+    fn tick(self: *Self, buf: []u8) void {
+        switch (self.state) {
+            .Ready => {
+                if (self.writer.len() == 2) {
+                    const req = @intCast(u2, self.writer.finish());
+                    switch (req) {
+                        0b11 => self.state = .Read,
+                        0b10 => self.state = .Write,
+                        else => log.err("Unknown EEPROM Request 0b{b:0>2}", .{req}),
+                    }
+                }
+            },
+            .Read => {
+                switch (self.kind) {
+                    .Large => {
+                        if (self.writer.len() == 14) {
+                            const addr = @intCast(u10, self.writer.finish());
+                            const value = std.mem.readIntSliceLittle(u64, buf[@as(u13, addr) * 8 ..][0..8]);
+
+                            self.reader.configure(value);
+                            self.state = .RequestEnd;
+                        }
+                    },
+                    .Small => {
+                        if (self.writer.len() == 6) {
+                            // FIXME: Duplicated code from above
+                            const addr = @intCast(u6, self.writer.finish());
+                            const value = std.mem.readIntSliceLittle(u64, buf[@as(u13, addr) * 8 ..][0..8]);
+
+                            self.reader.configure(value);
+                            self.state = .RequestEnd;
+                        }
+                    },
+                    else => log.err("Unable to calculate EEPROM read address. EEPROM size UNKNOWN", .{}),
+                }
+            },
+            .Write => {
+                switch (self.kind) {
+                    .Large => {
+                        if (self.writer.len() == 14) {
+                            self.addr = @intCast(u10, self.writer.finish());
+                            self.state = .WriteTransfer;
+                        }
+                    },
+                    .Small => {
+                        if (self.writer.len() == 6) {
+                            self.addr = @intCast(u6, self.writer.finish());
+                            self.state = .WriteTransfer;
+                        }
+                    },
+                    else => log.err("Unable to calculate EEPROM write address. EEPROM size UNKNOWN", .{}),
+                }
+            },
+            .WriteTransfer => {
+                if (self.writer.len() == 64) {
+                    std.mem.writeIntSliceLittle(u64, buf[self.addr * 8 ..][0..8], self.writer.finish());
+                    self.state = .RequestEnd;
+                }
+            },
+            .RequestEnd => unreachable, // We return early in write() if state is .RequestEnd
+        }
+    }
+
+    const Reader = struct {
+        const This = @This();
+
+        data: u64,
+        i: u8,
+        enabled: bool,
+
+        fn init() This {
+            return .{
+                .data = 0,
+                .i = 0,
+                .enabled = false,
+            };
+        }
+
+        fn configure(self: *This, value: u64) void {
+            self.data = value;
+            self.i = 0;
+            self.enabled = true;
+        }
+
+        fn read(self: *This) u1 {
+            if (!self.enabled) return 1;
+
+            const bit = if (self.i < 4) blk: {
+                break :blk 0;
+            } else blk: {
+                const idx = @intCast(u6, 63 - (self.i - 4));
+                break :blk @truncate(u1, self.data >> idx);
+            };
+
+            self.i = (self.i + 1) % (64 + 4);
+            if (self.i == 0) self.enabled = false;
+
+            return bit;
+        }
+    };
+
+    const Writer = struct {
+        const This = @This();
+
+        data: u64,
+        i: u8,
+
+        fn init() This {
+            return .{ .data = 0, .i = 0 };
+        }
+
+        fn requestWrite(self: *This, bit: u1) void {
+            const idx = @intCast(u1, 1 - self.i);
+            self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
+            self.i += 1;
+        }
+
+        fn addressWrite(self: *This, kind: Eeprom.Kind, bit: u1) void {
+            if (kind == .Unknown) return;
+
+            const size: u4 = switch (kind) {
+                .Large => 13,
+                .Small => 5,
+                .Unknown => unreachable,
+            };
+
+            const idx = @intCast(u4, size - self.i);
+            self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
+            self.i += 1;
+        }
+
+        fn dataWrite(self: *This, bit: u1) void {
+            const idx = @intCast(u6, 63 - self.i);
+            self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
+            self.i += 1;
+        }
+
+        fn len(self: *const This) u8 {
+            return self.i;
+        }
+
+        fn finish(self: *This) u64 {
+            defer self.reset();
+            return self.data;
+        }
+
+        fn reset(self: *This) void {
+            self.i = 0;
+            self.data = 0;
+        }
+    };
+};
--- a/src/bus/dma.zig
+++ b/src/bus/dma.zig
@@ -0,0 +1,302 @@
+const std = @import("std");
+
+const DmaControl = @import("io.zig").DmaControl;
+const Bus = @import("../Bus.zig");
+const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
+
+const readUndefined = @import("../util.zig").readUndefined;
+const writeUndefined = @import("../util.zig").writeUndefined;
+pub const DmaTuple = std.meta.Tuple(&[_]type{ DmaController(0), DmaController(1), DmaController(2), DmaController(3) });
+const log = std.log.scoped(.DmaTransfer);
+
+pub fn create() DmaTuple {
+    return .{ DmaController(0).init(), DmaController(1).init(), DmaController(2).init(), DmaController(3).init() };
+}
+
+pub fn read(comptime T: type, dma: *const DmaTuple, addr: u32) T {
+    const byte = @truncate(u8, addr);
+
+    return switch (T) {
+        u32 => switch (byte) {
+            0xB8 => @as(T, dma.*[0].cnt.raw) << 16,
+            0xC4 => @as(T, dma.*[1].cnt.raw) << 16,
+            0xD0 => @as(T, dma.*[2].cnt.raw) << 16,
+            0xDC => @as(T, dma.*[3].cnt.raw) << 16,
+            else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
+        },
+        u16 => switch (byte) {
+            0xBA => dma.*[0].cnt.raw,
+            0xC6 => dma.*[1].cnt.raw,
+            0xD2 => dma.*[2].cnt.raw,
+            0xDE => dma.*[3].cnt.raw,
+            else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
+        },
+        u8 => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
+        else => @compileError("DMA: Unsupported read width"),
+    };
+}
+
+pub fn write(comptime T: type, dma: *DmaTuple, addr: u32, value: T) void {
+    const byte = @truncate(u8, addr);
+
+    switch (T) {
+        u32 => switch (byte) {
+            0xB0 => dma.*[0].setSad(value),
+            0xB4 => dma.*[0].setDad(value),
+            0xB8 => dma.*[0].setCnt(value),
+            0xBC => dma.*[1].setSad(value),
+            0xC0 => dma.*[1].setDad(value),
+            0xC4 => dma.*[1].setCnt(value),
+            0xC8 => dma.*[2].setSad(value),
+            0xCC => dma.*[2].setDad(value),
+            0xD0 => dma.*[2].setCnt(value),
+            0xD4 => dma.*[3].setSad(value),
+            0xD8 => dma.*[3].setDad(value),
+            0xDC => dma.*[3].setCnt(value),
+            else => writeUndefined(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
+        },
+        u16 => switch (byte) {
+            0xB0 => dma.*[0].setSad(setU32L(dma.*[0].sad, value)),
+            0xB2 => dma.*[0].setSad(setU32H(dma.*[0].sad, value)),
+            0xB4 => dma.*[0].setDad(setU32L(dma.*[0].dad, value)),
+            0xB6 => dma.*[0].setDad(setU32H(dma.*[0].dad, value)),
+            0xB8 => dma.*[0].setCntL(value),
+            0xBA => dma.*[0].setCntH(value),
+
+            0xBC => dma.*[1].setSad(setU32L(dma.*[1].sad, value)),
+            0xBE => dma.*[1].setSad(setU32H(dma.*[1].sad, value)),
+            0xC0 => dma.*[1].setDad(setU32L(dma.*[1].dad, value)),
+            0xC2 => dma.*[1].setDad(setU32H(dma.*[1].dad, value)),
+            0xC4 => dma.*[1].setCntL(value),
+            0xC6 => dma.*[1].setCntH(value),
+
+            0xC8 => dma.*[2].setSad(setU32L(dma.*[2].sad, value)),
+            0xCA => dma.*[2].setSad(setU32H(dma.*[2].sad, value)),
+            0xCC => dma.*[2].setDad(setU32L(dma.*[2].dad, value)),
+            0xCE => dma.*[2].setDad(setU32H(dma.*[2].dad, value)),
+            0xD0 => dma.*[2].setCntL(value),
+            0xD2 => dma.*[2].setCntH(value),
+
+            0xD4 => dma.*[3].setSad(setU32L(dma.*[3].sad, value)),
+            0xD6 => dma.*[3].setSad(setU32H(dma.*[3].sad, value)),
+            0xD8 => dma.*[3].setDad(setU32L(dma.*[3].dad, value)),
+            0xDA => dma.*[3].setDad(setU32H(dma.*[3].dad, value)),
+            0xDC => dma.*[3].setCntL(value),
+            0xDE => dma.*[3].setCntH(value),
+            else => writeUndefined(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
+        },
+        u8 => writeUndefined(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
+        else => @compileError("DMA: Unsupported write width"),
+    }
+}
+
+/// Function that creates a DMAController. Determines unique DMA Controller behaiour at compile-time
+fn DmaController(comptime id: u2) type {
+    return struct {
+        const Self = @This();
+
+        const sad_mask: u32 = if (id == 0) 0x07FF_FFFF else 0x0FFF_FFFF;
+        const dad_mask: u32 = if (id != 3) 0x07FF_FFFF else 0x0FFF_FFFF;
+
+        /// Write-only. The first address in a DMA transfer. (DMASAD)
+        /// Note: use writeSrc instead of manipulating src_addr directly
+        sad: u32,
+        /// Write-only. The final address in a DMA transffer. (DMADAD)
+        /// Note: Use writeDst instead of manipulatig dst_addr directly
+        dad: u32,
+        /// Write-only. The Word Count for the DMA Transfer (DMACNT_L)
+        word_count: if (id == 3) u16 else u14,
+        /// Read / Write. DMACNT_H
+        /// Note: Use writeControl instead of manipulating cnt directly.
+        cnt: DmaControl,
+
+        /// Internal. Currrent Source Address
+        _sad: u32,
+        /// Internal. Current Destination Address
+        _dad: u32,
+        /// Internal. Word Count
+        _word_count: if (id == 3) u16 else u14,
+
+        // Internal. FIFO Word Count
+        _fifo_word_count: u8,
+
+        /// Some DMA Transfers are enabled during Hblank / VBlank and / or
+        /// have delays. Thefore bit 15 of DMACNT isn't actually something
+        /// we can use to control when we do or do not execute a step in a DMA Transfer
+        in_progress: bool,
+
+        pub fn init() Self {
+            return .{
+                .sad = 0,
+                .dad = 0,
+                .word_count = 0,
+                .cnt = .{ .raw = 0x000 },
+
+                // Internals
+                ._sad = 0,
+                ._dad = 0,
+                ._word_count = 0,
+                ._fifo_word_count = 4,
+                .in_progress = false,
+            };
+        }
+
+        pub fn setSad(self: *Self, addr: u32) void {
+            self.sad = addr & sad_mask;
+        }
+
+        pub fn setDad(self: *Self, addr: u32) void {
+            self.dad = addr & dad_mask;
+        }
+
+        pub fn setCntL(self: *Self, halfword: u16) void {
+            self.word_count = @truncate(@TypeOf(self.word_count), halfword);
+        }
+
+        pub fn setCntH(self: *Self, halfword: u16) void {
+            const new = DmaControl{ .raw = halfword };
+
+            if (!self.cnt.enabled.read() and new.enabled.read()) {
+                // Reload Internals on Rising Edge.
+                self._sad = self.sad;
+                self._dad = self.dad;
+                self._word_count = if (self.word_count == 0) std.math.maxInt(@TypeOf(self._word_count)) else self.word_count;
+
+                // Only a Start Timing of 00 has a DMA Transfer immediately begin
+                self.in_progress = new.start_timing.read() == 0b00;
+            }
+
+            self.cnt.raw = halfword;
+        }
+
+        pub fn setCnt(self: *Self, word: u32) void {
+            self.setCntL(@truncate(u16, word));
+            self.setCntH(@truncate(u16, word >> 16));
+        }
+
+        pub fn step(self: *Self, cpu: *Arm7tdmi) void {
+            const is_fifo = (id == 1 or id == 2) and self.cnt.start_timing.read() == 0b11;
+            const sad_adj = Self.adjustment(self.cnt.sad_adj.read());
+            const dad_adj = if (is_fifo) .Fixed else Self.adjustment(self.cnt.dad_adj.read());
+
+            const transfer_type = is_fifo or self.cnt.transfer_type.read();
+            const offset: u32 = if (transfer_type) @sizeOf(u32) else @sizeOf(u16);
+
+            const mask = if (transfer_type) ~@as(u32, 3) else ~@as(u32, 1);
+
+            if (transfer_type) {
+                cpu.bus.write(u32, self._dad & mask, cpu.bus.read(u32, self._sad & mask));
+            } else {
+                cpu.bus.write(u16, self._dad & mask, cpu.bus.read(u16, self._sad & mask));
+            }
+
+            switch (sad_adj) {
+                .Increment => self._sad +%= offset,
+                .Decrement => self._sad -%= offset,
+                // TODO: Is just ignoring this ok?
+                .IncrementReload => log.err("{} is a prohibited adjustment on SAD", .{sad_adj}),
+                .Fixed => {},
+            }
+
+            switch (dad_adj) {
+                .Increment, .IncrementReload => self._dad +%= offset,
+                .Decrement => self._dad -%= offset,
+                .Fixed => {},
+            }
+
+            self._word_count -= 1;
+
+            if (self._word_count == 0) {
+                if (self.cnt.irq.read()) {
+                    switch (id) {
+                        0 => cpu.bus.io.irq.dma0.set(),
+                        1 => cpu.bus.io.irq.dma1.set(),
+                        2 => cpu.bus.io.irq.dma2.set(),
+                        3 => cpu.bus.io.irq.dma3.set(),
+                    }
+
+                    cpu.handleInterrupt();
+                }
+
+                // If we're not repeating, Fire the IRQs and disable the DMA
+                if (!self.cnt.repeat.read()) self.cnt.enabled.unset();
+
+                // We want to disable our internal enabled flag regardless of repeat
+                // because we only want to step A DMA that repeats during it's specific
+                // timing window
+                self.in_progress = false;
+            }
+        }
+
+        pub fn pollBlankingDma(self: *Self, comptime kind: DmaKind) void {
+            if (self.in_progress) return; // If there's an ongoing DMA Transfer, exit early
+
+            // No ongoing DMA Transfer, We want to check if we should repeat an existing one
+            // Determined by the repeat bit and whether the DMA is in the right start_timing
+            switch (kind) {
+                .VBlank => self.in_progress = self.cnt.enabled.read() and self.cnt.start_timing.read() == 0b01,
+                .HBlank => self.in_progress = self.cnt.enabled.read() and self.cnt.start_timing.read() == 0b10,
+                .Immediate, .Special => {},
+            }
+
+            // If we determined that the repeat bit is set (and now the Hblank / Vblank DMA is now in progress)
+            // Reload internal word count latch
+            // Reload internal DAD latch if we are in IncrementRelaod
+            if (self.in_progress) {
+                self._word_count = if (self.word_count == 0) std.math.maxInt(@TypeOf(self._word_count)) else self.word_count;
+                if (Self.adjustment(self.cnt.dad_adj.read()) == .IncrementReload) self._dad = self.dad;
+            }
+        }
+
+        pub fn requestSoundDma(self: *Self, _: u32) void {
+            comptime std.debug.assert(id == 1 or id == 2);
+            if (self.in_progress) return; // APU must wait their turn
+
+            // DMA May not be configured for handling DMAs
+            if (self.cnt.start_timing.read() != 0b11) return;
+
+            // We Assume the Repeat Bit is Set
+            // We Assume that DAD is set to 0x0400_00A0 or 0x0400_00A4 (fifo_addr)
+            // We Assume DMACNT_L is set to 4
+
+            // FIXME: Safe to just assume whatever DAD is set to is the FIFO Address?
+            // self._dad = fifo_addr;
+            self.cnt.repeat.set();
+            self._word_count = 4;
+            self.in_progress = true;
+        }
+
+        fn adjustment(idx: u2) Adjustment {
+            return std.meta.intToEnum(Adjustment, idx) catch unreachable;
+        }
+    };
+}
+
+pub fn pollBlankingDma(bus: *Bus, comptime kind: DmaKind) void {
+    bus.dma[0].pollBlankingDma(kind);
+    bus.dma[1].pollBlankingDma(kind);
+    bus.dma[2].pollBlankingDma(kind);
+    bus.dma[3].pollBlankingDma(kind);
+}
+
+const Adjustment = enum(u2) {
+    Increment = 0,
+    Decrement = 1,
+    Fixed = 2,
+    IncrementReload = 3,
+};
+
+const DmaKind = enum(u2) {
+    Immediate = 0,
+    HBlank,
+    VBlank,
+    Special,
+};
+
+fn setU32L(left: u32, right: u16) u32 {
+    return (left & 0xFFFF_0000) | right;
+}
+
+fn setU32H(left: u32, right: u16) u32 {
+    return (left & 0x0000_FFFF) | (@as(u32, right) << 16);
+}
--- a/src/core/bus/io.zig
+++ b/src/core/bus/io.zig
@@ -1,17 +1,18 @@
 const std = @import("std");
-const timer = @import("timer.zig");
-const dma = @import("dma.zig");
-const apu = @import("../apu.zig");
-const ppu = @import("../ppu.zig");
-const util = @import("../../util.zig");
+const builtin = @import("builtin");

 const Bit = @import("bitfield").Bit;
 const Bitfield = @import("bitfield").Bitfield;
 const Bus = @import("../Bus.zig");
+const DmaController = @import("dma.zig").DmaController;
+const Scheduler = @import("../scheduler.zig").Scheduler;

-const getHalf = util.getHalf;
-const setHalf = util.setHalf;
+const timer = @import("timer.zig");
+const dma = @import("dma.zig");
+const apu = @import("../apu.zig");

+const readUndefined = @import("../util.zig").readUndefined;
+const writeUndefined = @import("../util.zig").writeUndefined;
 const log = std.log.scoped(.@"I/O");

 pub const Io = struct {
@@ -22,40 +23,33 @@ pub const Io = struct {
    ie: InterruptEnable,
    irq: InterruptRequest,
    postflg: PostFlag,
-    waitcnt: WaitControl,
    haltcnt: HaltControl,
-    keyinput: AtomicKeyInput,
+    keyinput: KeyInput,

    pub fn init() Self {
        return .{
            .ime = false,
            .ie = .{ .raw = 0x0000 },
            .irq = .{ .raw = 0x0000 },
-            .keyinput = AtomicKeyInput.init(.{ .raw = 0x03FF }),
-            .waitcnt = .{ .raw = 0x0000_0000 }, // Bit 15 == 0 for GBA
+            .keyinput = .{ .raw = 0x03FF },
            .postflg = .FirstBoot,
            .haltcnt = .Execute,
        };
    }

-    pub fn reset(self: *Self) void {
-        self.* = Self.init();
-    }
-
    fn setIrqs(self: *Io, word: u32) void {
-        self.ie.raw = @truncate(word);
-        self.irq.raw &= ~@as(u16, @truncate(word >> 16));
+        self.ie.raw = @truncate(u16, word);
+        self.irq.raw &= ~@truncate(u16, word >> 16);
    }
 };

-pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
+pub fn read(bus: *const Bus, comptime T: type, address: u32) T {
    return switch (T) {
        u32 => switch (address) {
            // Display
-            0x0400_0000...0x0400_0054 => ppu.read(T, &bus.ppu, address),
-
-            // Sound
-            0x0400_0060...0x0400_00A4 => apu.read(T, &bus.apu, address),
+            0x0400_0000 => bus.ppu.dispcnt.raw,
+            0x0400_0004 => @as(T, bus.ppu.vcount.raw) << 16 | bus.ppu.dispstat.raw,
+            0x0400_0006 => @as(T, bus.ppu.bg[0].cnt.raw) << 16 | bus.ppu.vcount.raw,

            // DMA Transfers
            0x0400_00B0...0x0400_00DC => dma.read(T, &bus.dma, address),
@@ -64,27 +58,33 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
            0x0400_0100...0x0400_010C => timer.read(T, &bus.tim, address),

            // Serial Communication 1
-            0x0400_0128 => util.io.read.todo(log, "Read {} from SIOCNT and SIOMLT_SEND", .{T}),
+            0x0400_0128 => readTodo("Read {} from SIOCNT and SIOMLT_SEND", .{T}),

            // Keypad Input
-            0x0400_0130 => util.io.read.todo(log, "Read {} from KEYINPUT", .{T}),
+            0x0400_0130 => readTodo("Read {} from KEYINPUT", .{T}),

            // Serial Communication 2
-            0x0400_0150 => util.io.read.todo(log, "Read {} from JOY_RECV", .{T}),
+            0x0400_0150 => readTodo("Read {} from JOY_RECV", .{T}),

            // Interrupts
-            0x0400_0200 => @as(u32, bus.io.irq.raw) << 16 | bus.io.ie.raw,
-            0x0400_0204 => bus.io.waitcnt.raw,
-            0x0400_0208 => @intFromBool(bus.io.ime),
-            0x0400_0300 => @intFromEnum(bus.io.postflg),
-            else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
+            0x0400_0200 => @as(T, bus.io.irq.raw) << 16 | bus.io.ie.raw,
+            0x0400_0208 => @boolToInt(bus.io.ime),
+            else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
        },
        u16 => switch (address) {
            // Display
-            0x0400_0000...0x0400_0054 => ppu.read(T, &bus.ppu, address),
+            0x0400_0000 => bus.ppu.dispcnt.raw,
+            0x0400_0004 => bus.ppu.dispstat.raw,
+            0x0400_0006 => bus.ppu.vcount.raw,
+            0x0400_0008 => bus.ppu.bg[0].cnt.raw,
+            0x0400_000A => bus.ppu.bg[1].cnt.raw,
+            0x0400_000C => bus.ppu.bg[2].cnt.raw,
+            0x0400_000E => bus.ppu.bg[3].cnt.raw,
+            0x0400_004C => readTodo("Read {} from MOSAIC", .{T}),
+            0x0400_0050 => bus.ppu.bldcnt.raw,

            // Sound
-            0x0400_0060...0x0400_00A6 => apu.read(T, &bus.apu, address),
+            0x0400_0060...0x0400_009E => apu.read(T, &bus.apu, address),

            // DMA Transfers
            0x0400_00B0...0x0400_00DE => dma.read(T, &bus.dma, address),
@@ -93,64 +93,48 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
            0x0400_0100...0x0400_010E => timer.read(T, &bus.tim, address),

            // Serial Communication 1
-            0x0400_0128 => util.io.read.todo(log, "Read {} from SIOCNT", .{T}),
+            0x0400_0128 => readTodo("Read {} from SIOCNT", .{T}),

            // Keypad Input
-            0x0400_0130 => bus.io.keyinput.load(.monotonic),
+            0x0400_0130 => bus.io.keyinput.raw,

            // Serial Communication 2
-            0x0400_0134 => util.io.read.todo(log, "Read {} from RCNT", .{T}),
-            0x0400_0136 => 0x0000,
-            0x0400_0142 => 0x0000,
-            0x0400_015A => 0x0000,
+            0x0400_0134 => readTodo("Read {} from RCNT", .{T}),

            // Interrupts
            0x0400_0200 => bus.io.ie.raw,
            0x0400_0202 => bus.io.irq.raw,
-            0x0400_0204 => bus.io.waitcnt.raw,
-            0x0400_0206 => 0x0000,
-            0x0400_0208 => @intFromBool(bus.io.ime),
-            0x0400_020A => 0x0000,
-            0x0400_0300 => @intFromEnum(bus.io.postflg),
-            0x0400_0302 => 0x0000,
-            else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
+            0x0400_0204 => readTodo("Read {} from WAITCNT", .{T}),
+            0x0400_0208 => @boolToInt(bus.io.ime),
+            else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
        },
        u8 => return switch (address) {
            // Display
-            0x0400_0000...0x0400_0055 => ppu.read(T, &bus.ppu, address),
+            0x0400_0000 => @truncate(T, bus.ppu.dispcnt.raw),
+            0x0400_0004 => @truncate(T, bus.ppu.dispstat.raw),
+            0x0400_0005 => @truncate(T, bus.ppu.dispcnt.raw >> 8),
+            0x0400_0006 => @truncate(T, bus.ppu.vcount.raw),
+            0x0400_0008 => @truncate(T, bus.ppu.bg[0].cnt.raw),
+            0x0400_0009 => @truncate(T, bus.ppu.bg[0].cnt.raw >> 8),
+            0x0400_000A => @truncate(T, bus.ppu.bg[1].cnt.raw),
+            0x0400_000B => @truncate(T, bus.ppu.bg[1].cnt.raw >> 8),

            // Sound
            0x0400_0060...0x0400_00A7 => apu.read(T, &bus.apu, address),

-            // DMA Transfers
-            0x0400_00B0...0x0400_00DF => dma.read(T, &bus.dma, address),
-
-            // Timers
-            0x0400_0100...0x0400_010F => timer.read(T, &bus.tim, address),
-
            // Serial Communication 1
-            0x0400_0128 => util.io.read.todo(log, "Read {} from SIOCNT_L", .{T}),
+            0x0400_0128 => readTodo("Read {} from SIOCNT_L", .{T}),

            // Keypad Input
-            0x0400_0130 => util.io.read.todo(log, "read {} from KEYINPUT_L", .{T}),
+            0x0400_0130 => readTodo("read {} from KEYINPUT_L", .{T}),

            // Serial Communication 2
-            0x0400_0135 => util.io.read.todo(log, "Read {} from RCNT_H", .{T}),
-            0x0400_0136, 0x0400_0137 => 0x00,
-            0x0400_0142, 0x0400_0143 => 0x00,
-            0x0400_015A, 0x0400_015B => 0x00,
+            0x0400_0135 => readTodo("Read {} from RCNT_H", .{T}),

            // Interrupts
-            0x0400_0200, 0x0400_0201 => @truncate(bus.io.ie.raw >> getHalf(@truncate(address))),
-            0x0400_0202, 0x0400_0203 => @truncate(bus.io.irq.raw >> getHalf(@truncate(address))),
-            0x0400_0204, 0x0400_0205 => @truncate(bus.io.waitcnt.raw >> getHalf(@truncate(address))),
-            0x0400_0206, 0x0400_0207 => 0x00,
-            0x0400_0208, 0x0400_0209 => @truncate(@as(u16, @intFromBool(bus.io.ime)) >> getHalf(@truncate(address))),
-            0x0400_020A, 0x0400_020B => 0x00,
-            0x0400_0300 => @intFromEnum(bus.io.postflg),
-            0x0400_0301 => null,
-            0x0400_0302, 0x0400_0303 => 0x00,
-            else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
+            0x0400_0200 => @truncate(T, bus.io.ie.raw),
+            0x0400_0300 => @enumToInt(bus.io.postflg),
+            else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
        },
        else => @compileError("I/O: Unsupported read width"),
    };
@@ -160,7 +144,34 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
    return switch (T) {
        u32 => switch (address) {
            // Display
-            0x0400_0000...0x0400_0054 => ppu.write(T, &bus.ppu, address, value),
+            0x0400_0000 => bus.ppu.dispcnt.raw = @truncate(u16, value),
+            0x0400_0004 => {
+                bus.ppu.dispstat.raw = @truncate(u16, value);
+                bus.ppu.vcount.raw = @truncate(u16, value >> 16);
+            },
+            0x0400_0008 => bus.ppu.setAdjCnts(0, value),
+            0x0400_000C => bus.ppu.setAdjCnts(2, value),
+            0x0400_0010 => bus.ppu.setBgOffsets(0, value),
+            0x0400_0014 => bus.ppu.setBgOffsets(1, value),
+            0x0400_0018 => bus.ppu.setBgOffsets(2, value),
+            0x0400_001C => bus.ppu.setBgOffsets(3, value),
+            0x0400_0020 => bus.ppu.aff_bg[0].writePaPb(value),
+            0x0400_0024 => bus.ppu.aff_bg[0].writePcPd(value),
+            0x0400_0028 => bus.ppu.aff_bg[0].setX(bus.ppu.dispstat.vblank.read(), value),
+            0x0400_002C => bus.ppu.aff_bg[0].setY(bus.ppu.dispstat.vblank.read(), value),
+            0x0400_0030 => bus.ppu.aff_bg[1].writePaPb(value),
+            0x0400_0034 => bus.ppu.aff_bg[1].writePcPd(value),
+            0x0400_0038 => bus.ppu.aff_bg[1].setX(bus.ppu.dispstat.vblank.read(), value),
+            0x0400_003C => bus.ppu.aff_bg[1].setY(bus.ppu.dispstat.vblank.read(), value),
+            0x0400_0040 => bus.ppu.win.setH(value),
+            0x0400_0044 => bus.ppu.win.setV(value),
+            0x0400_0048 => bus.ppu.win.setIo(value),
+            0x0400_004C => log.debug("Wrote 0x{X:0>8} to MOSAIC", .{value}),
+            0x0400_0050 => {
+                bus.ppu.bldcnt.raw = @truncate(u16, value);
+                bus.ppu.bldalpha.raw = @truncate(u16, value >> 16);
+            },
+            0x0400_0054 => bus.ppu.bldy.raw = @truncate(u16, value),
            0x0400_0058...0x0400_005C => {}, // Unused

            // Sound
@@ -196,28 +207,65 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {

            // Interrupts
            0x0400_0200 => bus.io.setIrqs(value),
-            0x0400_0204 => bus.io.waitcnt.set(@truncate(value)),
+            0x0400_0204 => log.debug("Wrote 0x{X:0>8} to WAITCNT", .{value}),
            0x0400_0208 => bus.io.ime = value & 1 == 1,
-            0x0400_0300 => {
-                bus.io.postflg = @enumFromInt(value & 1);
-                bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
-            },
-            else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, address }),
+            0x0400_020C...0x0400_021C => {}, // Unused
+            else => writeUndefined(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, address }),
        },
        u16 => switch (address) {
            // Display
-            0x0400_0000...0x0400_0054 => ppu.write(T, &bus.ppu, address, value),
-            0x0400_0056 => {}, // Not used
+            0x0400_0000 => bus.ppu.dispcnt.raw = value,
+            0x0400_0004 => bus.ppu.dispstat.raw = value,
+            0x0400_0006 => {}, // vcount is read-only
+            0x0400_0008 => bus.ppu.bg[0].cnt.raw = value,
+            0x0400_000A => bus.ppu.bg[1].cnt.raw = value,
+            0x0400_000C => bus.ppu.bg[2].cnt.raw = value,
+            0x0400_000E => bus.ppu.bg[3].cnt.raw = value,
+            0x0400_0010 => bus.ppu.bg[0].hofs.raw = value, // TODO: Don't write out every HOFS / VOFS?
+            0x0400_0012 => bus.ppu.bg[0].vofs.raw = value,
+            0x0400_0014 => bus.ppu.bg[1].hofs.raw = value,
+            0x0400_0016 => bus.ppu.bg[1].vofs.raw = value,
+            0x0400_0018 => bus.ppu.bg[2].hofs.raw = value,
+            0x0400_001A => bus.ppu.bg[2].vofs.raw = value,
+            0x0400_001C => bus.ppu.bg[3].hofs.raw = value,
+            0x0400_001E => bus.ppu.bg[3].vofs.raw = value,
+            0x0400_0020 => bus.ppu.aff_bg[0].pa = @bitCast(i16, value),
+            0x0400_0022 => bus.ppu.aff_bg[0].pb = @bitCast(i16, value),
+            0x0400_0024 => bus.ppu.aff_bg[0].pc = @bitCast(i16, value),
+            0x0400_0026 => bus.ppu.aff_bg[0].pd = @bitCast(i16, value),
+            0x0400_0028 => bus.ppu.aff_bg[0].x = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[0].x) & 0xFFFF_0000 | value),
+            0x0400_002A => bus.ppu.aff_bg[0].x = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[0].x) & 0x0000_FFFF | (@as(u32, value) << 16)),
+            0x0400_002C => bus.ppu.aff_bg[0].y = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[0].y) & 0xFFFF_0000 | value),
+            0x0400_002E => bus.ppu.aff_bg[0].y = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[0].y) & 0x0000_FFFF | (@as(u32, value) << 16)),
+            0x0400_0030 => bus.ppu.aff_bg[1].pa = @bitCast(i16, value),
+            0x0400_0032 => bus.ppu.aff_bg[1].pb = @bitCast(i16, value),
+            0x0400_0034 => bus.ppu.aff_bg[1].pc = @bitCast(i16, value),
+            0x0400_0036 => bus.ppu.aff_bg[1].pd = @bitCast(i16, value),
+            0x0400_0038 => bus.ppu.aff_bg[1].x = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[1].x) & 0xFFFF_0000 | value),
+            0x0400_003A => bus.ppu.aff_bg[1].x = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[1].x) & 0x0000_FFFF | (@as(u32, value) << 16)),
+            0x0400_003C => bus.ppu.aff_bg[1].y = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[1].y) & 0xFFFF_0000 | value),
+            0x0400_003E => bus.ppu.aff_bg[1].y = @bitCast(i32, @bitCast(u32, bus.ppu.aff_bg[1].y) & 0x0000_FFFF | (@as(u32, value) << 16)),
+            0x0400_0040 => bus.ppu.win.h[0].raw = value,
+            0x0400_0042 => bus.ppu.win.h[1].raw = value,
+            0x0400_0044 => bus.ppu.win.v[0].raw = value,
+            0x0400_0046 => bus.ppu.win.v[1].raw = value,
+            0x0400_0048 => bus.ppu.win.in.raw = value,
+            0x0400_004A => bus.ppu.win.out.raw = value,
+            0x0400_004C => log.debug("Wrote 0x{X:0>4} to MOSAIC", .{value}),
+            0x0400_0050 => bus.ppu.bldcnt.raw = value,
+            0x0400_0052 => bus.ppu.bldalpha.raw = value,
+            0x0400_0054 => bus.ppu.bldy.raw = value,
+            0x0400_004E, 0x0400_0056 => {}, // Not used

            // Sound
-            0x0400_0060...0x0400_00A6 => apu.write(T, &bus.apu, address, value),
+            0x0400_0060...0x0400_009E => apu.write(T, &bus.apu, address, value),

            // Dma Transfers
            0x0400_00B0...0x0400_00DE => dma.write(T, &bus.dma, address, value),

            // Timers
            0x0400_0100...0x0400_010E => timer.write(T, &bus.tim, address, value),
-            0x0400_0114 => {},
+            0x0400_0114 => {}, // TODO: Gyakuten Saiban writes 0x8000 to 0x0400_0114
            0x0400_0110 => {}, // Not Used,

            // Serial Communication 1
@@ -241,29 +289,27 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
            // Interrupts
            0x0400_0200 => bus.io.ie.raw = value,
            0x0400_0202 => bus.io.irq.raw &= ~value,
-            0x0400_0204 => bus.io.waitcnt.set(value),
-            0x0400_0206 => {},
+            0x0400_0204 => log.debug("Wrote 0x{X:0>4} to WAITCNT", .{value}),
            0x0400_0208 => bus.io.ime = value & 1 == 1,
-            0x0400_020A => {},
-            0x0400_0300 => {
-                bus.io.postflg = @enumFromInt(value & 1);
-                bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
-            },
-            else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, address }),
+            0x0400_0206, 0x0400_020A => {}, // Not Used
+            else => writeUndefined(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, address }),
        },
        u8 => switch (address) {
            // Display
-            0x0400_0000...0x0400_0055 => ppu.write(T, &bus.ppu, address, value),
+            0x0400_0004 => bus.ppu.dispstat.raw = (bus.ppu.dispstat.raw & 0xFF00) | value,
+            0x0400_0005 => bus.ppu.dispstat.raw = (@as(u16, value) << 8) | (bus.ppu.dispstat.raw & 0xFF),
+            0x0400_0008 => bus.ppu.bg[0].cnt.raw = (bus.ppu.bg[0].cnt.raw & 0xFF00) | value,
+            0x0400_0009 => bus.ppu.bg[0].cnt.raw = (@as(u16, value) << 8) | (bus.ppu.bg[0].cnt.raw & 0xFF),
+            0x0400_000A => bus.ppu.bg[1].cnt.raw = (bus.ppu.bg[1].cnt.raw & 0xFF00) | value,
+            0x0400_000B => bus.ppu.bg[1].cnt.raw = (@as(u16, value) << 8) | (bus.ppu.bg[1].cnt.raw & 0xFF),
+            0x0400_0048 => bus.ppu.win.setInL(value),
+            0x0400_0049 => bus.ppu.win.setInH(value),
+            0x0400_004A => bus.ppu.win.setOutL(value),
+            0x0400_0054 => bus.ppu.bldy.raw = (bus.ppu.bldy.raw & 0xFF00) | value,

            // Sound
            0x0400_0060...0x0400_00A7 => apu.write(T, &bus.apu, address, value),

-            // Dma Transfers
-            0x0400_00B0...0x0400_00DF => dma.write(T, &bus.dma, address, value),
-
-            // Timers
-            0x0400_0100...0x0400_010F => timer.write(T, &bus.tim, address, value),
-
            // Serial Communication 1
            0x0400_0120 => log.debug("Wrote 0x{X:0>2} to SIODATA32_L_L", .{value}),
            0x0400_0128 => log.debug("Wrote 0x{X:0>2} to SIOCNT_L", .{value}),
@@ -273,25 +319,23 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
            0x0400_0140 => log.debug("Wrote 0x{X:0>2} to JOYCNT_L", .{value}),

            // Interrupts
-            0x0400_0200, 0x0400_0201 => bus.io.ie.raw = setHalf(u16, bus.io.ie.raw, @truncate(address), value),
            0x0400_0202 => bus.io.irq.raw &= ~@as(u16, value),
-            0x0400_0203 => bus.io.irq.raw &= ~@as(u16, value) << 8, // TODO: Is this good?
-            0x0400_0204, 0x0400_0205 => bus.io.waitcnt.set(setHalf(u16, bus.io.waitcnt.raw, @truncate(address), value)),
-            0x0400_0206, 0x0400_0207 => {},
            0x0400_0208 => bus.io.ime = value & 1 == 1,
-            0x0400_0209 => {},
-            0x0400_020A, 0x0400_020B => {},
-
-            0x0400_0300 => bus.io.postflg = @enumFromInt(value & 1),
+            0x0400_0300 => bus.io.postflg = std.meta.intToEnum(PostFlag, value & 1) catch unreachable,
            0x0400_0301 => bus.io.haltcnt = if (value >> 7 & 1 == 0) .Halt else std.debug.panic("TODO: Implement STOP", .{}),

            0x0400_0410 => log.debug("Wrote 0x{X:0>2} to the common yet undocumented 0x{X:0>8}", .{ value, address }),
-            else => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, address }),
+            else => writeUndefined(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, address }),
        },
        else => @compileError("I/O: Unsupported write width"),
    };
 }

+fn readTodo(comptime format: []const u8, args: anytype) u8 {
+    log.debug(format, args);
+    return 0;
+}
+
 /// Read / Write
 pub const PostFlag = enum(u1) {
    FirstBoot = 0,
@@ -321,22 +365,14 @@ pub const DisplayControl = extern union {

 /// Read / Write
 pub const DisplayStatus = extern union {
-    /// read-only
    vblank: Bit(u16, 0),
-    /// read-only
    hblank: Bit(u16, 1),
-    // read-only
    coincidence: Bit(u16, 2),
    vblank_irq: Bit(u16, 3),
    hblank_irq: Bit(u16, 4),
    vcount_irq: Bit(u16, 5),
    vcount_trigger: Bitfield(u16, 8, 8),
    raw: u16,
-
-    pub fn set(self: *DisplayStatus, value: u16) void {
-        const mask: u16 = 0x00C7; // set bits are read-only
-        self.raw = (self.raw & mask) | (value & ~mask);
-    }
 };

 /// Read Only
@@ -350,10 +386,10 @@ const InterruptEnable = extern union {
    vblank: Bit(u16, 0),
    hblank: Bit(u16, 1),
    coincidence: Bit(u16, 2),
-    tim0: Bit(u16, 3),
-    tim1: Bit(u16, 4),
-    tim2: Bit(u16, 5),
-    tim3: Bit(u16, 6),
+    tm0_overflow: Bit(u16, 3),
+    tm1_overflow: Bit(u16, 4),
+    tm2_overflow: Bit(u16, 5),
+    tm3_overflow: Bit(u16, 6),
    serial: Bit(u16, 7),
    dma0: Bit(u16, 8),
    dma1: Bit(u16, 9),
@@ -366,7 +402,7 @@ const InterruptEnable = extern union {

 /// Read Only
 /// 0 = Pressed, 1 = Released
-pub const KeyInput = extern union {
+const KeyInput = extern union {
    a: Bit(u16, 0),
    b: Bit(u16, 1),
    select: Bit(u16, 2),
@@ -380,32 +416,6 @@ pub const KeyInput = extern union {
    raw: u16,
 };

-const AtomicKeyInput = struct {
-    const Self = @This();
-    const AtomicOrder = std.builtin.AtomicOrder;
-
-    inner: KeyInput,
-
-    pub fn init(value: KeyInput) Self {
-        return .{ .inner = value };
-    }
-
-    pub inline fn load(self: *const Self, comptime ordering: AtomicOrder) u16 {
-        return switch (ordering) {
-            .acq_rel, .release => @compileError("not supported for atomic loads"),
-            else => @atomicLoad(u16, &self.inner.raw, ordering),
-        };
-    }
-
-    pub inline fn fetchOr(self: *Self, value: u16, comptime ordering: AtomicOrder) void {
-        _ = @atomicRmw(u16, &self.inner.raw, .Or, value, ordering);
-    }
-
-    pub inline fn fetchAnd(self: *Self, value: u16, comptime ordering: AtomicOrder) void {
-        _ = @atomicRmw(u16, &self.inner.raw, .And, value, ordering);
-    }
-};
-
 // Read / Write
 pub const BackgroundControl = extern union {
    priority: Bitfield(u16, 0, 2),
@@ -454,8 +464,6 @@ pub const BldY = extern union {
    raw: u16,
 };

-const u8WriteKind = enum { Hi, Lo };
-
 /// Write-only
 pub const WinH = extern union {
    x2: Bitfield(u16, 0, 8),
@@ -465,8 +473,6 @@ pub const WinH = extern union {

 /// Write-only
 pub const WinV = extern union {
-    const Self = @This();
-
    y2: Bitfield(u16, 0, 8),
    y1: Bitfield(u16, 8, 8),
    raw: u16,
@@ -475,20 +481,20 @@ pub const WinV = extern union {
 pub const WinIn = extern union {
    w0_bg: Bitfield(u16, 0, 4),
    w0_obj: Bit(u16, 4),
-    w0_bld: Bit(u16, 5),
+    w0_colour: Bit(u16, 5),
    w1_bg: Bitfield(u16, 8, 4),
    w1_obj: Bit(u16, 12),
-    w1_bld: Bit(u16, 13),
+    w1_colour: Bit(u16, 13),
    raw: u16,
 };

 pub const WinOut = extern union {
    out_bg: Bitfield(u16, 0, 4),
    out_obj: Bit(u16, 4),
-    out_bld: Bit(u16, 5),
+    out_colour: Bit(u16, 5),
    obj_bg: Bitfield(u16, 8, 4),
    obj_obj: Bit(u16, 12),
-    obj_bld: Bit(u16, 13),
+    obj_colour: Bit(u16, 13),
    raw: u16,
 };

@@ -657,24 +663,3 @@ pub const SoundBias = extern union {
    sampling_cycle: Bitfield(u16, 14, 2),
    raw: u16,
 };
-
-/// Read / Write
-pub const WaitControl = extern union {
-    sram_cnt: Bitfield(u16, 0, 2),
-    s0_first: Bitfield(u16, 2, 2),
-    s0_second: Bit(u16, 4),
-    s1_first: Bitfield(u16, 5, 2),
-    s1_second: Bit(u16, 7),
-    s2_first: Bitfield(u16, 8, 2),
-    s2_second: Bit(u16, 10),
-    phi_out: Bitfield(u16, 11, 2),
-
-    prefetch_enable: Bit(u16, 14),
-    pak_kind: Bit(u16, 15),
-    raw: u16,
-
-    pub fn set(self: *WaitControl, value: u16) void {
-        const mask: u16 = 0x8000; // set bits are read-only
-        self.raw = (self.raw & mask) | (value & ~mask);
-    }
-};
--- a/src/bus/timer.zig
+++ b/src/bus/timer.zig
@@ -0,0 +1,201 @@
+const std = @import("std");
+
+const TimerControl = @import("io.zig").TimerControl;
+const Io = @import("io.zig").Io;
+const Scheduler = @import("../scheduler.zig").Scheduler;
+const Event = @import("../scheduler.zig").Event;
+const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
+
+const readUndefined = @import("../util.zig").readUndefined;
+const writeUndefined = @import("../util.zig").writeUndefined;
+pub const TimerTuple = std.meta.Tuple(&[_]type{ Timer(0), Timer(1), Timer(2), Timer(3) });
+const log = std.log.scoped(.Timer);
+
+pub fn create(sched: *Scheduler) TimerTuple {
+    return .{ Timer(0).init(sched), Timer(1).init(sched), Timer(2).init(sched), Timer(3).init(sched) };
+}
+
+pub fn read(comptime T: type, tim: *const TimerTuple, addr: u32) T {
+    const nybble = @truncate(u4, addr);
+
+    return switch (T) {
+        u32 => switch (nybble) {
+            0x0 => @as(T, tim.*[0].cnt.raw) << 16 | tim.*[0].getCntL(),
+            0x4 => @as(T, tim.*[1].cnt.raw) << 16 | tim.*[1].getCntL(),
+            0x8 => @as(T, tim.*[2].cnt.raw) << 16 | tim.*[2].getCntL(),
+            0xC => @as(T, tim.*[3].cnt.raw) << 16 | tim.*[3].getCntL(),
+            else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
+        },
+        u16 => switch (nybble) {
+            0x0 => tim.*[0].getCntL(),
+            0x2 => tim.*[0].cnt.raw,
+            0x4 => tim.*[1].getCntL(),
+            0x6 => tim.*[1].cnt.raw,
+            0x8 => tim.*[2].getCntL(),
+            0xA => tim.*[2].cnt.raw,
+            0xC => tim.*[3].getCntL(),
+            0xE => tim.*[3].cnt.raw,
+            else => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
+        },
+        u8 => readUndefined(log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, addr }),
+        else => @compileError("TIM: Unsupported read width"),
+    };
+}
+
+pub fn write(comptime T: type, tim: *TimerTuple, addr: u32, value: T) void {
+    const nybble = @truncate(u4, addr);
+
+    return switch (T) {
+        u32 => switch (nybble) {
+            0x0 => tim.*[0].setCnt(value),
+            0x4 => tim.*[1].setCnt(value),
+            0x8 => tim.*[2].setCnt(value),
+            0xC => tim.*[3].setCnt(value),
+            else => writeUndefined(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
+        },
+        u16 => switch (nybble) {
+            0x0 => tim.*[0].setCntL(value),
+            0x2 => tim.*[0].setCntH(value),
+            0x4 => tim.*[1].setCntL(value),
+            0x6 => tim.*[1].setCntH(value),
+            0x8 => tim.*[2].setCntL(value),
+            0xA => tim.*[2].setCntH(value),
+            0xC => tim.*[3].setCntL(value),
+            0xE => tim.*[3].setCntH(value),
+            else => writeUndefined(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
+        },
+        u8 => writeUndefined(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
+        else => @compileError("TIM: Unsupported write width"),
+    };
+}
+
+fn Timer(comptime id: u2) type {
+    return struct {
+        const Self = @This();
+
+        /// Read Only, Internal. Please use self.getCntL()
+        _counter: u16,
+
+        /// Write Only, Internal. Please use self.setCntL()
+        _reload: u16,
+
+        /// Write Only, Internal. Please use self.setCntH()
+        cnt: TimerControl,
+
+        /// Internal.
+        sched: *Scheduler,
+
+        /// Internal
+        _start_timestamp: u64,
+
+        pub fn init(sched: *Scheduler) Self {
+            return .{
+                ._reload = 0,
+                ._counter = 0,
+                .cnt = .{ .raw = 0x0000 },
+                .sched = sched,
+                ._start_timestamp = 0,
+            };
+        }
+
+        /// TIMCNT_L
+        pub fn getCntL(self: *const Self) u16 {
+            if (self.cnt.cascade.read() or !self.cnt.enabled.read()) return self._counter;
+
+            return self._counter +% @truncate(u16, (self.sched.now() - self._start_timestamp) / self.frequency());
+        }
+
+        /// TIMCNT_L
+        pub fn setCntL(self: *Self, halfword: u16) void {
+            self._reload = halfword;
+        }
+
+        /// TIMCNT_L & TIMCNT_H
+        pub fn setCnt(self: *Self, word: u32) void {
+            self.setCntL(@truncate(u16, word));
+            self.setCntH(@truncate(u16, word >> 16));
+        }
+
+        /// TIMCNT_H
+        pub fn setCntH(self: *Self, halfword: u16) void {
+            const new = TimerControl{ .raw = halfword };
+
+            // If Timer happens to be enabled, It will either be resheduled or disabled
+            self.sched.removeScheduledEvent(.{ .TimerOverflow = id });
+
+            if (self.cnt.enabled.read() and (new.cascade.read() or !new.enabled.read())) {
+                // Either through the cascade bit or the enable bit, the timer has effectively been disabled
+                // The Counter should hold whatever value it should have been at when it was disabled
+                self._counter +%= @truncate(u16, (self.sched.now() - self._start_timestamp) / self.frequency());
+            }
+
+            // The counter is only reloaded on the rising edge of the enable bit
+            if (!self.cnt.enabled.read() and new.enabled.read()) self._counter = self._reload;
+
+            // If Timer is enabled and we're not cascading, we need to schedule an overflow event
+            if (new.enabled.read() and !new.cascade.read()) self.scheduleOverflow(0);
+
+            self.cnt.raw = halfword;
+        }
+
+        pub fn handleOverflow(self: *Self, cpu: *Arm7tdmi, late: u64) void {
+            // Fire IRQ if enabled
+            const io = &cpu.bus.io;
+
+            if (self.cnt.irq.read()) {
+                switch (id) {
+                    0 => io.irq.tim0.set(),
+                    1 => io.irq.tim1.set(),
+                    2 => io.irq.tim2.set(),
+                    3 => io.irq.tim3.set(),
+                }
+
+                cpu.handleInterrupt();
+            }
+
+            // DMA Sound Things
+            if (id == 0 or id == 1) {
+                cpu.bus.apu.handleTimerOverflow(cpu, id);
+            }
+
+            // Perform Cascade Behaviour
+            switch (id) {
+                0 => if (cpu.bus.tim[1].cnt.cascade.read()) {
+                    cpu.bus.tim[1]._counter +%= 1;
+                    if (cpu.bus.tim[1]._counter == 0) cpu.bus.tim[1].handleOverflow(cpu, late);
+                },
+                1 => if (cpu.bus.tim[2].cnt.cascade.read()) {
+                    cpu.bus.tim[2]._counter +%= 1;
+                    if (cpu.bus.tim[2]._counter == 0) cpu.bus.tim[2].handleOverflow(cpu, late);
+                },
+                2 => if (cpu.bus.tim[3].cnt.cascade.read()) {
+                    cpu.bus.tim[3]._counter +%= 1;
+                    if (cpu.bus.tim[3]._counter == 0) cpu.bus.tim[3].handleOverflow(cpu, late);
+                },
+                3 => {}, // There is no Timer for TIM3 to "cascade" to,
+            }
+
+            // Reschedule Timer if we're not cascading
+            if (!self.cnt.cascade.read()) {
+                self._counter = self._reload;
+                self.scheduleOverflow(late);
+            }
+        }
+
+        fn scheduleOverflow(self: *Self, late: u64) void {
+            const when = (@as(u64, 0x10000) - self._counter) * self.frequency();
+
+            self._start_timestamp = self.sched.now();
+            self.sched.push(.{ .TimerOverflow = id }, when -| late);
+        }
+
+        fn frequency(self: *const Self) u16 {
+            return switch (self.cnt.frequency.read()) {
+                0 => 1,
+                1 => 64,
+                2 => 256,
+                3 => 1024,
+            };
+        }
+    };
+}
--- a/src/config.zig
+++ b/src/config.zig
@@ -1,63 +0,0 @@
-const std = @import("std");
-const tomlz = @import("tomlz");
-
-const Allocator = std.mem.Allocator;
-
-const log = std.log.scoped(.Config);
-var state: Config = .{};
-
-const Config = struct {
-    // FIXME: tomlz expects these to be case sensitive
-    host: Host = .{},
-    guest: Guest = .{},
-    debug: Debug = .{},
-
-    /// Settings related to the Computer the Emulator is being run on
-    const Host = struct {
-        /// Using Nearest-Neighbor, multiply the resolution of the GBA Window
-        win_scale: i64 = 3,
-        /// Enable Vsync
-        ///
-        /// Note: This does not affect whether Emulation is synced to 59Hz
-        vsync: bool = true,
-        /// Mute ZBA
-        mute: bool = false,
-    };
-
-    // Settings realted to the emulation itself
-    const Guest = struct {
-        /// Whether Emulation thread to sync to Audio Callbacks
-        audio_sync: bool = true,
-        /// Whether Emulation thread should sync to 59Hz
-        video_sync: bool = true,
-        /// Whether RTC I/O should always be enabled
-        force_rtc: bool = false,
-        /// Skip BIOS
-        skip_bios: bool = false,
-    };
-
-    /// Settings related to debugging ZBA
-    const Debug = struct {
-        /// Enable CPU Trace logs
-        cpu_trace: bool = false,
-        /// If false and ZBA is built in debug mode, ZBA will panic on unhandled I/O
-        unhandled_io: bool = true,
-    };
-};
-
-pub fn config() *const Config {
-    return &state;
-}
-
-/// Reads a config file and then loads it into the global state
-pub fn load(allocator: Allocator, file_path: []const u8) !void {
-    var config_file = try std.fs.cwd().openFile(file_path, .{});
-    defer config_file.close();
-
-    log.info("loaded from {s}", .{file_path});
-
-    const contents = try config_file.readToEndAlloc(allocator, try config_file.getEndPos());
-    defer allocator.free(contents);
-
-    state = try tomlz.parser.decode(Config, allocator, contents);
-}
--- a/src/core/Bus.zig
+++ b/src/core/Bus.zig
@@ -1,537 +0,0 @@
-const std = @import("std");
-
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const Bios = @import("bus/Bios.zig");
-const Ewram = @import("bus/Ewram.zig");
-const GamePak = @import("bus/GamePak.zig");
-const Io = @import("bus/io.zig").Io;
-const Iwram = @import("bus/Iwram.zig");
-const Ppu = @import("ppu.zig").Ppu;
-const Apu = @import("apu.zig").Apu;
-const DmaTuple = @import("bus/dma.zig").DmaTuple;
-const TimerTuple = @import("bus/timer.zig").TimerTuple;
-const Scheduler = @import("scheduler.zig").Scheduler;
-const FilePaths = @import("../util.zig").FilePaths;
-
-const io = @import("bus/io.zig");
-const Allocator = std.mem.Allocator;
-const log = std.log.scoped(.Bus);
-
-const createDmaTuple = @import("bus/dma.zig").create;
-const createTimerTuple = @import("bus/timer.zig").create;
-const rotr = @import("zba-util").rotr;
-
-const timings: [2][0x10]u8 = [_][0x10]u8{
-    // BIOS, Unused, EWRAM, IWRAM, I/0, PALRAM, VRAM, OAM, ROM0, ROM0, ROM1, ROM1, ROM2, ROM2, SRAM, Unused
-    [_]u8{ 1, 1, 3, 1, 1, 1, 1, 1, 5, 5, 5, 5, 5, 5, 5, 5 }, // 8-bit & 16-bit
-    [_]u8{ 1, 1, 6, 1, 1, 2, 2, 1, 8, 8, 8, 8, 8, 8, 8, 8 }, // 32-bit
-};
-
-pub const fetch_timings: [2][0x10]u8 = [_][0x10]u8{
-    // BIOS, Unused, EWRAM, IWRAM, I/0, PALRAM, VRAM, OAM, ROM0, ROM0, ROM1, ROM1, ROM2, ROM2, SRAM, Unused
-    [_]u8{ 1, 1, 3, 1, 1, 1, 1, 1, 2, 2, 2, 2, 2, 2, 5, 5 }, // 8-bit & 16-bit
-    [_]u8{ 1, 1, 6, 1, 1, 2, 2, 1, 4, 4, 4, 4, 4, 4, 8, 8 }, // 32-bit
-};
-
-// Fastmem Related
-const page_size = 1 * 0x400; // 1KiB
-const address_space_size = 0x1000_0000;
-const table_len = address_space_size / page_size;
-
-const Self = @This();
-
-pak: GamePak,
-bios: Bios,
-ppu: Ppu,
-apu: Apu,
-dma: DmaTuple,
-tim: TimerTuple,
-iwram: Iwram,
-ewram: Ewram,
-io: Io,
-
-cpu: *Arm7tdmi,
-sched: *Scheduler,
-
-read_table: *const [table_len]?*const anyopaque,
-write_tables: [2]*const [table_len]?*anyopaque,
-allocator: Allocator,
-
-pub fn init(self: *Self, allocator: Allocator, sched: *Scheduler, cpu: *Arm7tdmi, paths: FilePaths) !void {
-    const tables = try allocator.alloc(?*anyopaque, 3 * table_len); // Allocate all tables
-
-    const read_table = tables[0..table_len];
-    const write_tables = .{ tables[table_len .. 2 * table_len], tables[2 * table_len .. 3 * table_len] };
-
-    self.* = .{
-        .pak = try GamePak.init(allocator, cpu, paths.rom, paths.save),
-        .bios = try Bios.init(allocator, paths.bios),
-        .ppu = try Ppu.init(allocator, sched),
-        .apu = Apu.init(sched),
-        .iwram = try Iwram.init(allocator),
-        .ewram = try Ewram.init(allocator),
-        .dma = createDmaTuple(),
-        .tim = createTimerTuple(sched),
-        .io = Io.init(),
-        .cpu = cpu,
-        .sched = sched,
-
-        .read_table = read_table,
-        .write_tables = write_tables,
-        .allocator = allocator,
-    };
-
-    self.fillReadTable(read_table);
-
-    // Internal Display Memory behaves differently on 8-bit reads
-    self.fillWriteTable(u32, write_tables[0]);
-    self.fillWriteTable(u8, write_tables[1]);
-}
-
-pub fn deinit(self: *Self) void {
-    self.iwram.deinit();
-    self.ewram.deinit();
-    self.pak.deinit();
-    self.bios.deinit();
-    self.ppu.deinit();
-
-    // This is so I can deallocate the original `allocator.alloc`. I have to re-make the type
-    // since I'm not keeping it around, This is very jank and bad though
-    // FIXME: please figure out another way
-    self.allocator.free(@as([*]const ?*anyopaque, @ptrCast(self.read_table[0..]))[0 .. 3 * table_len]);
-    self.* = undefined;
-}
-
-pub fn reset(self: *Self) void {
-    self.bios.reset();
-    self.ppu.reset();
-    self.apu.reset();
-    self.iwram.reset();
-    self.ewram.reset();
-
-    // https://github.com/ziglang/zig/issues/14705
-    {
-        comptime var i: usize = 0;
-        inline while (i < self.dma.len) : (i += 1) {
-            self.dma[0].reset();
-        }
-    }
-
-    // https://github.com/ziglang/zig/issues/14705
-    {
-        comptime var i: usize = 0;
-        inline while (i < self.tim.len) : (i += 1) {
-            self.tim[0].reset();
-        }
-    }
-
-    self.io.reset();
-}
-
-pub fn replaceGamepak(self: *Self, file_path: []const u8) !void {
-    // Note: `save_path` isn't owned by `Backup`
-    const save_path = self.pak.backup.save_path;
-    self.pak.deinit();
-
-    self.pak = try GamePak.init(self.allocator, self.cpu, file_path, save_path);
-
-    const read_ptr: *[table_len]?*const anyopaque = @constCast(self.read_table);
-    const write_ptrs: [2]*[table_len]?*anyopaque = .{ @constCast(self.write_tables[0]), @constCast(self.write_tables[1]) };
-
-    self.fillReadTable(read_ptr);
-    self.fillWriteTable(u32, write_ptrs[0]);
-    self.fillWriteTable(u8, write_ptrs[1]);
-}
-
-fn fillReadTable(self: *Self, table: *[table_len]?*const anyopaque) void {
-    const vramMirror = @import("ppu/Vram.zig").mirror;
-
-    for (table, 0..) |*ptr, i| {
-        const addr: u32 = @intCast(page_size * i);
-
-        ptr.* = switch (addr) {
-            // General Internal Memory
-            0x0000_0000...0x0000_3FFF => null, // BIOS has it's own checks
-            0x0200_0000...0x02FF_FFFF => &self.ewram.buf[addr & 0x3FFFF],
-            0x0300_0000...0x03FF_FFFF => &self.iwram.buf[addr & 0x7FFF],
-            0x0400_0000...0x0400_03FF => null, // I/O
-
-            // Internal Display Memory
-            0x0500_0000...0x05FF_FFFF => &self.ppu.palette.buf[addr & 0x3FF],
-            0x0600_0000...0x06FF_FFFF => &self.ppu.vram.buf[vramMirror(addr)],
-            0x0700_0000...0x07FF_FFFF => &self.ppu.oam.buf[addr & 0x3FF],
-
-            // External Memory (Game Pak)
-            0x0800_0000...0x0DFF_FFFF => self.fillReadTableExternal(addr),
-            0x0E00_0000...0x0FFF_FFFF => null, // SRAM
-            else => null,
-        };
-    }
-}
-
-fn fillWriteTable(self: *Self, comptime T: type, table: *[table_len]?*const anyopaque) void {
-    comptime std.debug.assert(T == u32 or T == u16 or T == u8);
-    const vramMirror = @import("ppu/Vram.zig").mirror;
-
-    for (table, 0..) |*ptr, i| {
-        const addr: u32 = @intCast(page_size * i);
-
-        ptr.* = switch (addr) {
-            // General Internal Memory
-            0x0000_0000...0x0000_3FFF => null, // BIOS has it's own checks
-            0x0200_0000...0x02FF_FFFF => &self.ewram.buf[addr & 0x3FFFF],
-            0x0300_0000...0x03FF_FFFF => &self.iwram.buf[addr & 0x7FFF],
-            0x0400_0000...0x0400_03FF => null, // I/O
-
-            // Internal Display Memory
-            0x0500_0000...0x05FF_FFFF => if (T != u8) &self.ppu.palette.buf[addr & 0x3FF] else null,
-            0x0600_0000...0x06FF_FFFF => if (T != u8) &self.ppu.vram.buf[vramMirror(addr)] else null,
-            0x0700_0000...0x07FF_FFFF => if (T != u8) &self.ppu.oam.buf[addr & 0x3FF] else null,
-
-            // External Memory (Game Pak)
-            0x0800_0000...0x0DFF_FFFF => null, // ROM
-            0x0E00_0000...0x0FFF_FFFF => null, // SRAM
-            else => null,
-        };
-    }
-}
-
-fn fillReadTableExternal(self: *Self, addr: u32) ?*anyopaque {
-    // see `GamePak.zig` for more information about what conditions need to be true
-    // so that a simple pointer dereference isn't possible
-
-    std.debug.assert(addr & @as(u32, page_size - 1) == 0); // addr is guaranteed to be page-aligned
-
-    const start_addr = addr;
-    const end_addr = start_addr + page_size;
-
-    {
-        const data = start_addr <= 0x0800_00C4 and 0x0800_00C4 < end_addr; // GPIO Data
-        const direction = start_addr <= 0x0800_00C6 and 0x0800_00C6 < end_addr; // GPIO Direction
-        const control = start_addr <= 0x0800_00C8 and 0x0800_00C8 < end_addr; // GPIO Control
-
-        const has_gpio = data or direction or control;
-        const gpio_kind = self.pak.gpio.device.kind;
-
-        // There is a GPIO Device, and the current page contains at least one memory-mapped GPIO register
-        if (gpio_kind != .None and has_gpio) return null;
-    }
-
-    if (self.pak.backup.kind == .Eeprom) {
-        if (self.pak.buf.len > 0x100_000) {
-            // We are using a "large" EEPROM which means that if the below check is true
-            // this page has an address that's reserved for the EEPROM and therefore must
-            // be handled in slowmem
-            if (addr & 0x1FF_FFFF > 0x1FF_FEFF) return null;
-        } else {
-            // We are using a "small" EEPROM which means that if the below check is true
-            // (that is, we're in the 0xD address page) then we must handle at least one
-            // address in this page in slowmem
-            if (@as(u4, @truncate(addr >> 24)) == 0xD) return null;
-        }
-    }
-
-    // Finally, the GamePak has some unique behaviour for reads past the end of the ROM,
-    // so those will be handled by slowmem as well
-    const masked_addr = addr & 0x1FF_FFFF;
-    if (masked_addr >= self.pak.buf.len) return null;
-
-    return &self.pak.buf[masked_addr];
-}
-
-fn readIo(self: *const Self, comptime T: type, address: u32) T {
-    return io.read(self, T, address) orelse self.openBus(T, address);
-}
-
-fn openBus(self: *const Self, comptime T: type, address: u32) T {
-    @setCold(true);
-    const r15 = self.cpu.r[15];
-
-    const word = blk: {
-        // If Arm, get the most recently fetched instruction (PC + 8)
-        //
-        // FIXME: This is most likely a faulty assumption.
-        // I think what *actually* happens is that the Bus has a latch for the most
-        // recently fetched piece of data, which is then returned during Open Bus (also DMA open bus?)
-        // I can "get away" with this because it's very statistically likely that the most recently latched value is
-        // the most recently fetched instruction by the pipeline
-        if (!self.cpu.cpsr.t.read()) break :blk self.cpu.pipe.stage[1].?;
-
-        const page: u8 = @truncate(r15 >> 24);
-
-        // PC + 2 = stage[0]
-        // PC + 4 = stage[1]
-        // PC + 6 = Need a Debug Read for this?
-
-        switch (page) {
-            // EWRAM, PALRAM, VRAM, and Game ROM (16-bit)
-            0x02, 0x05, 0x06, 0x08...0x0D => {
-                const halfword: u32 = @as(u16, @truncate(self.cpu.pipe.stage[1].?));
-                break :blk halfword << 16 | halfword;
-            },
-
-            // BIOS or OAM (32-bit)
-            0x00, 0x07 => {
-                // Aligned: (PC + 6) | (PC + 4)
-                // Unaligned: (PC + 4) | (PC + 2)
-                const aligned = address & 3 == 0b00;
-
-                // TODO: What to do on PC + 6?
-                const high: u32 = if (aligned) self.dbgRead(u16, r15 + 4) else @as(u16, @truncate(self.cpu.pipe.stage[1].?));
-                const low: u32 = @as(u16, @truncate(self.cpu.pipe.stage[@intFromBool(aligned)].?));
-
-                break :blk high << 16 | low;
-            },
-
-            // IWRAM (16-bit but special)
-            0x03 => {
-                // Aligned: (PC + 2) | (PC + 4)
-                // Unaligned: (PC + 4) | (PC + 2)
-                const aligned = address & 3 == 0b00;
-
-                const high: u32 = @as(u16, @truncate(self.cpu.pipe.stage[1 - @intFromBool(aligned)].?));
-                const low: u32 = @as(u16, @truncate(self.cpu.pipe.stage[@intFromBool(aligned)].?));
-
-                break :blk high << 16 | low;
-            },
-            else => {
-                log.err("THUMB open bus read from 0x{X:0>2} page @0x{X:0>8}", .{ page, address });
-                @panic("invariant most-likely broken");
-            },
-        }
-    };
-
-    return @truncate(word);
-}
-
-pub fn read(self: *Self, comptime T: type, unaligned_address: u32) T {
-    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
-    const page = unaligned_address >> bits;
-    const offset = unaligned_address & (page_size - 1);
-
-    // whether or not we do this in slowmem or fastmem, we should advance the scheduler
-    self.sched.tick += timings[@intFromBool(T == u32)][@as(u4, @truncate(unaligned_address >> 24))];
-
-    // We're doing some serious out-of-bounds open-bus reads
-    if (page >= table_len) return self.openBus(T, unaligned_address);
-
-    if (self.read_table[page]) |some_ptr| {
-        // We have a pointer to a page, cast the pointer to it's underlying type
-        const ptr: [*]const T = @ptrCast(@alignCast(some_ptr));
-
-        // Note: We don't check array length, since we force align the
-        // lower bits of the address as the GBA would
-        return ptr[forceAlign(T, offset) / @sizeOf(T)];
-    }
-
-    return self.slowRead(T, unaligned_address);
-}
-
-pub fn dbgRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
-    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
-    const page = unaligned_address >> bits;
-    const offset = unaligned_address & (page_size - 1);
-
-    // We're doing some serious out-of-bounds open-bus reads
-    if (page >= table_len) return self.openBus(T, unaligned_address);
-
-    if (self.read_table[page]) |some_ptr| {
-        // We have a pointer to a page, cast the pointer to it's underlying type
-        const ptr: [*]const T = @ptrCast(@alignCast(some_ptr));
-
-        // Note: We don't check array length, since we force align the
-        // lower bits of the address as the GBA would
-        return ptr[forceAlign(T, offset) / @sizeOf(T)];
-    }
-
-    return self.dbgSlowRead(T, unaligned_address);
-}
-
-fn slowRead(self: *Self, comptime T: type, unaligned_address: u32) T {
-    @setCold(true);
-
-    const page: u8 = @truncate(unaligned_address >> 24);
-    const address = forceAlign(T, unaligned_address);
-
-    return switch (page) {
-        // General Internal Memory
-        0x00 => blk: {
-            if (address < Bios.size)
-                break :blk self.bios.read(T, self.cpu.r[15], unaligned_address);
-
-            break :blk self.openBus(T, address);
-        },
-        0x02 => unreachable, // completely handled by fastmeme
-        0x03 => unreachable, // completely handled by fastmeme
-        0x04 => self.readIo(T, address),
-
-        // Internal Display Memory
-        0x05 => unreachable, // completely handled by fastmeme
-        0x06 => unreachable, // completely handled by fastmeme
-        0x07 => unreachable, // completely handled by fastmeme
-
-        // External Memory (Game Pak)
-        0x08...0x0D => self.pak.read(T, address),
-        0x0E...0x0F => self.readBackup(T, unaligned_address),
-        else => self.openBus(T, address),
-    };
-}
-
-fn dbgSlowRead(self: *const Self, comptime T: type, unaligned_address: u32) T {
-    const page: u8 = @truncate(unaligned_address >> 24);
-    const address = forceAlign(T, unaligned_address);
-
-    return switch (page) {
-        // General Internal Memory
-        0x00 => blk: {
-            if (address < Bios.size)
-                break :blk self.bios.dbgRead(T, self.cpu.r[15], unaligned_address);
-
-            break :blk self.openBus(T, address);
-        },
-        0x02 => unreachable, // handled by fastmem
-        0x03 => unreachable, // handled by fastmem
-        0x04 => self.readIo(T, address),
-
-        // Internal Display Memory
-        0x05 => unreachable, // handled by fastmem
-        0x06 => unreachable, // handled by fastmem
-        0x07 => unreachable, // handled by fastmem
-
-        // External Memory (Game Pak)
-        0x08...0x0D => self.pak.dbgRead(T, address),
-        0x0E...0x0F => self.readBackup(T, unaligned_address),
-        else => self.openBus(T, address),
-    };
-}
-
-fn readBackup(self: *const Self, comptime T: type, unaligned_address: u32) T {
-    const value = self.pak.backup.read(unaligned_address);
-
-    const multiplier = switch (T) {
-        u32 => 0x01010101,
-        u16 => 0x0101,
-        u8 => 1,
-        else => @compileError("Backup: Unsupported read width"),
-    };
-
-    return @as(T, value) * multiplier;
-}
-
-pub fn write(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
-    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
-    const page = unaligned_address >> bits;
-    const offset = unaligned_address & (page_size - 1);
-
-    // whether or not we do this in slowmem or fastmem, we should advance the scheduler
-    self.sched.tick += timings[@intFromBool(T == u32)][@as(u4, @truncate(unaligned_address >> 24))];
-
-    // We're doing some serious out-of-bounds open-bus writes, they do nothing though
-    if (page >= table_len) return;
-
-    if (self.write_tables[@intFromBool(T == u8)][page]) |some_ptr| {
-        // We have a pointer to a page, cast the pointer to it's underlying type
-        const ptr: [*]T = @ptrCast(@alignCast(some_ptr));
-
-        // Note: We don't check array length, since we force align the
-        // lower bits of the address as the GBA would
-        ptr[forceAlign(T, offset) / @sizeOf(T)] = value;
-    } else {
-        // we can return early if this is an 8-bit OAM write
-        if (T == u8 and @as(u8, @truncate(unaligned_address >> 24)) == 0x07) return;
-
-        self.slowWrite(T, unaligned_address, value);
-    }
-}
-
-/// Mostly Identical to `Bus.write`, slowmeme is handled by `Bus.dbgSlowWrite`
-pub fn dbgWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
-    const bits = @typeInfo(std.math.IntFittingRange(0, page_size - 1)).Int.bits;
-    const page = unaligned_address >> bits;
-    const offset = unaligned_address & (page_size - 1);
-
-    // We're doing some serious out-of-bounds open-bus writes, they do nothing though
-    if (page >= table_len) return;
-
-    if (self.write_tables[@intFromBool(T == u8)][page]) |some_ptr| {
-        // We have a pointer to a page, cast the pointer to it's underlying type
-        const ptr: [*]T = @ptrCast(@alignCast(some_ptr));
-
-        // Note: We don't check array length, since we force align the
-        // lower bits of the address as the GBA would
-        ptr[forceAlign(T, offset) / @sizeOf(T)] = value;
-    } else {
-        // we can return early if this is an 8-bit OAM write
-        if (T == u8 and @as(u8, @truncate(unaligned_address >> 24)) == 0x07) return;
-
-        self.dbgSlowWrite(T, unaligned_address, value);
-    }
-}
-
-fn slowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
-    @setCold(true);
-
-    const page: u8 = @truncate(unaligned_address >> 24);
-    const address = forceAlign(T, unaligned_address);
-
-    switch (page) {
-        // General Internal Memory
-        0x00 => self.bios.write(T, address, value),
-        0x02 => unreachable, // completely handled by fastmem
-        0x03 => unreachable, // completely handled by fastmem
-        0x04 => io.write(self, T, address, value),
-
-        // Internal Display Memory
-        0x05 => self.ppu.palette.write(T, address, value),
-        0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, address, value),
-        0x07 => unreachable, // completely handled by fastmem
-
-        // External Memory (Game Pak)
-        0x08...0x0D => self.pak.write(T, self.dma[3].word_count, address, value),
-        0x0E...0x0F => self.pak.backup.write(unaligned_address, @truncate(rotr(T, value, 8 * rotateBy(T, unaligned_address)))),
-        else => {},
-    }
-}
-
-fn dbgSlowWrite(self: *Self, comptime T: type, unaligned_address: u32, value: T) void {
-    @setCold(true);
-
-    const page: u8 = @truncate(unaligned_address >> 24);
-    const address = forceAlign(T, unaligned_address);
-
-    switch (page) {
-        // General Internal Memory
-        0x00 => self.bios.write(T, address, value),
-        0x02 => unreachable, // completely handled by fastmem
-        0x03 => unreachable, // completely handled by fastmem
-        0x04 => return, // FIXME: Let debug writes mess with I/O
-
-        // Internal Display Memory
-        0x05 => self.ppu.palette.write(T, address, value),
-        0x06 => self.ppu.vram.write(T, self.ppu.dispcnt, address, value),
-        0x07 => unreachable, // completely handled by fastmem
-
-        // External Memory (Game Pak)
-        0x08...0x0D => return, // FIXME: Debug Write to Backup/GPIO w/out messing with state
-        0x0E...0x0F => return, // FIXME: Debug Write to Backup w/out messing with state
-        else => {},
-    }
-}
-
-inline fn rotateBy(comptime T: type, address: u32) u32 {
-    return switch (T) {
-        u32 => address & 3,
-        u16 => address & 1,
-        u8 => 0,
-        else => @compileError("Unsupported write width"),
-    };
-}
-
-pub inline fn forceAlign(comptime T: type, address: u32) u32 {
-    return switch (T) {
-        u32 => address & ~@as(u32, 3),
-        u16 => address & ~@as(u32, 1),
-        u8 => address,
-        else => @compileError("Bus: Invalid read/write type"),
-    };
-}
--- a/src/core/apu.zig
+++ b/src/core/apu.zig
@@ -1,620 +0,0 @@
-const std = @import("std");
-const SDL = @import("sdl2");
-const io = @import("bus/io.zig");
-const util = @import("../util.zig");
-
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const Bus = @import("Bus.zig");
-const Scheduler = @import("scheduler.zig").Scheduler;
-const ToneSweep = @import("apu/ToneSweep.zig");
-const Tone = @import("apu/Tone.zig");
-const Wave = @import("apu/Wave.zig");
-const Noise = @import("apu/Noise.zig");
-
-const SoundFifo = std.fifo.LinearFifo(u8, .{ .Static = 0x20 });
-
-const getHalf = util.getHalf;
-const setHalf = util.setHalf;
-
-const log = std.log.scoped(.APU);
-
-pub const host_rate = @import("../platform.zig").sample_rate;
-pub const host_format = @import("../platform.zig").sample_format;
-
-pub fn read(comptime T: type, apu: *const Apu, addr: u32) ?T {
-    const byte_addr: u8 = @truncate(addr);
-
-    return switch (T) {
-        u32 => switch (byte_addr) {
-            0x60 => @as(T, apu.ch1.sound1CntH()) << 16 | apu.ch1.sound1CntL(),
-            0x64 => apu.ch1.sound1CntX(),
-            0x68 => apu.ch2.sound2CntL(),
-            0x6C => apu.ch2.sound2CntH(),
-            0x70 => @as(T, apu.ch3.sound3CntH()) << 16 | apu.ch3.sound3CntL(),
-            0x74 => apu.ch3.sound3CntX(),
-            0x78 => apu.ch4.sound4CntL(),
-            0x7C => apu.ch4.sound4CntH(),
-            0x80 => @as(T, apu.dma_cnt.raw) << 16 | apu.psg_cnt.raw, // SOUNDCNT_H, SOUNDCNT_L
-            0x84 => apu.soundCntX(),
-            0x88 => apu.bias.raw, // SOUNDBIAS, high is unused
-            0x8C => null,
-            0x90, 0x94, 0x98, 0x9C => apu.ch3.wave_dev.read(T, apu.ch3.select, addr),
-            0xA0 => null, // FIFO_A
-            0xA4 => null, // FIFO_B
-            else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
-        },
-        u16 => switch (byte_addr) {
-            0x60 => apu.ch1.sound1CntL(),
-            0x62 => apu.ch1.sound1CntH(),
-            0x64 => apu.ch1.sound1CntX(),
-            0x66 => 0x0000, // suite.gba expects 0x0000, not 0xDEAD
-            0x68 => apu.ch2.sound2CntL(),
-            0x6A => 0x0000,
-            0x6C => apu.ch2.sound2CntH(),
-            0x6E => 0x0000,
-            0x70 => apu.ch3.sound3CntL(),
-            0x72 => apu.ch3.sound3CntH(),
-            0x74 => apu.ch3.sound3CntX(),
-            0x76 => 0x0000,
-            0x78 => apu.ch4.sound4CntL(),
-            0x7A => 0x0000,
-            0x7C => apu.ch4.sound4CntH(),
-            0x7E => 0x0000,
-            0x80 => apu.soundCntL(),
-            0x82 => apu.soundCntH(),
-            0x84 => apu.soundCntX(),
-            0x86 => 0x0000,
-            0x88 => apu.bias.raw, // SOUNDBIAS
-            0x8A => 0x0000,
-            0x8C, 0x8E => null,
-            0x90, 0x92, 0x94, 0x96, 0x98, 0x9A, 0x9C, 0x9E => apu.ch3.wave_dev.read(T, apu.ch3.select, addr),
-            0xA0, 0xA2 => null, // FIFO_A
-            0xA4, 0xA6 => null, // FIFO_B
-            else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
-        },
-        u8 => switch (byte_addr) {
-            0x60, 0x61 => @truncate(@as(u16, apu.ch1.sound1CntL()) >> getHalf(byte_addr)),
-            0x62, 0x63 => @truncate(apu.ch1.sound1CntH() >> getHalf(byte_addr)),
-            0x64, 0x65 => @truncate(apu.ch1.sound1CntX() >> getHalf(byte_addr)),
-            0x66, 0x67 => 0x00, // assuming behaviour is identical to that of 16-bit reads
-            0x68, 0x69 => @truncate(apu.ch2.sound2CntL() >> getHalf(byte_addr)),
-            0x6A, 0x6B => 0x00,
-            0x6C, 0x6D => @truncate(apu.ch2.sound2CntH() >> getHalf(byte_addr)),
-            0x6E, 0x6F => 0x00,
-            0x70, 0x71 => @truncate(@as(u16, apu.ch3.sound3CntL()) >> getHalf(byte_addr)), // SOUND3CNT_L
-            0x72, 0x73 => @truncate(apu.ch3.sound3CntH() >> getHalf(byte_addr)),
-            0x74, 0x75 => @truncate(apu.ch3.sound3CntX() >> getHalf(byte_addr)), // SOUND3CNT_L
-            0x76, 0x77 => 0x00,
-            0x78, 0x79 => @truncate(apu.ch4.sound4CntL() >> getHalf(byte_addr)),
-            0x7A, 0x7B => 0x00,
-            0x7C, 0x7D => @truncate(apu.ch4.sound4CntH() >> getHalf(byte_addr)),
-            0x7E, 0x7F => 0x00,
-            0x80, 0x81 => @truncate(apu.soundCntL() >> getHalf(byte_addr)), // SOUNDCNT_L
-            0x82, 0x83 => @truncate(apu.soundCntH() >> getHalf(byte_addr)), // SOUNDCNT_H
-            0x84, 0x85 => @truncate(@as(u16, apu.soundCntX()) >> getHalf(byte_addr)),
-            0x86, 0x87 => 0x00,
-            0x88, 0x89 => @truncate(apu.bias.raw >> getHalf(byte_addr)), // SOUNDBIAS
-            0x8A, 0x8B => 0x00,
-            0x8C...0x8F => null,
-            0x90...0x9F => apu.ch3.wave_dev.read(T, apu.ch3.select, addr),
-            0xA0, 0xA1, 0xA2, 0xA3 => null, // FIFO_A
-            0xA4, 0xA5, 0xA6, 0xA7 => null, // FIFO_B
-            else => util.io.read.err(T, log, "unexpected {} read from 0x{X:0>8}", .{ T, addr }),
-        },
-        else => @compileError("APU: Unsupported read width"),
-    };
-}
-
-pub fn write(comptime T: type, apu: *Apu, addr: u32, value: T) void {
-    const byte_addr: u8 = @truncate(addr);
-
-    if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
-
-    switch (T) {
-        u32 => {
-            // 0x80 and 0x81 handled in setSoundCnt
-            if (byte_addr < 0x80 and !apu.cnt.apu_enable.read()) return;
-
-            switch (byte_addr) {
-                0x60 => apu.ch1.setSound1Cnt(value),
-                0x64 => apu.ch1.setSound1CntX(&apu.fs, @truncate(value)),
-
-                0x68 => apu.ch2.setSound2CntL(@truncate(value)),
-                0x6C => apu.ch2.setSound2CntH(&apu.fs, @truncate(value)),
-
-                0x70 => apu.ch3.setSound3Cnt(value),
-                0x74 => apu.ch3.setSound3CntX(&apu.fs, @truncate(value)),
-
-                0x78 => apu.ch4.setSound4CntL(@truncate(value)),
-                0x7C => apu.ch4.setSound4CntH(&apu.fs, @truncate(value)),
-
-                0x80 => apu.setSoundCnt(value),
-                0x84 => apu.setSoundCntX(value >> 7 & 1 == 1),
-                0x88 => apu.bias.raw = @truncate(value),
-                0x8C => {},
-
-                0x90, 0x94, 0x98, 0x9C => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
-                0xA0 => apu.chA.push(value), // FIFO_A
-                0xA4 => apu.chB.push(value), // FIFO_B
-                else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
-            }
-        },
-        u16 => {
-            if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
-
-            switch (byte_addr) {
-                0x60 => apu.ch1.setSound1CntL(@truncate(value)), // SOUND1CNT_L
-                0x62 => apu.ch1.setSound1CntH(value),
-                0x64 => apu.ch1.setSound1CntX(&apu.fs, value),
-                0x66 => {},
-
-                0x68 => apu.ch2.setSound2CntL(value),
-                0x6A => {},
-                0x6C => apu.ch2.setSound2CntH(&apu.fs, value),
-                0x6E => {},
-
-                0x70 => apu.ch3.setSound3CntL(@truncate(value)),
-                0x72 => apu.ch3.setSound3CntH(value),
-                0x74 => apu.ch3.setSound3CntX(&apu.fs, value),
-                0x76 => {},
-
-                0x78 => apu.ch4.setSound4CntL(value),
-                0x7A => {},
-                0x7C => apu.ch4.setSound4CntH(&apu.fs, value),
-                0x7E => {},
-
-                0x80 => apu.setSoundCntL(value),
-                0x82 => apu.setSoundCntH(value),
-                0x84 => apu.setSoundCntX(value >> 7 & 1 == 1),
-                0x86 => {},
-                0x88 => apu.bias.raw = value, // SOUNDBIAS
-                0x8A, 0x8C, 0x8E => {},
-
-                0x90, 0x92, 0x94, 0x96, 0x98, 0x9A, 0x9C, 0x9E => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
-                0xA0, 0xA2 => log.err("Tried to write 0x{X:0>4}{} to FIFO_A", .{ value, T }),
-                0xA4, 0xA6 => log.err("Tried to write 0x{X:0>4}{} to FIFO_B", .{ value, T }),
-                else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
-            }
-        },
-        u8 => {
-            if (byte_addr <= 0x81 and !apu.cnt.apu_enable.read()) return;
-
-            switch (byte_addr) {
-                0x60 => apu.ch1.setSound1CntL(value),
-                0x61 => {},
-                0x62 => apu.ch1.setNr11(value),
-                0x63 => apu.ch1.setNr12(value),
-                0x64 => apu.ch1.setNr13(value),
-                0x65 => apu.ch1.setNr14(&apu.fs, value),
-                0x66, 0x67 => {},
-
-                0x68 => apu.ch2.setNr21(value),
-                0x69 => apu.ch2.setNr22(value),
-                0x6A, 0x6B => {},
-                0x6C => apu.ch2.setNr23(value),
-                0x6D => apu.ch2.setNr24(&apu.fs, value),
-                0x6E, 0x6F => {},
-
-                0x70 => apu.ch3.setSound3CntL(value), // NR30
-                0x71 => {},
-                0x72 => apu.ch3.setNr31(value),
-                0x73 => apu.ch3.vol.raw = value, // NR32
-                0x74 => apu.ch3.setNr33(value),
-                0x75 => apu.ch3.setNr34(&apu.fs, value),
-                0x76, 0x77 => {},
-
-                0x78 => apu.ch4.setNr41(value),
-                0x79 => apu.ch4.setNr42(value),
-                0x7A, 0x7B => {},
-                0x7C => apu.ch4.poly.raw = value, // NR 43
-                0x7D => apu.ch4.setNr44(&apu.fs, value),
-                0x7E, 0x7F => {},
-
-                0x80, 0x81 => apu.setSoundCntL(setHalf(u16, apu.psg_cnt.raw, byte_addr, value)),
-                0x82, 0x83 => apu.setSoundCntH(setHalf(u16, apu.dma_cnt.raw, byte_addr, value)),
-                0x84 => apu.setSoundCntX(value >> 7 & 1 == 1),
-                0x85 => {},
-                0x86, 0x87 => {},
-                0x88, 0x89 => apu.bias.raw = setHalf(u16, apu.bias.raw, byte_addr, value), // SOUNDBIAS
-                0x8A...0x8F => {},
-
-                0x90...0x9F => apu.ch3.wave_dev.write(T, apu.ch3.select, addr, value),
-                0xA0...0xA3 => log.err("Tried to write 0x{X:0>2}{} to FIFO_A", .{ value, T }),
-                0xA4...0xA7 => log.err("Tried to write 0x{X:0>2}{} to FIFO_B", .{ value, T }),
-                else => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
-            }
-        },
-        else => @compileError("APU: Unsupported write width"),
-    }
-}
-
-pub const Apu = struct {
-    const Self = @This();
-
-    ch1: ToneSweep,
-    ch2: Tone,
-    ch3: Wave,
-    ch4: Noise,
-    chA: DmaSound(.A),
-    chB: DmaSound(.B),
-
-    bias: io.SoundBias,
-    /// NR50, NR51
-    psg_cnt: io.ChannelVolumeControl,
-    dma_cnt: io.DmaSoundControl,
-    cnt: io.SoundControl,
-
-    sampling_cycle: u2,
-
-    stream: *SDL.SDL_AudioStream,
-    sched: *Scheduler,
-
-    fs: FrameSequencer,
-    capacitor: f32,
-
-    is_buffer_full: bool,
-
-    pub const Tick = enum { Length, Envelope, Sweep };
-
-    pub fn init(sched: *Scheduler) Self {
-        const apu: Self = .{
-            .ch1 = ToneSweep.init(sched),
-            .ch2 = Tone.init(sched),
-            .ch3 = Wave.init(sched),
-            .ch4 = Noise.init(sched),
-            .chA = DmaSound(.A).init(),
-            .chB = DmaSound(.B).init(),
-
-            .psg_cnt = .{ .raw = 0 },
-            .dma_cnt = .{ .raw = 0 },
-            .cnt = .{ .raw = 0 },
-            .bias = .{ .raw = 0x0200 },
-
-            .sampling_cycle = 0b00,
-            .stream = SDL.SDL_NewAudioStream(SDL.AUDIO_U16, 2, 1 << 15, host_format, 2, host_rate).?,
-            .sched = sched,
-
-            .capacitor = 0,
-            .fs = FrameSequencer.init(),
-            .is_buffer_full = false,
-        };
-
-        Self.initEvents(apu.sched, apu.interval());
-
-        return apu;
-    }
-
-    fn initEvents(scheduler: *Scheduler, apu_interval: u64) void {
-        scheduler.push(.SampleAudio, apu_interval);
-        scheduler.push(.{ .ApuChannel = 0 }, @import("apu/signal/Square.zig").interval);
-        scheduler.push(.{ .ApuChannel = 1 }, @import("apu/signal/Square.zig").interval);
-        scheduler.push(.{ .ApuChannel = 2 }, @import("apu/signal/Wave.zig").interval);
-        scheduler.push(.{ .ApuChannel = 3 }, @import("apu/signal/Lfsr.zig").interval);
-        scheduler.push(.FrameSequencer, FrameSequencer.interval);
-    }
-
-    /// Used when resetting the emulator
-    pub fn reset(self: *Self) void {
-        // FIXME: These reset functions are meant to emulate obscure APU behaviour. Write proper emu reset fns
-        self.ch1.reset();
-        self.ch2.reset();
-        self.ch3.reset();
-        self.ch4.reset();
-
-        self.chA.reset();
-        self.chB.reset();
-
-        self.psg_cnt = .{ .raw = 0 };
-        self.dma_cnt = .{ .raw = 0 };
-        self.cnt = .{ .raw = 0 };
-        self.bias = .{ .raw = 0x200 };
-
-        self.sampling_cycle = 0;
-        self.fs.reset();
-
-        Self.initEvents(self.sched, self.interval());
-    }
-
-    /// Emulates the reset behaviour of the APU
-    fn _reset(self: *Self) void {
-        // All PSG Registers between 0x0400_0060..0x0400_0081 are zeroed
-        // 0x0400_0082 and 0x0400_0088 retain their values
-        self.ch1.reset();
-        self.ch2.reset();
-        self.ch3.reset();
-        self.ch4.reset();
-
-        // GBATEK says 4000060h..4000081h I take this to mean inclusive
-        self.psg_cnt.raw = 0x0000;
-    }
-
-    /// SOUNDCNT
-    fn setSoundCnt(self: *Self, value: u32) void {
-        if (self.cnt.apu_enable.read()) self.setSoundCntL(@truncate(value));
-        self.setSoundCntH(@truncate(value >> 16));
-    }
-
-    /// SOUNDCNT_L
-    pub fn soundCntL(self: *const Self) u16 {
-        return self.psg_cnt.raw & 0xFF77;
-    }
-
-    /// SOUNDCNT_L
-    pub fn setSoundCntL(self: *Self, value: u16) void {
-        self.psg_cnt.raw = value;
-    }
-
-    /// SOUNDCNT_H
-    pub fn setSoundCntH(self: *Self, value: u16) void {
-        const new: io.DmaSoundControl = .{ .raw = value };
-
-        // Reinitializing instead of resetting is fine because
-        // the FIFOs I'm using are stack allocated and 0x20 bytes big
-        if (new.chA_reset.read()) self.chA.fifo = SoundFifo.init();
-        if (new.chB_reset.read()) self.chB.fifo = SoundFifo.init();
-
-        self.dma_cnt = new;
-    }
-
-    /// SOUNDCNT_H
-    pub fn soundCntH(self: *const Self) u16 {
-        return self.dma_cnt.raw & 0x770F;
-    }
-
-    /// NR52
-    pub fn setSoundCntX(self: *Self, value: bool) void {
-        self.cnt.apu_enable.write(value);
-
-        if (value) {
-            self.fs.step = 0; // Reset Frame Sequencer
-
-            // Reset Square Wave Offsets
-            self.ch1.square.reset();
-            self.ch2.square.reset();
-
-            // Reset Wave
-            self.ch3.wave_dev.reset();
-
-            // Rest Noise
-            self.ch4.lfsr.reset();
-        } else {
-            self._reset();
-        }
-    }
-
-    /// NR52
-    pub fn soundCntX(self: *const Self) u8 {
-        const apu_enable: u8 = @intFromBool(self.cnt.apu_enable.read());
-
-        const ch1_enable: u8 = @intFromBool(self.ch1.enabled);
-        const ch2_enable: u8 = @intFromBool(self.ch2.enabled);
-        const ch3_enable: u8 = @intFromBool(self.ch3.enabled);
-        const ch4_enable: u8 = @intFromBool(self.ch4.enabled);
-
-        return apu_enable << 7 | ch4_enable << 3 | ch3_enable << 2 | ch2_enable << 1 | ch1_enable;
-    }
-
-    pub fn sampleAudio(self: *Self, late: u64) void {
-        self.sched.push(.SampleAudio, self.interval() -| late);
-
-        // Whether the APU is busy or not is determined  by the main loop in emu.zig
-        // This should only ever be true (because this side of the emu is single threaded)
-        // When audio sync is disaabled
-        if (self.is_buffer_full) return;
-
-        var left: i16 = 0;
-        var right: i16 = 0;
-
-        // SOUNDCNT_L Channel Enable flags
-        const ch_left: u4 = self.psg_cnt.ch_left.read();
-        const ch_right: u4 = self.psg_cnt.ch_right.read();
-
-        // Determine SOUNDCNT_H volume modifications
-        const gba_vol: u4 = switch (self.dma_cnt.ch_vol.read()) {
-            0b00 => 2,
-            0b01 => 1,
-            else => 0,
-        };
-
-        // Add all PSG channels together
-        left += if (ch_left & 1 == 1) @as(i16, self.ch1.sample) else 0;
-        left += if (ch_left >> 1 & 1 == 1) @as(i16, self.ch2.sample) else 0;
-        left += if (ch_left >> 2 & 1 == 1) @as(i16, self.ch3.sample) else 0;
-        left += if (ch_left >> 3 == 1) @as(i16, self.ch4.sample) else 0;
-
-        right += if (ch_right & 1 == 1) @as(i16, self.ch1.sample) else 0;
-        right += if (ch_right >> 1 & 1 == 1) @as(i16, self.ch2.sample) else 0;
-        right += if (ch_right >> 2 & 1 == 1) @as(i16, self.ch3.sample) else 0;
-        right += if (ch_right >> 3 == 1) @as(i16, self.ch4.sample) else 0;
-
-        // Multiply by master channel volume
-        left *= 1 + @as(i16, self.psg_cnt.left_vol.read());
-        right *= 1 + @as(i16, self.psg_cnt.right_vol.read());
-
-        // Apply GBA volume modifications to PSG Channels
-        left >>= gba_vol;
-        right >>= gba_vol;
-
-        const chA_sample = self.chA.amplitude() << if (self.dma_cnt.chA_vol.read()) @as(u4, 2) else 1;
-        const chB_sample = self.chB.amplitude() << if (self.dma_cnt.chB_vol.read()) @as(u4, 2) else 1;
-
-        left += if (self.dma_cnt.chA_left.read()) chA_sample else 0;
-        left += if (self.dma_cnt.chB_left.read()) chB_sample else 0;
-
-        right += if (self.dma_cnt.chA_right.read()) chA_sample else 0;
-        right += if (self.dma_cnt.chB_right.read()) chB_sample else 0;
-
-        // Add SOUNDBIAS
-        // FIXME: SOUNDBIAS is 10-bit but The waveform is centered around 0 if I treat it as 11-bit
-        const bias = @as(i16, self.bias.level.read()) << 2;
-        left += bias;
-        right += bias;
-
-        const clamped_left = std.math.clamp(@as(u16, @bitCast(left)), 0, std.math.maxInt(u11));
-        const clamped_right = std.math.clamp(@as(u16, @bitCast(right)), 0, std.math.maxInt(u11));
-
-        // Extend to 16-bit signed audio samples
-        const ext_left = (clamped_left << 5) | (clamped_left >> 6);
-        const ext_right = (clamped_right << 5) | (clamped_right >> 6);
-
-        if (self.sampling_cycle != self.bias.sampling_cycle.read()) self.replaceSDLResampler();
-
-        _ = SDL.SDL_AudioStreamPut(self.stream, &[2]u16{ ext_left, ext_right }, 2 * @sizeOf(u16));
-    }
-
-    fn replaceSDLResampler(self: *Self) void {
-        @setCold(true);
-        const sample_rate = Self.sampleRate(self.bias.sampling_cycle.read());
-        log.info("Sample Rate changed from {}Hz to {}Hz", .{ Self.sampleRate(self.sampling_cycle), sample_rate });
-
-        // Sampling Cycle (Sample Rate) changed, Craete a new SDL Audio Resampler
-        // FIXME: Replace SDL's Audio Resampler with either a custom or more reliable one
-        const old_stream = self.stream;
-        defer SDL.SDL_FreeAudioStream(old_stream);
-
-        self.sampling_cycle = self.bias.sampling_cycle.read();
-        self.stream = SDL.SDL_NewAudioStream(SDL.AUDIO_U16, 2, @intCast(sample_rate), host_format, 2, host_rate).?;
-    }
-
-    fn interval(self: *const Self) u64 {
-        return (1 << 24) / Self.sampleRate(self.bias.sampling_cycle.read());
-    }
-
-    fn sampleRate(cycle: u2) u64 {
-        return @as(u64, 1) << (15 + @as(u6, cycle));
-    }
-
-    pub fn onSequencerTick(self: *Self, late: u64) void {
-        self.fs.tick();
-
-        switch (self.fs.step) {
-            7 => self.tick(.Envelope), // Clock Envelope
-            0, 4 => self.tick(.Length), // Clock Length
-            2, 6 => {
-                // Clock Length and Sweep
-                self.tick(.Length);
-                self.tick(.Sweep);
-            },
-            1, 3, 5 => {},
-        }
-
-        self.sched.push(.FrameSequencer, ((1 << 24) / 512) -| late);
-    }
-
-    fn tick(self: *Self, comptime kind: Tick) void {
-        self.ch1.tick(kind);
-
-        switch (kind) {
-            .Length => {
-                self.ch2.tick(kind);
-                self.ch3.tick(kind);
-                self.ch4.tick(kind);
-            },
-            .Envelope => {
-                self.ch2.tick(kind);
-                self.ch4.tick(kind);
-            },
-            .Sweep => {}, // Already handled above (only for Ch1)
-        }
-    }
-
-    pub fn onDmaAudioSampleRequest(self: *Self, cpu: *Arm7tdmi, tim_id: u3) void {
-        if (!self.cnt.apu_enable.read()) return;
-
-        const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-        if (@intFromBool(self.dma_cnt.chA_timer.read()) == tim_id) {
-            if (!self.chA.enabled) return;
-
-            self.chA.updateSample();
-            if (self.chA.len() <= 15) bus_ptr.dma[1].requestAudio(0x0400_00A0);
-        }
-
-        if (@intFromBool(self.dma_cnt.chB_timer.read()) == tim_id) {
-            if (!self.chB.enabled) return;
-
-            self.chB.updateSample();
-            if (self.chB.len() <= 15) bus_ptr.dma[2].requestAudio(0x0400_00A4);
-        }
-    }
-};
-
-pub fn DmaSound(comptime kind: DmaSoundKind) type {
-    return struct {
-        const Self = @This();
-
-        fifo: SoundFifo,
-        kind: DmaSoundKind,
-        sample: i8,
-        enabled: bool,
-
-        fn init() Self {
-            return .{
-                .fifo = SoundFifo.init(),
-                .kind = kind,
-                .sample = 0,
-                .enabled = false,
-            };
-        }
-
-        /// Used when resetting hte emulator (not emulation code)
-        fn reset(self: *Self) void {
-            self.* = Self.init();
-        }
-
-        pub fn push(self: *Self, value: u32) void {
-            if (!self.enabled) self.enable();
-
-            self.fifo.write(std.mem.asBytes(&value)) catch |e| log.err("{} Error: {}", .{ kind, e });
-        }
-
-        fn enable(self: *Self) void {
-            @setCold(true);
-            self.enabled = true;
-        }
-
-        pub fn len(self: *const Self) usize {
-            return self.fifo.readableLength();
-        }
-
-        pub fn updateSample(self: *Self) void {
-            if (self.fifo.readItem()) |sample| self.sample = @bitCast(sample);
-        }
-
-        pub fn amplitude(self: *const Self) i16 {
-            return self.sample;
-        }
-    };
-}
-
-const DmaSoundKind = enum {
-    A,
-    B,
-};
-
-pub const FrameSequencer = struct {
-    const Self = @This();
-    pub const interval = (1 << 24) / 512;
-
-    step: u3 = 0,
-
-    pub fn init() Self {
-        return .{};
-    }
-
-    pub fn reset(self: *Self) void {
-        self.* = .{};
-    }
-
-    pub fn tick(self: *Self) void {
-        self.step +%= 1;
-    }
-
-    pub fn isLengthNext(self: *const Self) bool {
-        return (self.step +% 1) & 1 == 0; // Steps, 0, 2, 4, and 6 clock length
-    }
-
-    pub fn isEnvelopeNext(self: *const Self) bool {
-        return (self.step +% 1) == 7;
-    }
-};
--- a/src/core/apu/Noise.zig
+++ b/src/core/apu/Noise.zig
@@ -1,145 +0,0 @@
-const io = @import("../bus/io.zig");
-const util = @import("../../util.zig");
-
-const Scheduler = @import("../scheduler.zig").Scheduler;
-const FrameSequencer = @import("../apu.zig").FrameSequencer;
-const Tick = @import("../apu.zig").Apu.Tick;
-const Envelope = @import("device/Envelope.zig");
-const Length = @import("device/Length.zig");
-const Lfsr = @import("signal/Lfsr.zig");
-
-const Self = @This();
-
-/// Write-only
-/// NR41
-len: u6,
-/// NR42
-envelope: io.Envelope,
-/// NR43
-poly: io.PolyCounter,
-/// NR44
-cnt: io.NoiseControl,
-
-/// Length Functionarlity
-len_dev: Length,
-
-/// Envelope Functionality
-env_dev: Envelope,
-
-// Linear Feedback Shift Register
-lfsr: Lfsr,
-
-enabled: bool,
-sample: i8,
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .len = 0,
-        .envelope = .{ .raw = 0 },
-        .poly = .{ .raw = 0 },
-        .cnt = .{ .raw = 0 },
-        .enabled = false,
-
-        .len_dev = Length.create(),
-        .env_dev = Envelope.create(),
-        .lfsr = Lfsr.create(sched),
-
-        .sample = 0,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.len = 0; // NR41
-    self.envelope.raw = 0; // NR42
-    self.poly.raw = 0; // NR43
-    self.cnt.raw = 0; // NR44
-
-    self.len_dev.reset();
-    self.env_dev.reset();
-
-    self.sample = 0;
-    self.enabled = false;
-}
-
-pub fn tick(self: *Self, comptime kind: Tick) void {
-    switch (kind) {
-        .Length => self.len_dev.tick(self.cnt.length_enable.read(), &self.enabled),
-        .Envelope => self.env_dev.tick(self.envelope),
-        .Sweep => @compileError("Channel 4 does not implement Sweep"),
-    }
-}
-
-/// NR41, NR42
-pub fn sound4CntL(self: *const Self) u16 {
-    return @as(u16, self.envelope.raw) << 8;
-}
-
-/// NR41, NR42
-pub fn setSound4CntL(self: *Self, value: u16) void {
-    self.setNr41(@truncate(value));
-    self.setNr42(@truncate(value >> 8));
-}
-
-/// NR41
-pub fn setNr41(self: *Self, len: u8) void {
-    self.len = @truncate(len);
-    self.len_dev.timer = @as(u7, 64) - self.len;
-}
-
-/// NR42
-pub fn setNr42(self: *Self, value: u8) void {
-    self.envelope.raw = value;
-    if (!self.isDacEnabled()) self.enabled = false;
-}
-
-/// NR43, NR44
-pub fn sound4CntH(self: *const Self) u16 {
-    return @as(u16, self.poly.raw & 0x40) << 8 | self.cnt.raw;
-}
-
-/// NR43, NR44
-pub fn setSound4CntH(self: *Self, fs: *const FrameSequencer, value: u16) void {
-    self.poly.raw = @truncate(value);
-    self.setNr44(fs, @truncate(value >> 8));
-}
-
-/// NR44
-pub fn setNr44(self: *Self, fs: *const FrameSequencer, byte: u8) void {
-    var new: io.NoiseControl = .{ .raw = byte };
-
-    if (new.trigger.read()) {
-        self.enabled = true;
-
-        if (self.len_dev.timer == 0) {
-            self.len_dev.timer =
-                if (!fs.isLengthNext() and new.length_enable.read()) 63 else 64;
-        }
-
-        // Update The Frequency Timer
-        self.lfsr.reload(self.poly);
-        self.lfsr.shift = 0x7FFF;
-
-        // Update Envelope and Volume
-        self.env_dev.timer = self.envelope.period.read();
-        if (fs.isEnvelopeNext() and self.env_dev.timer != 0b111) self.env_dev.timer += 1;
-
-        self.env_dev.vol = self.envelope.init_vol.read();
-
-        self.enabled = self.isDacEnabled();
-    }
-
-    util.audio.length.ch4.update(self, fs, new);
-    self.cnt = new;
-}
-
-pub fn onNoiseEvent(self: *Self, late: u64) void {
-    self.lfsr.onLfsrTimerExpire(self.poly, late);
-
-    self.sample = 0;
-    if (!self.isDacEnabled()) return;
-    self.sample = if (self.enabled) self.lfsr.sample() * @as(i8, self.env_dev.vol) else 0;
-}
-
-fn isDacEnabled(self: *const Self) bool {
-    return self.envelope.raw & 0xF8 != 0x00;
-}
--- a/src/core/apu/Tone.zig
+++ b/src/core/apu/Tone.zig
@@ -1,141 +0,0 @@
-const io = @import("../bus/io.zig");
-const util = @import("../../util.zig");
-
-const Scheduler = @import("../scheduler.zig").Scheduler;
-const FrameSequencer = @import("../apu.zig").FrameSequencer;
-const Tick = @import("../apu.zig").Apu.Tick;
-const Length = @import("device/Length.zig");
-const Envelope = @import("device/Envelope.zig");
-const Square = @import("signal/Square.zig");
-
-const Self = @This();
-
-/// NR21
-duty: io.Duty,
-/// NR22
-envelope: io.Envelope,
-/// NR23, NR24
-freq: io.Frequency,
-
-/// Length Functionarlity
-len_dev: Length,
-/// Envelope Functionality
-env_dev: Envelope,
-/// FrequencyTimer Functionality
-square: Square,
-
-enabled: bool,
-sample: i8,
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .duty = .{ .raw = 0 },
-        .envelope = .{ .raw = 0 },
-        .freq = .{ .raw = 0 },
-        .enabled = false,
-
-        .square = Square.init(sched),
-        .len_dev = Length.create(),
-        .env_dev = Envelope.create(),
-
-        .sample = 0,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.duty.raw = 0; // NR21
-    self.envelope.raw = 0; // NR22
-    self.freq.raw = 0; // NR32, NR24
-
-    self.len_dev.reset();
-    self.env_dev.reset();
-
-    self.sample = 0;
-    self.enabled = false;
-}
-
-pub fn tick(self: *Self, comptime kind: Tick) void {
-    switch (kind) {
-        .Length => self.len_dev.tick(self.freq.length_enable.read(), &self.enabled),
-        .Envelope => self.env_dev.tick(self.envelope),
-        .Sweep => @compileError("Channel 2 does not implement Sweep"),
-    }
-}
-
-pub fn onToneEvent(self: *Self, late: u64) void {
-    self.square.onSquareTimerExpire(Self, self.freq, late);
-
-    self.sample = 0;
-    if (!self.isDacEnabled()) return;
-    self.sample = if (self.enabled) self.square.sample(self.duty) * @as(i8, self.env_dev.vol) else 0;
-}
-
-/// NR21, NR22
-pub fn sound2CntL(self: *const Self) u16 {
-    return @as(u16, self.envelope.raw) << 8 | (self.duty.raw & 0xC0);
-}
-
-/// NR21, NR22
-pub fn setSound2CntL(self: *Self, value: u16) void {
-    self.setNr21(@truncate(value));
-    self.setNr22(@truncate(value >> 8));
-}
-
-/// NR21
-pub fn setNr21(self: *Self, value: u8) void {
-    self.duty.raw = value;
-    self.len_dev.timer = @as(u7, 64) - @as(u6, @truncate(value));
-}
-
-/// NR22
-pub fn setNr22(self: *Self, value: u8) void {
-    self.envelope.raw = value;
-    if (!self.isDacEnabled()) self.enabled = false;
-}
-
-/// NR23, NR24
-pub fn sound2CntH(self: *const Self) u16 {
-    return self.freq.raw & 0x4000;
-}
-
-/// NR23, NR24
-pub fn setSound2CntH(self: *Self, fs: *const FrameSequencer, value: u16) void {
-    self.setNr23(@truncate(value));
-    self.setNr24(fs, @truncate(value >> 8));
-}
-
-/// NR23
-pub fn setNr23(self: *Self, byte: u8) void {
-    self.freq.raw = (self.freq.raw & 0xFF00) | byte;
-}
-
-/// NR24
-pub fn setNr24(self: *Self, fs: *const FrameSequencer, byte: u8) void {
-    var new: io.Frequency = .{ .raw = (@as(u16, byte) << 8) | (self.freq.raw & 0xFF) };
-
-    if (new.trigger.read()) {
-        self.enabled = true;
-
-        if (self.len_dev.timer == 0) {
-            self.len_dev.timer =
-                if (!fs.isLengthNext() and new.length_enable.read()) 63 else 64;
-        }
-
-        self.square.reload(Self, self.freq.frequency.read());
-
-        // Reload Envelope period and timer
-        self.env_dev.timer = self.envelope.period.read();
-        if (fs.isEnvelopeNext() and self.env_dev.timer != 0b111) self.env_dev.timer += 1;
-
-        self.env_dev.vol = self.envelope.init_vol.read();
-
-        self.enabled = self.isDacEnabled();
-    }
-
-    util.audio.length.update(Self, self, fs, new);
-    self.freq = new;
-}
-
-fn isDacEnabled(self: *const Self) bool {
-    return self.envelope.raw & 0xF8 != 0;
-}
--- a/src/core/apu/ToneSweep.zig
+++ b/src/core/apu/ToneSweep.zig
@@ -1,185 +0,0 @@
-const io = @import("../bus/io.zig");
-const util = @import("../../util.zig");
-
-const Scheduler = @import("../scheduler.zig").Scheduler;
-const FrameSequencer = @import("../apu.zig").FrameSequencer;
-const Length = @import("device/Length.zig");
-const Envelope = @import("device/Envelope.zig");
-const Sweep = @import("device/Sweep.zig");
-const Square = @import("signal/Square.zig");
-
-const Tick = @import("../apu.zig").Apu.Tick;
-
-const Self = @This();
-
-/// NR10
-sweep: io.Sweep,
-/// NR11
-duty: io.Duty,
-/// NR12
-envelope: io.Envelope,
-/// NR13, NR14
-freq: io.Frequency,
-
-/// Length Functionality
-len_dev: Length,
-/// Sweep Functionality
-sweep_dev: Sweep,
-/// Envelope Functionality
-env_dev: Envelope,
-/// Frequency Timer Functionality
-square: Square,
-enabled: bool,
-
-sample: i8,
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .sweep = .{ .raw = 0 },
-        .duty = .{ .raw = 0 },
-        .envelope = .{ .raw = 0 },
-        .freq = .{ .raw = 0 },
-        .sample = 0,
-        .enabled = false,
-
-        .square = Square.init(sched),
-        .len_dev = Length.create(),
-        .sweep_dev = Sweep.create(),
-        .env_dev = Envelope.create(),
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.sweep.raw = 0; // NR10
-    self.duty.raw = 0; // NR11
-    self.envelope.raw = 0; // NR12
-    self.freq.raw = 0; // NR13, NR14
-
-    self.len_dev.reset();
-    self.sweep_dev.reset();
-    self.env_dev.reset();
-
-    self.sample = 0;
-    self.enabled = false;
-}
-
-pub fn tick(self: *Self, comptime kind: Tick) void {
-    switch (kind) {
-        .Length => self.len_dev.tick(self.freq.length_enable.read(), &self.enabled),
-        .Envelope => self.env_dev.tick(self.envelope),
-        .Sweep => self.sweep_dev.tick(self),
-    }
-}
-
-pub fn onToneSweepEvent(self: *Self, late: u64) void {
-    self.square.onSquareTimerExpire(Self, self.freq, late);
-
-    self.sample = 0;
-    if (!self.isDacEnabled()) return;
-    self.sample = if (self.enabled) self.square.sample(self.duty) * @as(i8, self.env_dev.vol) else 0;
-}
-
-/// NR10, NR11, NR12
-pub fn setSound1Cnt(self: *Self, value: u32) void {
-    self.setSound1CntL(@truncate(value));
-    self.setSound1CntH(@truncate(value >> 16));
-}
-
-/// NR10
-pub fn sound1CntL(self: *const Self) u8 {
-    return self.sweep.raw & 0x7F;
-}
-
-/// NR10
-pub fn setSound1CntL(self: *Self, value: u8) void {
-    const new = io.Sweep{ .raw = value };
-
-    if (!new.direction.read()) {
-        // If at least one (1) sweep calculation has been made with
-        // the negate bit set (since last trigger), disable the channel
-
-        if (self.sweep_dev.calc_performed) self.enabled = false;
-    }
-
-    self.sweep.raw = value;
-}
-
-/// NR11, NR12
-pub fn sound1CntH(self: *const Self) u16 {
-    return @as(u16, self.envelope.raw) << 8 | (self.duty.raw & 0xC0);
-}
-
-/// NR11, NR12
-pub fn setSound1CntH(self: *Self, value: u16) void {
-    self.setNr11(@truncate(value));
-    self.setNr12(@truncate(value >> 8));
-}
-
-/// NR11
-pub fn setNr11(self: *Self, value: u8) void {
-    self.duty.raw = value;
-    self.len_dev.timer = @as(u7, 64) - @as(u6, @truncate(value));
-}
-
-/// NR12
-pub fn setNr12(self: *Self, value: u8) void {
-    self.envelope.raw = value;
-    if (!self.isDacEnabled()) self.enabled = false;
-}
-
-/// NR13, NR14
-pub fn sound1CntX(self: *const Self) u16 {
-    return self.freq.raw & 0x4000;
-}
-
-/// NR13, NR14
-pub fn setSound1CntX(self: *Self, fs: *const FrameSequencer, value: u16) void {
-    self.setNr13(@truncate(value));
-    self.setNr14(fs, @truncate(value >> 8));
-}
-
-/// NR13
-pub fn setNr13(self: *Self, byte: u8) void {
-    self.freq.raw = (self.freq.raw & 0xFF00) | byte;
-}
-
-/// NR14
-pub fn setNr14(self: *Self, fs: *const FrameSequencer, byte: u8) void {
-    var new: io.Frequency = .{ .raw = (@as(u16, byte) << 8) | (self.freq.raw & 0xFF) };
-
-    if (new.trigger.read()) {
-        self.enabled = true;
-
-        if (self.len_dev.timer == 0) {
-            self.len_dev.timer =
-                if (!fs.isLengthNext() and new.length_enable.read()) 63 else 64;
-        }
-
-        self.square.reload(Self, self.freq.frequency.read());
-
-        // Reload Envelope period and timer
-        self.env_dev.timer = self.envelope.period.read();
-        if (fs.isEnvelopeNext() and self.env_dev.timer != 0b111) self.env_dev.timer += 1;
-
-        self.env_dev.vol = self.envelope.init_vol.read();
-
-        // Sweep Trigger Behaviour
-        const sw_period = self.sweep.period.read();
-        const sw_shift = self.sweep.shift.read();
-
-        self.sweep_dev.calc_performed = false;
-        self.sweep_dev.shadow = self.freq.frequency.read();
-        self.sweep_dev.timer = if (sw_period == 0) 8 else sw_period;
-        self.sweep_dev.enabled = sw_period != 0 or sw_shift != 0;
-        if (sw_shift != 0) _ = self.sweep_dev.calculate(self.sweep, &self.enabled);
-
-        self.enabled = self.isDacEnabled();
-    }
-
-    util.audio.length.update(Self, self, fs, new);
-    self.freq = new;
-}
-
-fn isDacEnabled(self: *const Self) bool {
-    return self.envelope.raw & 0xF8 != 0;
-}
--- a/src/core/apu/Wave.zig
+++ b/src/core/apu/Wave.zig
@@ -1,145 +0,0 @@
-const io = @import("../bus/io.zig");
-const util = @import("../../util.zig");
-
-const Scheduler = @import("../scheduler.zig").Scheduler;
-const FrameSequencer = @import("../apu.zig").FrameSequencer;
-const Tick = @import("../apu.zig").Apu.Tick;
-
-const Length = @import("device/Length.zig");
-const Wave = @import("signal/Wave.zig");
-
-const Self = @This();
-
-/// Write-only
-/// NR30
-select: io.WaveSelect,
-/// NR31
-length: u8,
-/// NR32
-vol: io.WaveVolume,
-/// NR33, NR34
-freq: io.Frequency,
-
-/// Length Functionarlity
-len_dev: Length,
-wave_dev: Wave,
-
-enabled: bool,
-sample: i8,
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .select = .{ .raw = 0 },
-        .vol = .{ .raw = 0 },
-        .freq = .{ .raw = 0 },
-        .length = 0,
-
-        .len_dev = Length.create(),
-        .wave_dev = Wave.init(sched),
-        .enabled = false,
-        .sample = 0,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.select.raw = 0; // NR30
-    self.length = 0; // NR31
-    self.vol.raw = 0; // NR32
-    self.freq.raw = 0; // NR33, NR34
-
-    self.len_dev.reset();
-    self.wave_dev.reset();
-
-    self.sample = 0;
-    self.enabled = false;
-}
-
-pub fn tick(self: *Self, comptime kind: Tick) void {
-    switch (kind) {
-        .Length => self.len_dev.tick(self.freq.length_enable.read(), &self.enabled),
-        .Envelope => @compileError("Channel 3 does not implement Envelope"),
-        .Sweep => @compileError("Channel 3 does not implement Sweep"),
-    }
-}
-
-/// NR30, NR31, NR32
-pub fn setSound3Cnt(self: *Self, value: u32) void {
-    self.setSound3CntL(@truncate(value));
-    self.setSound3CntH(@truncate(value >> 16));
-}
-
-/// NR30
-pub fn setSound3CntL(self: *Self, value: u8) void {
-    self.select.raw = value;
-    if (!self.select.enabled.read()) self.enabled = false;
-}
-
-/// NR30
-pub fn sound3CntL(self: *const Self) u8 {
-    return self.select.raw & 0xE0;
-}
-
-/// NR31, NR32
-pub fn sound3CntH(self: *const Self) u16 {
-    return @as(u16, self.length & 0xE0) << 8;
-}
-
-/// NR31, NR32
-pub fn setSound3CntH(self: *Self, value: u16) void {
-    self.setNr31(@truncate(value));
-    self.vol.raw = @truncate(value >> 8);
-}
-
-/// NR31
-pub fn setNr31(self: *Self, len: u8) void {
-    self.length = len;
-    self.len_dev.timer = 256 - @as(u9, len);
-}
-
-/// NR33, NR34
-pub fn setSound3CntX(self: *Self, fs: *const FrameSequencer, value: u16) void {
-    self.setNr33(@truncate(value));
-    self.setNr34(fs, @truncate(value >> 8));
-}
-
-/// NR33, NR34
-pub fn sound3CntX(self: *const Self) u16 {
-    return self.freq.raw & 0x4000;
-}
-
-/// NR33
-pub fn setNr33(self: *Self, byte: u8) void {
-    self.freq.raw = (self.freq.raw & 0xFF00) | byte;
-}
-
-/// NR34
-pub fn setNr34(self: *Self, fs: *const FrameSequencer, byte: u8) void {
-    var new: io.Frequency = .{ .raw = (@as(u16, byte) << 8) | (self.freq.raw & 0xFF) };
-
-    if (new.trigger.read()) {
-        self.enabled = true;
-
-        if (self.len_dev.timer == 0) {
-            self.len_dev.timer =
-                if (!fs.isLengthNext() and new.length_enable.read()) 255 else 256;
-        }
-
-        // Update The Frequency Timer
-        self.wave_dev.reload(self.freq.frequency.read());
-        self.wave_dev.offset = 0;
-
-        self.enabled = self.select.enabled.read();
-    }
-
-    util.audio.length.update(Self, self, fs, new);
-    self.freq = new;
-}
-
-pub fn onWaveEvent(self: *Self, late: u64) void {
-    self.wave_dev.onWaveTimerExpire(self.freq, self.select, late);
-
-    self.sample = 0;
-    if (!self.select.enabled.read()) return;
-    // Convert unsigned 4-bit wave sample to signed 8-bit sample
-    self.sample = (2 * @as(i8, self.wave_dev.sample(self.select)) - 15) >> self.wave_dev.shift(self.vol);
-}
--- a/src/core/apu/device/Envelope.zig
+++ b/src/core/apu/device/Envelope.zig
@@ -1,32 +0,0 @@
-const io = @import("../../bus/io.zig");
-
-const Self = @This();
-
-/// Period Timer
-timer: u3 = 0,
-/// Current Volume
-vol: u4 = 0,
-
-pub fn create() Self {
-    return .{};
-}
-
-pub fn reset(self: *Self) void {
-    self.* = .{};
-}
-
-pub fn tick(self: *Self, nrx2: io.Envelope) void {
-    if (nrx2.period.read() != 0) {
-        if (self.timer != 0) self.timer -= 1;
-
-        if (self.timer == 0) {
-            self.timer = nrx2.period.read();
-
-            if (nrx2.direction.read()) {
-                if (self.vol < 0xF) self.vol += 1;
-            } else {
-                if (self.vol > 0x0) self.vol -= 1;
-            }
-        }
-    }
-}
--- a/src/core/apu/device/Length.zig
+++ b/src/core/apu/device/Length.zig
@@ -1,22 +0,0 @@
-const Self = @This();
-
-timer: u9 = 0,
-
-pub fn create() Self {
-    return .{};
-}
-
-pub fn reset(self: *Self) void {
-    self.* = .{};
-}
-
-pub fn tick(self: *Self, enabled: bool, ch_enable: *bool) void {
-    if (enabled) {
-        if (self.timer == 0) return;
-        self.timer -= 1;
-
-        // By returning early if timer == 0, this is only
-        // true if timer == 0 because of the decrement we just did
-        if (self.timer == 0) ch_enable.* = false;
-    }
-}
--- a/src/core/apu/device/Sweep.zig
+++ b/src/core/apu/device/Sweep.zig
@@ -1,53 +0,0 @@
-const io = @import("../../bus/io.zig");
-const ToneSweep = @import("../ToneSweep.zig");
-
-const Self = @This();
-
-timer: u8 = 0,
-enabled: bool = false,
-shadow: u11 = 0,
-
-calc_performed: bool = false,
-
-pub fn create() Self {
-    return .{};
-}
-
-pub fn reset(self: *Self) void {
-    self.* = .{};
-}
-
-pub fn tick(self: *Self, ch1: *ToneSweep) void {
-    if (self.timer != 0) self.timer -= 1;
-
-    if (self.timer == 0) {
-        const period = ch1.sweep.period.read();
-        self.timer = if (period == 0) 8 else period;
-
-        if (self.enabled and period != 0) {
-            const new_freq = self.calculate(ch1.sweep, &ch1.enabled);
-
-            if (new_freq <= 0x7FF and ch1.sweep.shift.read() != 0) {
-                ch1.freq.frequency.write(@as(u11, @truncate(new_freq)));
-                self.shadow = @truncate(new_freq);
-
-                _ = self.calculate(ch1.sweep, &ch1.enabled);
-            }
-        }
-    }
-}
-
-/// Calculates the Sweep Frequency
-pub fn calculate(self: *Self, sweep: io.Sweep, ch_enable: *bool) u12 {
-    const shadow = @as(u12, self.shadow);
-    const shadow_shifted = shadow >> sweep.shift.read();
-    const decrease = sweep.direction.read();
-
-    const freq = if (decrease) blk: {
-        self.calc_performed = true;
-        break :blk shadow - shadow_shifted;
-    } else shadow + shadow_shifted;
-    if (freq > 0x7FF) ch_enable.* = false;
-
-    return freq;
-}
--- a/src/core/apu/signal/Lfsr.zig
+++ b/src/core/apu/signal/Lfsr.zig
@@ -1,62 +0,0 @@
-//! Linear Feedback Shift Register
-const io = @import("../../bus/io.zig");
-
-const Scheduler = @import("../../scheduler.zig").Scheduler;
-
-const Self = @This();
-pub const interval: u64 = (1 << 24) / (1 << 22);
-
-shift: u15,
-timer: u16,
-
-sched: *Scheduler,
-
-pub fn create(sched: *Scheduler) Self {
-    return .{
-        .shift = 0,
-        .timer = 0,
-        .sched = sched,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.shift = 0;
-    self.timer = 0;
-}
-
-pub fn sample(self: *const Self) i8 {
-    return if ((~self.shift & 1) == 1) 1 else -1;
-}
-
-/// Reload LFSR Timer
-pub fn reload(self: *Self, poly: io.PolyCounter) void {
-    self.sched.removeScheduledEvent(.{ .ApuChannel = 3 });
-
-    const div = Self.divisor(poly.div_ratio.read());
-    const timer = div << poly.shift.read();
-    self.sched.push(.{ .ApuChannel = 3 }, @as(u64, timer) * interval);
-}
-
-/// Scheduler Event Handler for LFSR Timer Expire
-/// FIXME: This gets called a lot, slowing down the scheduler
-pub fn onLfsrTimerExpire(self: *Self, poly: io.PolyCounter, late: u64) void {
-    // Obscure: "Using a noise channel clock shift of 14 or 15
-    // results in the LFSR receiving no clocks."
-    if (poly.shift.read() >= 14) return;
-
-    const div = Self.divisor(poly.div_ratio.read());
-    const timer = div << poly.shift.read();
-
-    const tmp = (self.shift & 1) ^ ((self.shift & 2) >> 1);
-    self.shift = (self.shift >> 1) | (tmp << 14);
-
-    if (poly.width.read())
-        self.shift = (self.shift & ~@as(u15, 0x40)) | tmp << 6;
-
-    self.sched.push(.{ .ApuChannel = 3 }, @as(u64, timer) * interval -| late);
-}
-
-fn divisor(code: u3) u16 {
-    if (code == 0) return 8;
-    return @as(u16, code) << 4;
-}
--- a/src/core/apu/signal/Square.zig
+++ b/src/core/apu/signal/Square.zig
@@ -1,62 +0,0 @@
-const std = @import("std");
-const io = @import("../../bus/io.zig");
-
-const Scheduler = @import("../../scheduler.zig").Scheduler;
-const ToneSweep = @import("../ToneSweep.zig");
-const Tone = @import("../Tone.zig");
-
-const Self = @This();
-pub const interval: u64 = (1 << 24) / (1 << 22);
-
-pos: u3,
-sched: *Scheduler,
-timer: u16,
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .timer = 0,
-        .pos = 0,
-        .sched = sched,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.timer = 0;
-    self.pos = 0;
-}
-
-/// Scheduler Event Handler for Square Synth Timer Expire
-pub fn onSquareTimerExpire(self: *Self, comptime T: type, nrx34: io.Frequency, late: u64) void {
-    comptime std.debug.assert(T == ToneSweep or T == Tone);
-    self.pos +%= 1;
-
-    self.timer = (@as(u16, 2048) - nrx34.frequency.read()) * 4;
-    self.sched.push(.{ .ApuChannel = if (T == ToneSweep) 0 else 1 }, @as(u64, self.timer) * interval -| late);
-}
-
-/// Reload Square Wave Timer
-pub fn reload(self: *Self, comptime T: type, value: u11) void {
-    comptime std.debug.assert(T == ToneSweep or T == Tone);
-    const channel = if (T == ToneSweep) 0 else 1;
-
-    self.sched.removeScheduledEvent(.{ .ApuChannel = channel });
-
-    const tmp = (@as(u16, 2048) - value) * 4; // What Freq Timer should be assuming no weird behaviour
-    self.timer = (tmp & ~@as(u16, 0x3)) | self.timer & 0x3; // Keep the last two bits from the old timer;
-
-    self.sched.push(.{ .ApuChannel = channel }, @as(u64, self.timer) * interval);
-}
-
-pub fn sample(self: *const Self, nrx1: io.Duty) i8 {
-    const pattern = nrx1.pattern.read();
-
-    const i = self.pos ^ 7; // index of 0 should get highest bit
-    const result = switch (pattern) {
-        0b00 => @as(u8, 0b00000001) >> i, // 12.5%
-        0b01 => @as(u8, 0b00000011) >> i, // 25%
-        0b10 => @as(u8, 0b00001111) >> i, // 50%
-        0b11 => @as(u8, 0b11111100) >> i, // 75%
-    };
-
-    return if (result & 1 == 1) 1 else -1;
-}
--- a/src/core/apu/signal/Wave.zig
+++ b/src/core/apu/signal/Wave.zig
@@ -1,84 +0,0 @@
-const std = @import("std");
-const io = @import("../../bus/io.zig");
-
-const Scheduler = @import("../../scheduler.zig").Scheduler;
-
-const buf_len = 0x20;
-pub const interval: u64 = (1 << 24) / (1 << 22);
-const Self = @This();
-
-buf: [buf_len]u8,
-timer: u16,
-offset: u12,
-
-sched: *Scheduler,
-
-pub fn read(self: *const Self, comptime T: type, nr30: io.WaveSelect, addr: u32) T {
-    // TODO: Handle reads when Channel 3 is disabled
-    const base = if (!nr30.bank.read()) @as(u32, 0x10) else 0; // Read from the Opposite Bank in Use
-
-    const i = base + addr - 0x0400_0090;
-    return std.mem.readInt(T, self.buf[i..][0..@sizeOf(T)], .little);
-}
-
-pub fn write(self: *Self, comptime T: type, nr30: io.WaveSelect, addr: u32, value: T) void {
-    // TODO: Handle writes when Channel 3 is disabled
-    const base = if (!nr30.bank.read()) @as(u32, 0x10) else 0; // Write to the Opposite Bank in Use
-
-    const i = base + addr - 0x0400_0090;
-    std.mem.writeInt(T, self.buf[i..][0..@sizeOf(T)], value, .little);
-}
-
-pub fn init(sched: *Scheduler) Self {
-    return .{
-        .buf = [_]u8{0x00} ** buf_len,
-        .timer = 0,
-        .offset = 0,
-        .sched = sched,
-    };
-}
-
-pub fn reset(self: *Self) void {
-    self.timer = 0;
-    self.offset = 0;
-
-    // sample buffer isn't reset because it's outside of the range of what NR52{7}'s effects
-}
-
-/// Reload internal Wave Timer
-pub fn reload(self: *Self, value: u11) void {
-    self.sched.removeScheduledEvent(.{ .ApuChannel = 2 });
-
-    self.timer = (@as(u16, 2048) - value) * 2;
-    self.sched.push(.{ .ApuChannel = 2 }, @as(u64, self.timer) * interval);
-}
-
-/// Scheduler Event Handler
-pub fn onWaveTimerExpire(self: *Self, nrx34: io.Frequency, nr30: io.WaveSelect, late: u64) void {
-    if (nr30.dimension.read()) {
-        self.offset = (self.offset + 1) % 0x40; // 0x20 bytes (both banks), which contain 2 samples each
-    } else {
-        self.offset = (self.offset + 1) % 0x20; // 0x10 bytes, which contain 2 samples each
-    }
-
-    self.timer = (@as(u16, 2048) - nrx34.frequency.read()) * 2;
-    self.sched.push(.{ .ApuChannel = 2 }, @as(u64, self.timer) * interval -| late);
-}
-
-/// Generate Sample from Wave Synth
-pub fn sample(self: *const Self, nr30: io.WaveSelect) u4 {
-    const base = if (nr30.bank.read()) @as(u32, 0x10) else 0;
-
-    const value = self.buf[base + self.offset / 2];
-    return if (self.offset & 1 == 0) @truncate(value >> 4) else @truncate(value);
-}
-
-/// TODO: Write comment
-pub fn shift(_: *const Self, nr32: io.WaveVolume) u2 {
-    return switch (nr32.kind.read()) {
-        0b00 => 3, // Mute / Zero
-        0b01 => 0, // 100% Volume
-        0b10 => 1, // 50% Volume
-        0b11 => 2, // 25% Volume
-    };
-}
--- a/src/core/bus/Bios.zig
+++ b/src/core/bus/Bios.zig
@@ -1,92 +0,0 @@
-const std = @import("std");
-
-const Allocator = std.mem.Allocator;
-const log = std.log.scoped(.Bios);
-
-const rotr = @import("zba-util").rotr;
-const forceAlign = @import("../Bus.zig").forceAlign;
-
-/// Size of the BIOS in bytes
-pub const size = 0x4000;
-const Self = @This();
-
-buf: ?[]u8,
-allocator: Allocator,
-
-addr_latch: u32 = 0,
-
-// https://github.com/ITotalJustice/notorious_beeg/issues/106
-pub fn read(self: *Self, comptime T: type, r15: u32, address: u32) T {
-    if (r15 < Self.size) {
-        const addr = forceAlign(T, address);
-
-        self.addr_latch = addr;
-        return self._read(T, addr);
-    }
-
-    log.warn("Open Bus! Read from 0x{X:0>8}, but PC was 0x{X:0>8}", .{ address, r15 });
-    const value = self._read(u32, self.addr_latch);
-
-    return @truncate(rotr(u32, value, 8 * rotateBy(T, address)));
-}
-
-fn rotateBy(comptime T: type, address: u32) u32 {
-    return switch (T) {
-        u8 => address & 3,
-        u16 => address & 2,
-        u32 => 0,
-        else => @compileError("bios: unsupported read width"),
-    };
-}
-
-pub fn dbgRead(self: *const Self, comptime T: type, r15: u32, address: u32) T {
-    if (r15 < Self.size) return self._read(T, forceAlign(T, address));
-
-    const value = self._read(u32, self.addr_latch);
-    return @truncate(rotr(u32, value, 8 * rotateBy(T, address)));
-}
-
-/// Read without the GBA safety checks
-fn _read(self: *const Self, comptime T: type, addr: u32) T {
-    const buf = self.buf orelse std.debug.panic("[BIOS] ZBA tried to read {} from 0x{X:0>8} but not BIOS was present", .{ T, addr });
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readInt(T, buf[addr..][0..@sizeOf(T)], .little),
-        else => @compileError("BIOS: Unsupported read width"),
-    };
-}
-
-pub fn write(_: *Self, comptime T: type, addr: u32, value: T) void {
-    @setCold(true);
-    log.debug("Tried to write {} 0x{X:} to 0x{X:0>8} ", .{ T, value, addr });
-}
-
-pub fn init(allocator: Allocator, maybe_path: ?[]const u8) !Self {
-    if (maybe_path == null) return .{ .buf = null, .allocator = allocator };
-    const file_path = maybe_path.?;
-
-    const buf = try allocator.alloc(u8, Self.size);
-    errdefer allocator.free(buf);
-
-    var self: Self = .{ .buf = buf, .allocator = allocator };
-    try self.load(file_path);
-
-    return self;
-}
-
-pub fn load(self: *Self, file_path: []const u8) !void {
-    const file = try std.fs.cwd().openFile(file_path, .{});
-    defer file.close();
-
-    const len = try file.readAll(self.buf orelse return error.UnallocatedBuffer);
-    if (len != Self.size) log.err("Expected BIOS to be {}B, was {}B", .{ Self.size, len });
-}
-
-pub fn reset(self: *Self) void {
-    self.addr_latch = 0;
-}
-
-pub fn deinit(self: *Self) void {
-    if (self.buf) |buf| self.allocator.free(buf);
-    self.* = undefined;
-}
--- a/src/core/bus/GamePak.zig
+++ b/src/core/bus/GamePak.zig
@@ -1,261 +0,0 @@
-const std = @import("std");
-const config = @import("../../config.zig");
-
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const Backup = @import("backup.zig").Backup;
-const Gpio = @import("gpio.zig").Gpio;
-const Allocator = std.mem.Allocator;
-
-const log = std.log.scoped(.GamePak);
-
-const Self = @This();
-
-title: [12]u8,
-buf: []u8,
-allocator: Allocator,
-backup: Backup,
-gpio: *Gpio,
-
-pub fn read(self: *Self, comptime T: type, address: u32) T {
-    const addr = address & 0x1FF_FFFF;
-
-    if (self.backup.kind == .Eeprom) {
-        if (self.buf.len > 0x100_0000) { // Large
-            // Addresses 0x1FF_FF00 to 0x1FF_FFFF are reserved from EEPROM accesses if
-            // * Backup type is EEPROM
-            // * Large ROM (Size is greater than 16MB)
-            if (addr > 0x1FF_FEFF)
-                return self.backup.eeprom.read();
-        } else {
-            // Addresses 0x0D00_0000 to 0x0DFF_FFFF are reserved for EEPROM accesses if
-            // * Backup type is EEPROM
-            // * Small ROM (less than 16MB)
-            if (@as(u8, @truncate(address >> 24)) == 0x0D)
-                return self.backup.eeprom.read();
-        }
-    }
-
-    if (self.gpio.cnt == 1) {
-        // GPIO Can be read from
-        // We assume that this will only be true when a ROM actually does want something from GPIO
-
-        switch (T) {
-            u32 => switch (address) {
-                // TODO: Do I even need to implement these?
-                0x0800_00C4 => std.debug.panic("Handle 32-bit GPIO Data/Direction Reads", .{}),
-                0x0800_00C6 => std.debug.panic("Handle 32-bit GPIO Direction/Control Reads", .{}),
-                0x0800_00C8 => std.debug.panic("Handle 32-bit GPIO Control Reads", .{}),
-                else => {},
-            },
-            u16 => switch (address) {
-                // FIXME: What do 16-bit GPIO Reads look like?
-                0x0800_00C4 => return self.gpio.read(.Data),
-                0x0800_00C6 => return self.gpio.read(.Direction),
-                0x0800_00C8 => return self.gpio.read(.Control),
-                else => {},
-            },
-            u8 => switch (address) {
-                0x0800_00C4 => return self.gpio.read(.Data),
-                0x0800_00C6 => return self.gpio.read(.Direction),
-                0x0800_00C8 => return self.gpio.read(.Control),
-                else => {},
-            },
-            else => @compileError("GamePak[GPIO]: Unsupported read width"),
-        }
-    }
-
-    return switch (T) {
-        u32 => (@as(T, self.get(addr + 3)) << 24) | (@as(T, self.get(addr + 2)) << 16) | (@as(T, self.get(addr + 1)) << 8) | (@as(T, self.get(addr))),
-        u16 => (@as(T, self.get(addr + 1)) << 8) | @as(T, self.get(addr)),
-        u8 => self.get(addr),
-        else => @compileError("GamePak: Unsupported read width"),
-    };
-}
-
-inline fn get(self: *const Self, i: u32) u8 {
-    @setRuntimeSafety(false);
-    if (i < self.buf.len) return self.buf[i];
-
-    const lhs = i >> 1 & 0xFFFF;
-    return @truncate(lhs >> 8 * @as(u5, @truncate(i & 1)));
-}
-
-pub fn dbgRead(self: *const Self, comptime T: type, address: u32) T {
-    const addr = address & 0x1FF_FFFF;
-
-    if (self.backup.kind == .Eeprom) {
-        if (self.buf.len > 0x100_0000) { // Large
-            // Addresses 0x1FF_FF00 to 0x1FF_FFFF are reserved from EEPROM accesses if
-            // * Backup type is EEPROM
-            // * Large ROM (Size is greater than 16MB)
-            if (addr > 0x1FF_FEFF)
-                return self.backup.eeprom.dbgRead();
-        } else {
-            // Addresses 0x0D00_0000 to 0x0DFF_FFFF are reserved for EEPROM accesses if
-            // * Backup type is EEPROM
-            // * Small ROM (less than 16MB)
-            if (@as(u8, @truncate(address >> 24)) == 0x0D)
-                return self.backup.eeprom.dbgRead();
-        }
-    }
-
-    if (self.gpio.cnt == 1) {
-        // GPIO Can be read from
-        // We assume that this will only be true when a ROM actually does want something from GPIO
-
-        switch (T) {
-            u32 => switch (address) {
-                // FIXME: Do I even need to implement these?
-                0x0800_00C4 => std.debug.panic("Handle 32-bit GPIO Data/Direction Reads", .{}),
-                0x0800_00C6 => std.debug.panic("Handle 32-bit GPIO Direction/Control Reads", .{}),
-                0x0800_00C8 => std.debug.panic("Handle 32-bit GPIO Control Reads", .{}),
-                else => {},
-            },
-            u16 => switch (address) {
-                0x0800_00C4 => return self.gpio.read(.Data),
-                0x0800_00C6 => return self.gpio.read(.Direction),
-                0x0800_00C8 => return self.gpio.read(.Control),
-                else => {},
-            },
-            u8 => switch (address) {
-                0x0800_00C4 => return self.gpio.read(.Data),
-                0x0800_00C6 => return self.gpio.read(.Direction),
-                0x0800_00C8 => return self.gpio.read(.Control),
-                else => {},
-            },
-            else => @compileError("GamePak[GPIO]: Unsupported read width"),
-        }
-    }
-
-    return switch (T) {
-        u32 => (@as(T, self.get(addr + 3)) << 24) | (@as(T, self.get(addr + 2)) << 16) | (@as(T, self.get(addr + 1)) << 8) | (@as(T, self.get(addr))),
-        u16 => (@as(T, self.get(addr + 1)) << 8) | @as(T, self.get(addr)),
-        u8 => self.get(addr),
-        else => @compileError("GamePak: Unsupported read width"),
-    };
-}
-
-pub fn write(self: *Self, comptime T: type, word_count: u16, address: u32, value: T) void {
-    const addr = address & 0x1FF_FFFF;
-
-    if (self.backup.kind == .Eeprom) {
-        const bit: u1 = @truncate(value);
-
-        if (self.buf.len > 0x100_0000) { // Large
-            // Addresses 0x1FF_FF00 to 0x1FF_FFFF are reserved from EEPROM accesses if
-            // * Backup type is EEPROM
-            // * Large ROM (Size is greater than 16MB)
-            if (addr > 0x1FF_FEFF)
-                return self.backup.eeprom.write(word_count, &self.backup.buf, bit);
-        } else {
-            // Addresses 0x0D00_0000 to 0x0DFF_FFFF are reserved for EEPROM accesses if
-            // * Backup type is EEPROM
-            // * Small ROM (less than 16MB)
-            if (@as(u8, @truncate(address >> 24)) == 0x0D)
-                return self.backup.eeprom.write(word_count, &self.backup.buf, bit);
-        }
-    }
-
-    switch (T) {
-        u32 => switch (address) {
-            0x0800_00C4 => {
-                self.gpio.write(.Data, @as(u4, @truncate(value)));
-                self.gpio.write(.Direction, @as(u4, @truncate(value >> 16)));
-            },
-            0x0800_00C6 => {
-                self.gpio.write(.Direction, @as(u4, @truncate(value)));
-                self.gpio.write(.Control, @as(u1, @truncate(value >> 16)));
-            },
-            else => log.err("Wrote {} 0x{X:0>8} to 0x{X:0>8}, Unhandled", .{ T, value, address }),
-        },
-        u16 => switch (address) {
-            0x0800_00C4 => self.gpio.write(.Data, @as(u4, @truncate(value))),
-            0x0800_00C6 => self.gpio.write(.Direction, @as(u4, @truncate(value))),
-            0x0800_00C8 => self.gpio.write(.Control, @as(u1, @truncate(value))),
-            else => log.err("Wrote {} 0x{X:0>4} to 0x{X:0>8}, Unhandled", .{ T, value, address }),
-        },
-        u8 => log.debug("Wrote {} 0x{X:0>2} to 0x{X:0>8}, Ignored.", .{ T, value, address }),
-        else => @compileError("GamePak: Unsupported write width"),
-    }
-}
-
-pub fn init(allocator: Allocator, cpu: *Arm7tdmi, maybe_rom: ?[]const u8, maybe_save: ?[]const u8) !Self {
-    const Device = Gpio.Device;
-
-    const items: struct { []u8, [12]u8, Backup.Kind, Device.Kind } = if (maybe_rom) |file_path| blk: {
-        const file = try std.fs.cwd().openFile(file_path, .{});
-        defer file.close();
-
-        const buffer = try file.readToEndAlloc(allocator, try file.getEndPos());
-        const title = buffer[0xA0..0xAC];
-        logHeader(buffer, title);
-
-        const device_kind = if (config.config().guest.force_rtc) .Rtc else guessDevice(buffer);
-
-        break :blk .{ buffer, title.*, Backup.guess(buffer), device_kind };
-    } else .{ try allocator.alloc(u8, 0), [_]u8{0} ** 12, .None, .None };
-
-    const title = items[1];
-
-    return .{
-        .buf = items[0],
-        .allocator = allocator,
-        .title = title,
-        .backup = try Backup.init(allocator, items[2], title, maybe_save),
-        .gpio = try Gpio.init(allocator, cpu, items[3]),
-    };
-}
-
-pub fn deinit(self: *Self) void {
-    self.backup.deinit();
-    self.gpio.deinit(self.allocator);
-    self.allocator.destroy(self.gpio);
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
-
-/// Searches the ROM to see if it can determine whether the ROM it's searching uses
-/// any GPIO device, like a RTC for example.
-fn guessDevice(buf: []const u8) Gpio.Device.Kind {
-    // Try to Guess if ROM uses RTC
-    const needle = "RTC_V"; // I was told SIIRTC_V, though Pokemen Firered (USA) is a false negative
-
-    // TODO: Use new for loop syntax?
-    var i: usize = 0;
-    while ((i + needle.len) < buf.len) : (i += 1) {
-        if (std.mem.eql(u8, needle, buf[i..(i + needle.len)])) return .Rtc;
-    }
-
-    // TODO: Detect other GPIO devices
-    return .None;
-}
-
-fn logHeader(buf: []const u8, title: *const [12]u8) void {
-    const version = buf[0xBC];
-
-    log.info("Title: {s}", .{title});
-    if (version != 0) log.info("Version: {}", .{version});
-
-    log.info("Game Code: {s}", .{buf[0xAC..0xB0]});
-    log.info("Maker Code: {s}", .{buf[0xB0..0xB2]});
-}
-
-test "OOB Access" {
-    const title = .{ 'H', 'E', 'L', 'L', 'O', ' ', 'W', 'O', 'R', 'L', 'D', '!' };
-    const alloc = std.testing.allocator;
-    const pak = Self{
-        .buf = &.{},
-        .alloc = alloc,
-        .title = title,
-        .backup = try Backup.init(alloc, .None, title, null),
-    };
-
-    std.debug.assert(pak.get(0) == 0x00); // 0x0000
-    std.debug.assert(pak.get(1) == 0x00);
-
-    std.debug.assert(pak.get(2) == 0x01); // 0x0001
-    std.debug.assert(pak.get(3) == 0x00);
-
-    std.debug.assert(pak.get(4) == 0x02); // 0x0002
-    std.debug.assert(pak.get(5) == 0x00);
-}
--- a/src/core/bus/backup.zig
+++ b/src/core/bus/backup.zig
@@ -1,219 +0,0 @@
-const std = @import("std");
-const Allocator = std.mem.Allocator;
-const log = std.log.scoped(.Backup);
-
-const Eeprom = @import("backup/eeprom.zig").Eeprom;
-const Flash = @import("backup/Flash.zig");
-
-const escape = @import("../../util.zig").escape;
-
-const Needle = struct { str: []const u8, kind: Backup.Kind };
-const backup_kinds = [6]Needle{
-    .{ .str = "EEPROM_V", .kind = .Eeprom },
-    .{ .str = "SRAM_V", .kind = .Sram },
-    .{ .str = "SRAM_F_V", .kind = .Sram },
-    .{ .str = "FLASH_V", .kind = .Flash },
-    .{ .str = "FLASH512_V", .kind = .Flash },
-    .{ .str = "FLASH1M_V", .kind = .Flash1M },
-};
-
-const SaveError = error{Unsupported};
-
-pub const Backup = struct {
-    const Self = @This();
-
-    buf: []u8,
-    allocator: Allocator,
-    kind: Kind,
-
-    title: [12]u8,
-    save_path: ?[]const u8,
-
-    flash: Flash,
-    eeprom: Eeprom,
-
-    pub const Kind = enum {
-        Eeprom,
-        Sram,
-        Flash,
-        Flash1M,
-        None,
-    };
-
-    pub fn read(self: *const Self, address: usize) u8 {
-        const addr = address & 0xFFFF;
-
-        switch (self.kind) {
-            .Flash => {
-                switch (addr) {
-                    0x0000 => if (self.flash.id_mode) return 0x32, // Panasonic manufacturer ID
-                    0x0001 => if (self.flash.id_mode) return 0x1B, // Panasonic device ID
-                    else => {},
-                }
-
-                return self.flash.read(self.buf, addr);
-            },
-            .Flash1M => {
-                switch (addr) {
-                    0x0000 => if (self.flash.id_mode) return 0x62, // Sanyo manufacturer ID
-                    0x0001 => if (self.flash.id_mode) return 0x13, // Sanyo device ID
-                    else => {},
-                }
-
-                return self.flash.read(self.buf, addr);
-            },
-            .Sram => return self.buf[addr & 0x7FFF], // 32K SRAM chip is mirrored
-            .None, .Eeprom => return 0xFF,
-        }
-    }
-
-    pub fn write(self: *Self, address: usize, byte: u8) void {
-        const addr = address & 0xFFFF;
-
-        switch (self.kind) {
-            .Flash, .Flash1M => {
-                if (self.flash.prep_write) return self.flash.write(self.buf, addr, byte);
-                if (self.flash.shouldEraseSector(addr, byte)) return self.flash.erase(self.buf, addr);
-
-                switch (addr) {
-                    0x0000 => if (self.kind == .Flash1M and self.flash.set_bank) {
-                        self.flash.bank = @truncate(byte);
-                    },
-                    0x5555 => {
-                        if (self.flash.state == .Command) {
-                            self.flash.handleCommand(self.buf, byte);
-                        } else if (byte == 0xAA and self.flash.state == .Ready) {
-                            self.flash.state = .Set;
-                        } else if (byte == 0xF0) {
-                            self.flash.state = .Ready;
-                        }
-                    },
-                    0x2AAA => if (byte == 0x55 and self.flash.state == .Set) {
-                        self.flash.state = .Command;
-                    },
-                    else => {},
-                }
-            },
-            .Sram => self.buf[addr & 0x7FFF] = byte,
-            .None, .Eeprom => {},
-        }
-    }
-
-    pub fn init(allocator: Allocator, kind: Kind, title: [12]u8, path: ?[]const u8) !Self {
-        log.info("Kind: {}", .{kind});
-
-        const buf_size: usize = switch (kind) {
-            .Sram => 0x8000, // 32K
-            .Flash => 0x10000, // 64K
-            .Flash1M => 0x20000, // 128K
-            .None, .Eeprom => 0, // EEPROM is handled upon first Read Request to it
-        };
-
-        const buf = try allocator.alloc(u8, buf_size);
-        @memset(buf, 0xFF);
-
-        var backup = Self{
-            .buf = buf,
-            .allocator = allocator,
-            .kind = kind,
-            .title = title,
-            .save_path = path,
-            .flash = Flash.create(),
-            .eeprom = Eeprom.create(allocator),
-        };
-
-        if (backup.save_path) |p| backup.readSave(allocator, p) catch |e| log.err("Failed to load save: {}", .{e});
-        return backup;
-    }
-
-    pub fn deinit(self: *Self) void {
-        if (self.save_path) |path| self.writeSave(self.allocator, path) catch |e| log.err("Failed to write save: {}", .{e});
-        self.allocator.free(self.buf);
-        self.* = undefined;
-    }
-
-    /// Guesses the Backup Kind of a GBA ROM
-    pub fn guess(rom: []const u8) Kind {
-        for (backup_kinds) |needle| {
-            const needle_len = needle.str.len;
-
-            // TODO: Use new for loop syntax?
-            var i: usize = 0;
-            while ((i + needle_len) < rom.len) : (i += 1) {
-                if (std.mem.eql(u8, needle.str, rom[i..][0..needle_len])) return needle.kind;
-            }
-        }
-
-        return .None;
-    }
-
-    fn readSave(self: *Self, allocator: Allocator, path: []const u8) !void {
-        const file_path = try self.savePath(allocator, path);
-        defer allocator.free(file_path);
-
-        const expected = "untitled.sav";
-        if (std.mem.eql(u8, file_path[file_path.len - expected.len .. file_path.len], expected)) {
-            return log.err("ROM header lacks title, no save loaded", .{});
-        }
-
-        const file: std.fs.File = try std.fs.openFileAbsolute(file_path, .{});
-        const file_buf = try file.readToEndAlloc(allocator, try file.getEndPos());
-        defer allocator.free(file_buf);
-
-        switch (self.kind) {
-            .Sram, .Flash, .Flash1M => {
-                if (self.buf.len == file_buf.len) {
-                    @memcpy(self.buf, file_buf);
-                    return log.info("Loaded Save from {s}", .{file_path});
-                }
-
-                log.err("{s} is {} bytes, but we expected {} bytes", .{ file_path, file_buf.len, self.buf.len });
-            },
-            .Eeprom => {
-                if (file_buf.len == 0x200 or file_buf.len == 0x2000) {
-                    self.eeprom.kind = if (file_buf.len == 0x200) .Small else .Large;
-
-                    self.buf = try allocator.alloc(u8, file_buf.len);
-                    @memcpy(self.buf, file_buf);
-                    return log.info("Loaded Save from {s}", .{file_path});
-                }
-
-                log.err("EEPROM can either be 0x200 bytes or 0x2000 byes, but {s} was {X:} bytes", .{
-                    file_path,
-                    file_buf.len,
-                });
-            },
-            .None => return SaveError.Unsupported,
-        }
-    }
-
-    fn savePath(self: *const Self, allocator: Allocator, path: []const u8) ![]const u8 {
-        const filename = try self.saveName(allocator);
-        defer allocator.free(filename);
-
-        return try std.fs.path.join(allocator, &[_][]const u8{ path, filename });
-    }
-
-    fn saveName(self: *const Self, allocator: Allocator) ![]const u8 {
-        const title_str = std.mem.sliceTo(&escape(self.title), 0);
-        const name = if (title_str.len != 0) title_str else "untitled";
-
-        return try std.mem.concat(allocator, u8, &[_][]const u8{ name, ".sav" });
-    }
-
-    fn writeSave(self: Self, allocator: Allocator, path: []const u8) !void {
-        const file_path = try self.savePath(allocator, path);
-        defer allocator.free(file_path);
-
-        switch (self.kind) {
-            .Sram, .Flash, .Flash1M, .Eeprom => {
-                const file = try std.fs.createFileAbsolute(file_path, .{});
-                defer file.close();
-
-                try file.writeAll(self.buf);
-                log.info("Wrote Save to {s}", .{file_path});
-            },
-            else => return SaveError.Unsupported,
-        }
-    }
-};
--- a/src/core/bus/backup/Flash.zig
+++ b/src/core/bus/backup/Flash.zig
@@ -1,72 +0,0 @@
-const std = @import("std");
-
-const Self = @This();
-
-state: State,
-
-id_mode: bool,
-set_bank: bool,
-prep_erase: bool,
-prep_write: bool,
-
-bank: u1,
-
-const State = enum {
-    Ready,
-    Set,
-    Command,
-};
-
-pub fn read(self: *const Self, buf: []u8, idx: usize) u8 {
-    return buf[self.address() + idx];
-}
-
-pub fn write(self: *Self, buf: []u8, idx: usize, byte: u8) void {
-    buf[self.address() + idx] = byte;
-    self.prep_write = false;
-}
-
-pub fn create() Self {
-    return .{
-        .state = .Ready,
-        .id_mode = false,
-        .set_bank = false,
-        .prep_erase = false,
-        .prep_write = false,
-        .bank = 0,
-    };
-}
-
-pub fn handleCommand(self: *Self, buf: []u8, byte: u8) void {
-    switch (byte) {
-        0x90 => self.id_mode = true,
-        0xF0 => self.id_mode = false,
-        0xB0 => self.set_bank = true,
-        0x80 => self.prep_erase = true,
-        0x10 => {
-            @memset(buf, 0xFF);
-            self.prep_erase = false;
-        },
-        0xA0 => self.prep_write = true,
-        else => std.debug.panic("Unhandled Flash Command: 0x{X:0>2}", .{byte}),
-    }
-
-    self.state = .Ready;
-}
-
-pub fn shouldEraseSector(self: *const Self, addr: usize, byte: u8) bool {
-    return self.state == .Command and self.prep_erase and byte == 0x30 and addr & 0xFFF == 0x000;
-}
-
-pub fn erase(self: *Self, buf: []u8, sector: usize) void {
-    const start = self.address() + (sector & 0xF000);
-
-    @memset(buf[start..][0..0x1000], 0xFF);
-    self.prep_erase = false;
-    self.state = .Ready;
-}
-
-/// Base Address
-inline fn address(self: *const Self) usize {
-    return if (self.bank == 1) 0x10000 else @as(usize, 0);
-}
--- a/src/core/bus/backup/eeprom.zig
+++ b/src/core/bus/backup/eeprom.zig
@@ -1,269 +0,0 @@
-const std = @import("std");
-
-const Allocator = std.mem.Allocator;
-
-const log = std.log.scoped(.Eeprom);
-
-pub const Eeprom = struct {
-    const Self = @This();
-
-    addr: u14,
-
-    kind: Kind,
-    state: State,
-    writer: Writer,
-    reader: Reader,
-
-    allocator: Allocator,
-
-    const Kind = enum {
-        Unknown,
-        Small, // 512B
-        Large, // 8KB
-    };
-
-    const State = enum {
-        Ready,
-        Read,
-        Write,
-        WriteTransfer,
-        RequestEnd,
-    };
-
-    pub fn read(self: *Self) u1 {
-        return self.reader.read();
-    }
-
-    pub fn dbgRead(self: *const Self) u1 {
-        return self.reader.dbgRead();
-    }
-
-    pub fn write(self: *Self, word_count: u16, buf: *[]u8, bit: u1) void {
-        if (self.guessKind(word_count)) |found| {
-            log.info("EEPROM Kind: {}", .{found});
-            self.kind = found;
-
-            // buf.len will not equal zero when a save file was found and loaded.
-            // Right now, we assume that the save file is of the correct size which
-            // isn't necessarily true, since we can't trust anything a user can influence
-            // TODO: use ?[]u8 instead of a 0-sized slice?
-            if (buf.len == 0) {
-                const len: usize = switch (found) {
-                    .Small => 0x200,
-                    .Large => 0x2000,
-                    else => unreachable,
-                };
-
-                buf.* = self.allocator.alloc(u8, len) catch |e| {
-                    log.err("Failed to resize EEPROM buf to {} bytes", .{len});
-                    std.debug.panic("EEPROM entered irrecoverable state {}", .{e});
-                };
-
-                // FIXME: ptr to a slice?
-                @memset(buf.*, 0xFF);
-            }
-        }
-
-        if (self.state == .RequestEnd) {
-            // if (bit != 0) log.debug("EEPROM Request did not end in 0u1. TODO: is this ok?", .{});
-            self.state = .Ready;
-            return;
-        }
-
-        switch (self.state) {
-            .Ready => self.writer.requestWrite(bit),
-            .Read, .Write => self.writer.addressWrite(self.kind, bit),
-            .WriteTransfer => self.writer.dataWrite(bit),
-            .RequestEnd => unreachable, // We return early just above this block
-        }
-
-        self.tick(buf.*);
-    }
-
-    pub fn create(allocator: Allocator) Self {
-        return .{
-            .kind = .Unknown,
-            .state = .Ready,
-            .writer = Writer.create(),
-            .reader = Reader.create(),
-            .addr = 0,
-            .allocator = allocator,
-        };
-    }
-
-    fn guessKind(self: *const Self, word_count: u16) ?Kind {
-        if (self.kind != .Unknown or self.state != .Read) return null;
-
-        return switch (word_count) {
-            17 => .Large,
-            9 => .Small,
-            else => blk: {
-                log.err("Unexpected length of DMA3 Transfer upon initial EEPROM read: {}", .{word_count});
-                break :blk null;
-            },
-        };
-    }
-
-    fn tick(self: *Self, buf: []u8) void {
-        switch (self.state) {
-            .Ready => {
-                if (self.writer.len() == 2) {
-                    const req: u2 = @intCast(self.writer.finish());
-                    switch (req) {
-                        0b11 => self.state = .Read,
-                        0b10 => self.state = .Write,
-                        else => log.err("Unknown EEPROM Request 0b{b:0>2}", .{req}),
-                    }
-                }
-            },
-            .Read => {
-                switch (self.kind) {
-                    .Large => {
-                        if (self.writer.len() == 14) {
-                            const addr: u10 = @intCast(self.writer.finish());
-                            const value = std.mem.readInt(u64, buf[@as(u13, addr) * 8 ..][0..8], .little);
-
-                            self.reader.configure(value);
-                            self.state = .RequestEnd;
-                        }
-                    },
-                    .Small => {
-                        if (self.writer.len() == 6) {
-                            // FIXME: Duplicated code from above
-                            const addr: u6 = @intCast(self.writer.finish());
-                            const value = std.mem.readInt(u64, buf[@as(u13, addr) * 8 ..][0..8], .little);
-
-                            self.reader.configure(value);
-                            self.state = .RequestEnd;
-                        }
-                    },
-                    else => log.err("Unable to calculate EEPROM read address. EEPROM size UNKNOWN", .{}),
-                }
-            },
-            .Write => {
-                switch (self.kind) {
-                    .Large => {
-                        if (self.writer.len() == 14) {
-                            self.addr = @as(u10, @intCast(self.writer.finish()));
-                            self.state = .WriteTransfer;
-                        }
-                    },
-                    .Small => {
-                        if (self.writer.len() == 6) {
-                            self.addr = @as(u6, @intCast(self.writer.finish()));
-                            self.state = .WriteTransfer;
-                        }
-                    },
-                    else => log.err("Unable to calculate EEPROM write address. EEPROM size UNKNOWN", .{}),
-                }
-            },
-            .WriteTransfer => {
-                if (self.writer.len() == 64) {
-                    std.mem.writeInt(u64, buf[self.addr * 8 ..][0..8], self.writer.finish(), .little);
-                    self.state = .RequestEnd;
-                }
-            },
-            .RequestEnd => unreachable, // We return early in write() if state is .RequestEnd
-        }
-    }
-};
-
-const Reader = struct {
-    const Self = @This();
-
-    data: u64,
-    i: u8,
-    enabled: bool,
-
-    fn create() Self {
-        return .{
-            .data = 0,
-            .i = 0,
-            .enabled = false,
-        };
-    }
-
-    fn read(self: *Self) u1 {
-        if (!self.enabled) return 1;
-
-        const bit: u1 = if (self.i < 4) 0 else blk: {
-            const idx: u6 = @intCast(63 - (self.i - 4));
-            break :blk @truncate(self.data >> idx);
-        };
-
-        self.i = (self.i + 1) % (64 + 4);
-        if (self.i == 0) self.enabled = false;
-
-        return bit;
-    }
-
-    fn dbgRead(self: *const Self) u1 {
-        if (!self.enabled) return 1;
-
-        const bit: u1 = if (self.i < 4) blk: {
-            break :blk 0;
-        } else blk: {
-            const idx: u6 = @intCast(63 - (self.i - 4));
-            break :blk @truncate(self.data >> idx);
-        };
-
-        return bit;
-    }
-
-    fn configure(self: *Self, value: u64) void {
-        self.data = value;
-        self.i = 0;
-        self.enabled = true;
-    }
-};
-
-const Writer = struct {
-    const Self = @This();
-
-    data: u64,
-    i: u8,
-
-    fn create() Self {
-        return .{ .data = 0, .i = 0 };
-    }
-
-    fn requestWrite(self: *Self, bit: u1) void {
-        const idx: u1 = @intCast(1 - self.i);
-        self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
-        self.i += 1;
-    }
-
-    fn addressWrite(self: *Self, kind: Eeprom.Kind, bit: u1) void {
-        if (kind == .Unknown) return;
-
-        const size: u4 = switch (kind) {
-            .Large => 13,
-            .Small => 5,
-            .Unknown => unreachable,
-        };
-
-        const idx: u4 = @intCast(size - self.i);
-        self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
-        self.i += 1;
-    }
-
-    fn dataWrite(self: *Self, bit: u1) void {
-        const idx: u6 = @intCast(63 - self.i);
-        self.data = (self.data & ~(@as(u64, 1) << idx)) | (@as(u64, bit) << idx);
-        self.i += 1;
-    }
-
-    fn len(self: *const Self) u8 {
-        return self.i;
-    }
-
-    fn finish(self: *Self) u64 {
-        defer self.reset();
-        return self.data;
-    }
-
-    fn reset(self: *Self) void {
-        self.i = 0;
-        self.data = 0;
-    }
-};
--- a/src/core/bus/dma.zig
+++ b/src/core/bus/dma.zig
@@ -1,364 +0,0 @@
-const std = @import("std");
-const util = @import("../../util.zig");
-
-const DmaControl = @import("io.zig").DmaControl;
-const Bus = @import("../Bus.zig");
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-
-pub const DmaTuple = struct { DmaController(0), DmaController(1), DmaController(2), DmaController(3) };
-const log = std.log.scoped(.DmaTransfer);
-
-const getHalf = util.getHalf;
-const setHalf = util.setHalf;
-const setQuart = util.setQuart;
-const handleInterrupt = @import("../cpu_util.zig").handleInterrupt;
-
-const rotr = @import("zba-util").rotr;
-
-pub fn create() DmaTuple {
-    return .{ DmaController(0).init(), DmaController(1).init(), DmaController(2).init(), DmaController(3).init() };
-}
-
-pub fn read(comptime T: type, dma: *const DmaTuple, addr: u32) ?T {
-    const byte_addr: u8 = @truncate(addr);
-
-    return switch (T) {
-        u32 => switch (byte_addr) {
-            0xB0, 0xB4 => null, // DMA0SAD, DMA0DAD,
-            0xB8 => @as(T, dma.*[0].dmacntH()) << 16, // DMA0CNT_L is write-only
-            0xBC, 0xC0 => null, // DMA1SAD, DMA1DAD
-            0xC4 => @as(T, dma.*[1].dmacntH()) << 16, // DMA1CNT_L is write-only
-            0xC8, 0xCC => null, // DMA2SAD, DMA2DAD
-            0xD0 => @as(T, dma.*[2].dmacntH()) << 16, // DMA2CNT_L is write-only
-            0xD4, 0xD8 => null, // DMA3SAD, DMA3DAD
-            0xDC => @as(T, dma.*[3].dmacntH()) << 16, // DMA3CNT_L is write-only
-            else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
-        },
-        u16 => switch (byte_addr) {
-            0xB0, 0xB2, 0xB4, 0xB6 => null, // DMA0SAD, DMA0DAD
-            0xB8 => 0x0000, // DMA0CNT_L, suite.gba expects 0x0000 instead of 0xDEAD
-            0xBA => dma.*[0].dmacntH(),
-
-            0xBC, 0xBE, 0xC0, 0xC2 => null, // DMA1SAD, DMA1DAD
-            0xC4 => 0x0000, // DMA1CNT_L
-            0xC6 => dma.*[1].dmacntH(),
-
-            0xC8, 0xCA, 0xCC, 0xCE => null, // DMA2SAD, DMA2DAD
-            0xD0 => 0x0000, // DMA2CNT_L
-            0xD2 => dma.*[2].dmacntH(),
-
-            0xD4, 0xD6, 0xD8, 0xDA => null, // DMA3SAD, DMA3DAD
-            0xDC => 0x0000, // DMA3CNT_L
-            0xDE => dma.*[3].dmacntH(),
-            else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
-        },
-        u8 => switch (byte_addr) {
-            0xB0...0xB7 => null, // DMA0SAD, DMA0DAD
-            0xB8, 0xB9 => 0x00, // DMA0CNT_L
-            0xBA, 0xBB => @truncate(dma.*[0].dmacntH() >> getHalf(byte_addr)),
-
-            0xBC...0xC3 => null, // DMA1SAD, DMA1DAD
-            0xC4, 0xC5 => 0x00, // DMA1CNT_L
-            0xC6, 0xC7 => @truncate(dma.*[1].dmacntH() >> getHalf(byte_addr)),
-
-            0xC8...0xCF => null, // DMA2SAD, DMA2DAD
-            0xD0, 0xD1 => 0x00, // DMA2CNT_L
-            0xD2, 0xD3 => @truncate(dma.*[2].dmacntH() >> getHalf(byte_addr)),
-
-            0xD4...0xDB => null, // DMA3SAD, DMA3DAD
-            0xDC, 0xDD => 0x00, // DMA3CNT_L
-            0xDE, 0xDF => @truncate(dma.*[3].dmacntH() >> getHalf(byte_addr)),
-            else => util.io.read.err(T, log, "unexpected {} read from 0x{X:0>8}", .{ T, addr }),
-        },
-        else => @compileError("DMA: Unsupported read width"),
-    };
-}
-
-pub fn write(comptime T: type, dma: *DmaTuple, addr: u32, value: T) void {
-    const byte_addr: u8 = @truncate(addr);
-
-    switch (T) {
-        u32 => switch (byte_addr) {
-            0xB0 => dma.*[0].setDmasad(value),
-            0xB4 => dma.*[0].setDmadad(value),
-            0xB8 => dma.*[0].setDmacnt(value),
-
-            0xBC => dma.*[1].setDmasad(value),
-            0xC0 => dma.*[1].setDmadad(value),
-            0xC4 => dma.*[1].setDmacnt(value),
-
-            0xC8 => dma.*[2].setDmasad(value),
-            0xCC => dma.*[2].setDmadad(value),
-            0xD0 => dma.*[2].setDmacnt(value),
-
-            0xD4 => dma.*[3].setDmasad(value),
-            0xD8 => dma.*[3].setDmadad(value),
-            0xDC => dma.*[3].setDmacnt(value),
-            else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
-        },
-        u16 => switch (byte_addr) {
-            0xB0, 0xB2 => dma.*[0].setDmasad(setHalf(u32, dma.*[0].sad, byte_addr, value)),
-            0xB4, 0xB6 => dma.*[0].setDmadad(setHalf(u32, dma.*[0].dad, byte_addr, value)),
-            0xB8 => dma.*[0].setDmacntL(value),
-            0xBA => dma.*[0].setDmacntH(value),
-
-            0xBC, 0xBE => dma.*[1].setDmasad(setHalf(u32, dma.*[1].sad, byte_addr, value)),
-            0xC0, 0xC2 => dma.*[1].setDmadad(setHalf(u32, dma.*[1].dad, byte_addr, value)),
-            0xC4 => dma.*[1].setDmacntL(value),
-            0xC6 => dma.*[1].setDmacntH(value),
-
-            0xC8, 0xCA => dma.*[2].setDmasad(setHalf(u32, dma.*[2].sad, byte_addr, value)),
-            0xCC, 0xCE => dma.*[2].setDmadad(setHalf(u32, dma.*[2].dad, byte_addr, value)),
-            0xD0 => dma.*[2].setDmacntL(value),
-            0xD2 => dma.*[2].setDmacntH(value),
-
-            0xD4, 0xD6 => dma.*[3].setDmasad(setHalf(u32, dma.*[3].sad, byte_addr, value)),
-            0xD8, 0xDA => dma.*[3].setDmadad(setHalf(u32, dma.*[3].dad, byte_addr, value)),
-            0xDC => dma.*[3].setDmacntL(value),
-            0xDE => dma.*[3].setDmacntH(value),
-            else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
-        },
-        u8 => switch (byte_addr) {
-            0xB0, 0xB1, 0xB2, 0xB3 => dma.*[0].setDmasad(setQuart(dma.*[0].sad, byte_addr, value)),
-            0xB4, 0xB5, 0xB6, 0xB7 => dma.*[0].setDmadad(setQuart(dma.*[0].dad, byte_addr, value)),
-            0xB8, 0xB9 => dma.*[0].setDmacntL(setHalf(u16, dma.*[0].word_count, byte_addr, value)),
-            0xBA, 0xBB => dma.*[0].setDmacntH(setHalf(u16, dma.*[0].cnt.raw, byte_addr, value)),
-
-            0xBC, 0xBD, 0xBE, 0xBF => dma.*[1].setDmasad(setQuart(dma.*[1].sad, byte_addr, value)),
-            0xC0, 0xC1, 0xC2, 0xC3 => dma.*[1].setDmadad(setQuart(dma.*[1].dad, byte_addr, value)),
-            0xC4, 0xC5 => dma.*[1].setDmacntL(setHalf(u16, dma.*[1].word_count, byte_addr, value)),
-            0xC6, 0xC7 => dma.*[1].setDmacntH(setHalf(u16, dma.*[1].cnt.raw, byte_addr, value)),
-
-            0xC8, 0xC9, 0xCA, 0xCB => dma.*[2].setDmasad(setQuart(dma.*[2].sad, byte_addr, value)),
-            0xCC, 0xCD, 0xCE, 0xCF => dma.*[2].setDmadad(setQuart(dma.*[2].dad, byte_addr, value)),
-            0xD0, 0xD1 => dma.*[2].setDmacntL(setHalf(u16, dma.*[2].word_count, byte_addr, value)),
-            0xD2, 0xD3 => dma.*[2].setDmacntH(setHalf(u16, dma.*[2].cnt.raw, byte_addr, value)),
-
-            0xD4, 0xD5, 0xD6, 0xD7 => dma.*[3].setDmasad(setQuart(dma.*[3].sad, byte_addr, value)),
-            0xD8, 0xD9, 0xDA, 0xDB => dma.*[3].setDmadad(setQuart(dma.*[3].dad, byte_addr, value)),
-            0xDC, 0xDD => dma.*[3].setDmacntL(setHalf(u16, dma.*[3].word_count, byte_addr, value)),
-            0xDE, 0xDF => dma.*[3].setDmacntH(setHalf(u16, dma.*[3].cnt.raw, byte_addr, value)),
-            else => util.io.write.undef(log, "Tried to write 0x{X:0>2}{} to 0x{X:0>8}", .{ value, T, addr }),
-        },
-        else => @compileError("DMA: Unsupported write width"),
-    }
-}
-
-/// Function that creates a DMAController. Determines unique DMA Controller behaiour at compile-time
-fn DmaController(comptime id: u2) type {
-    return struct {
-        const Self = @This();
-
-        const sad_mask: u32 = if (id == 0) 0x07FF_FFFF else 0x0FFF_FFFF;
-        const dad_mask: u32 = if (id != 3) 0x07FF_FFFF else 0x0FFF_FFFF;
-        const WordCount = if (id == 3) u16 else u14;
-
-        /// Write-only. The first address in a DMA transfer. (DMASAD)
-        /// Note: use writeSrc instead of manipulating src_addr directly
-        sad: u32,
-        /// Write-only. The final address in a DMA transffer. (DMADAD)
-        /// Note: Use writeDst instead of manipulatig dst_addr directly
-        dad: u32,
-        /// Write-only. The Word Count for the DMA Transfer (DMACNT_L)
-        word_count: WordCount,
-        /// Read / Write. DMACNT_H
-        /// Note: Use writeControl instead of manipulating cnt directly.
-        cnt: DmaControl,
-
-        /// Internal. The last successfully read value
-        data_latch: u32,
-        /// Internal. Currrent Source Address
-        sad_latch: u32,
-        /// Internal. Current Destination Address
-        dad_latch: u32,
-        /// Internal. Word Count
-        _word_count: WordCount,
-
-        /// Some DMA Transfers are enabled during Hblank / VBlank and / or
-        /// have delays. Thefore bit 15 of DMACNT isn't actually something
-        /// we can use to control when we do or do not execute a step in a DMA Transfer
-        in_progress: bool,
-
-        pub fn init() Self {
-            return .{
-                .sad = 0,
-                .dad = 0,
-                .word_count = 0,
-                .cnt = .{ .raw = 0x000 },
-
-                // Internals
-                .sad_latch = 0,
-                .dad_latch = 0,
-                .data_latch = 0,
-
-                ._word_count = 0,
-                .in_progress = false,
-            };
-        }
-
-        pub fn reset(self: *Self) void {
-            self.* = Self.init();
-        }
-
-        pub fn setDmasad(self: *Self, addr: u32) void {
-            self.sad = addr & sad_mask;
-        }
-
-        pub fn setDmadad(self: *Self, addr: u32) void {
-            self.dad = addr & dad_mask;
-        }
-
-        pub fn setDmacntL(self: *Self, halfword: u16) void {
-            self.word_count = @truncate(halfword);
-        }
-
-        pub fn dmacntH(self: *const Self) u16 {
-            return self.cnt.raw & if (id == 3) 0xFFE0 else 0xF7E0;
-        }
-
-        pub fn setDmacntH(self: *Self, halfword: u16) void {
-            const new = DmaControl{ .raw = halfword };
-
-            if (!self.cnt.enabled.read() and new.enabled.read()) {
-                // Reload Internals on Rising Edge.
-                self.sad_latch = self.sad;
-                self.dad_latch = self.dad;
-                self._word_count = if (self.word_count == 0) std.math.maxInt(WordCount) else self.word_count;
-
-                // Only a Start Timing of 00 has a DMA Transfer immediately begin
-                self.in_progress = new.start_timing.read() == 0b00;
-            }
-
-            self.cnt.raw = halfword;
-        }
-
-        pub fn setDmacnt(self: *Self, word: u32) void {
-            self.setDmacntL(@truncate(word));
-            self.setDmacntH(@truncate(word >> 16));
-        }
-
-        pub fn step(self: *Self, cpu: *Arm7tdmi) void {
-            const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-            const is_fifo = (id == 1 or id == 2) and self.cnt.start_timing.read() == 0b11;
-            const sad_adj: Adjustment = @enumFromInt(self.cnt.sad_adj.read());
-            const dad_adj: Adjustment = if (is_fifo) .Fixed else @enumFromInt(self.cnt.dad_adj.read());
-
-            const transfer_type = is_fifo or self.cnt.transfer_type.read();
-            const offset: u32 = if (transfer_type) @sizeOf(u32) else @sizeOf(u16);
-
-            const mask = if (transfer_type) ~@as(u32, 3) else ~@as(u32, 1);
-            const sad_addr = self.sad_latch & mask;
-            const dad_addr = self.dad_latch & mask;
-
-            if (transfer_type) {
-                if (sad_addr >= 0x0200_0000) self.data_latch = cpu.bus.read(u32, sad_addr);
-                cpu.bus.write(u32, dad_addr, self.data_latch);
-            } else {
-                if (sad_addr >= 0x0200_0000) {
-                    const value: u32 = cpu.bus.read(u16, sad_addr);
-                    self.data_latch = value << 16 | value;
-                }
-
-                cpu.bus.write(u16, dad_addr, @as(u16, @truncate(rotr(u32, self.data_latch, 8 * (dad_addr & 3)))));
-            }
-
-            switch (@as(u8, @truncate(sad_addr >> 24))) {
-                // according to fleroviux, DMAs with a source address in ROM misbehave
-                // the resultant behaviour is that the source address will increment despite what DMAXCNT says
-                0x08...0x0D => self.sad_latch +%= offset, // obscure behaviour
-                else => switch (sad_adj) {
-                    .Increment => self.sad_latch +%= offset,
-                    .Decrement => self.sad_latch -%= offset,
-                    .IncrementReload => log.err("{} is a prohibited adjustment on SAD", .{sad_adj}),
-                    .Fixed => {},
-                },
-            }
-
-            switch (dad_adj) {
-                .Increment, .IncrementReload => self.dad_latch +%= offset,
-                .Decrement => self.dad_latch -%= offset,
-                .Fixed => {},
-            }
-
-            self._word_count -= 1;
-
-            if (self._word_count == 0) {
-                if (self.cnt.irq.read()) {
-                    switch (id) {
-                        0 => bus_ptr.io.irq.dma0.set(),
-                        1 => bus_ptr.io.irq.dma1.set(),
-                        2 => bus_ptr.io.irq.dma2.set(),
-                        3 => bus_ptr.io.irq.dma3.set(),
-                    }
-
-                    handleInterrupt(cpu);
-                }
-
-                // If we're not repeating, Fire the IRQs and disable the DMA
-                if (!self.cnt.repeat.read()) self.cnt.enabled.unset();
-
-                // We want to disable our internal enabled flag regardless of repeat
-                // because we only want to step A DMA that repeats during it's specific
-                // timing window
-                self.in_progress = false;
-            }
-        }
-
-        fn poll(self: *Self, comptime kind: DmaKind) void {
-            if (self.in_progress) return; // If there's an ongoing DMA Transfer, exit early
-
-            // No ongoing DMA Transfer, We want to check if we should repeat an existing one
-            // Determined by the repeat bit and whether the DMA is in the right start_timing
-            switch (kind) {
-                .VBlank => self.in_progress = self.cnt.enabled.read() and self.cnt.start_timing.read() == 0b01,
-                .HBlank => self.in_progress = self.cnt.enabled.read() and self.cnt.start_timing.read() == 0b10,
-                .Immediate, .Special => {},
-            }
-
-            // If we determined that the repeat bit is set (and now the Hblank / Vblank DMA is now in progress)
-            // Reload internal word count latch
-            // Reload internal DAD latch if we are in IncrementRelaod
-            if (self.in_progress) {
-                self._word_count = if (self.word_count == 0) std.math.maxInt(@TypeOf(self._word_count)) else self.word_count;
-                if (@as(Adjustment, @enumFromInt(self.cnt.dad_adj.read())) == .IncrementReload) self.dad_latch = self.dad;
-            }
-        }
-
-        pub fn requestAudio(self: *Self, _: u32) void {
-            comptime std.debug.assert(id == 1 or id == 2);
-            if (self.in_progress) return; // APU must wait their turn
-
-            // DMA May not be configured for handling DMAs
-            if (self.cnt.start_timing.read() != 0b11) return;
-
-            // We Assume the Repeat Bit is Set
-            // We Assume that DAD is set to 0x0400_00A0 or 0x0400_00A4 (fifo_addr)
-            // We Assume DMACNT_L is set to 4
-
-            // FIXME: Safe to just assume whatever DAD is set to is the FIFO Address?
-            // self.dad_latch = fifo_addr;
-            self.cnt.repeat.set();
-            self._word_count = 4;
-            self.in_progress = true;
-        }
-    };
-}
-
-pub fn onBlanking(bus: *Bus, comptime kind: DmaKind) void {
-    inline for (0..4) |i| bus.dma[i].poll(kind);
-}
-
-const Adjustment = enum(u2) {
-    Increment = 0,
-    Decrement = 1,
-    Fixed = 2,
-    IncrementReload = 3,
-};
-
-const DmaKind = enum(u2) {
-    Immediate = 0,
-    HBlank,
-    VBlank,
-    Special,
-};
--- a/src/core/bus/gpio.zig
+++ b/src/core/bus/gpio.zig
@@ -1,464 +0,0 @@
-const std = @import("std");
-const Bit = @import("bitfield").Bit;
-const DateTime = @import("datetime").datetime.Datetime;
-
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const Bus = @import("../Bus.zig");
-const Scheduler = @import("../scheduler.zig").Scheduler;
-const Allocator = std.mem.Allocator;
-
-const handleInterrupt = @import("../cpu_util.zig").handleInterrupt;
-
-/// GPIO Register Implementation
-pub const Gpio = struct {
-    const Self = @This();
-    const log = std.log.scoped(.Gpio);
-
-    data: u4,
-    direction: u4,
-    cnt: u1,
-
-    device: Device,
-
-    const Register = enum { Data, Direction, Control };
-
-    pub const Device = struct {
-        ptr: ?*anyopaque,
-        kind: Kind, // TODO: Make comptime known?
-
-        pub const Kind = enum { Rtc, None };
-
-        fn step(self: *Device, value: u4) u4 {
-            return switch (self.kind) {
-                .Rtc => blk: {
-                    const clock: *Clock = @ptrCast(@alignCast(self.ptr.?));
-                    break :blk clock.step(.{ .raw = value });
-                },
-                .None => value,
-            };
-        }
-
-        fn init(kind: Kind, ptr: ?*anyopaque) Device {
-            return .{ .kind = kind, .ptr = ptr };
-        }
-    };
-
-    pub fn write(self: *Self, comptime reg: Register, value: if (reg == .Control) u1 else u4) void {
-        switch (reg) {
-            .Data => {
-                const masked_value = value & self.direction;
-
-                // The value which is actually stored in the GPIO register
-                // might be modified by the device implementing the GPIO interface e.g. RTC reads
-                self.data = self.device.step(masked_value);
-            },
-            .Direction => self.direction = value,
-            .Control => self.cnt = value,
-        }
-    }
-
-    pub fn read(self: *const Self, comptime reg: Register) if (reg == .Control) u1 else u4 {
-        if (self.cnt == 0) return 0;
-
-        return switch (reg) {
-            .Data => self.data & ~self.direction,
-            .Direction => self.direction,
-            .Control => self.cnt,
-        };
-    }
-
-    pub fn init(allocator: Allocator, cpu: *Arm7tdmi, kind: Device.Kind) !*Self {
-        log.info("Device: {}", .{kind});
-
-        const self = try allocator.create(Self);
-        errdefer allocator.destroy(self);
-
-        self.* = .{
-            .data = 0b0000,
-            .direction = 0b1111, // TODO: What is GPIO Direction set to by default?
-            .cnt = 0b0,
-
-            .device = switch (kind) {
-                .Rtc => blk: {
-                    const clock = try allocator.create(Clock);
-                    clock.init(cpu, self);
-
-                    break :blk Device{ .kind = kind, .ptr = clock };
-                },
-                .None => Device{ .kind = kind, .ptr = null },
-            },
-        };
-
-        return self;
-    }
-
-    pub fn deinit(self: *Self, allocator: Allocator) void {
-        switch (self.device.kind) {
-            .Rtc => allocator.destroy(@as(*Clock, @ptrCast(@alignCast(self.device.ptr.?)))),
-            .None => {},
-        }
-
-        self.* = undefined;
-    }
-};
-
-/// GBA Real Time Clock
-pub const Clock = struct {
-    const Self = @This();
-    const log = std.log.scoped(.Rtc);
-
-    writer: Writer,
-    reader: Reader,
-    state: State,
-    cnt: Control,
-
-    year: u8,
-    month: u5,
-    day: u6,
-    weekday: u3,
-    hour: u6,
-    minute: u7,
-    second: u7,
-
-    cpu: *Arm7tdmi,
-    gpio: *const Gpio,
-
-    const Register = enum {
-        Control,
-        DateTime,
-        Time,
-    };
-
-    const State = union(enum) {
-        Idle,
-        Command,
-        Write: Register,
-        Read: Register,
-    };
-
-    const Reader = struct {
-        i: u4,
-        count: u8,
-
-        /// Reads a bit from RTC registers. Which bit it reads is dependent on
-        ///
-        /// 1. The RTC State Machine, whitch tells us which register we're accessing
-        /// 2. A `count`, which keeps track of which byte is currently being read
-        /// 3. An index, which keeps track of which bit of the byte determined by `count` is being read
-        fn read(self: *Reader, clock: *const Clock, register: Register) u1 {
-            const idx: u3 = @intCast(self.i);
-            defer self.i += 1;
-
-            // FIXME: What do I do about the unused bits?
-            return switch (register) {
-                .Control => @truncate(switch (self.count) {
-                    0 => clock.cnt.raw >> idx,
-                    else => std.debug.panic("Tried to read from byte #{} of {} (hint: there's only 1 byte)", .{ self.count, register }),
-                }),
-                .DateTime => @truncate(switch (self.count) {
-                    // Date
-                    0 => clock.year >> idx,
-                    1 => @as(u8, clock.month) >> idx,
-                    2 => @as(u8, clock.day) >> idx,
-                    3 => @as(u8, clock.weekday) >> idx,
-
-                    // Time
-                    4 => @as(u8, clock.hour) >> idx,
-                    5 => @as(u8, clock.minute) >> idx,
-                    6 => @as(u8, clock.second) >> idx,
-                    else => std.debug.panic("Tried to read from byte #{} of {} (hint: there's only 7 bytes)", .{ self.count, register }),
-                }),
-                .Time => @truncate(switch (self.count) {
-                    0 => @as(u8, clock.hour) >> idx,
-                    1 => @as(u8, clock.minute) >> idx,
-                    2 => @as(u8, clock.second) >> idx,
-                    else => std.debug.panic("Tried to read from byte #{} of {} (hint: there's only 3 bytes)", .{ self.count, register }),
-                }),
-            };
-        }
-
-        /// Is true when a Reader has read a u8's worth of bits
-        fn finished(self: *const Reader) bool {
-            return self.i >= 8;
-        }
-
-        /// Resets the index used to shift bits out of RTC registers
-        /// and `count`, which is used to keep track of which byte we're reading
-        /// is incremeneted
-        fn lap(self: *Reader) void {
-            self.i = 0;
-            self.count += 1;
-        }
-
-        /// Resets the state of a `Reader` in preparation for a future
-        /// read command
-        fn reset(self: *Reader) void {
-            self.i = 0;
-            self.count = 0;
-        }
-    };
-
-    const Writer = struct {
-        buf: u8,
-        i: u4,
-
-        /// The Number of bytes written since last reset
-        count: u8,
-
-        /// Append a bit to the internal bit buffer (aka an integer)
-        fn push(self: *Writer, value: u1) void {
-            const idx: u3 = @intCast(self.i);
-            self.buf = (self.buf & ~(@as(u8, 1) << idx)) | @as(u8, value) << idx;
-            self.i += 1;
-        }
-
-        /// Takes the contents of the internal buffer and writes it to an RTC register
-        /// Where it writes to is dependent on:
-        ///
-        /// 1. The RTC State Machine, whitch tells us which register we're accessing
-        /// 2. A `count`, which keeps track of which byte is currently being read
-        fn write(self: *const Writer, clock: *Clock, register: Register) void {
-            // FIXME: What do do about unused bits?
-            switch (register) {
-                .Control => switch (self.count) {
-                    0 => clock.cnt.raw = (clock.cnt.raw & 0x80) | (self.buf & 0x7F), // Bit 7 read-only
-                    else => std.debug.panic("Tried to write to byte #{} of {} (hint: there's only 1 byte)", .{ self.count, register }),
-                },
-                .DateTime, .Time => log.debug("Ignoring {} write", .{register}),
-            }
-        }
-
-        /// Is true when 8 bits have been shifted into the internal buffer
-        fn finished(self: *const Writer) bool {
-            return self.i >= 8;
-        }
-
-        /// Resets the internal buffer
-        /// resets the index used to shift bits into the internal buffer
-        /// increments `count` (which keeps track of byte offsets) by one
-        fn lap(self: *Writer) void {
-            self.buf = 0;
-            self.i = 0;
-            self.count += 1;
-        }
-
-        /// Resets `Writer` to a clean state in preparation for a future write command
-        fn reset(self: *Writer) void {
-            self.buf = 0;
-            self.i = 0;
-            self.count = 0;
-        }
-    };
-
-    const Data = extern union {
-        sck: Bit(u8, 0),
-        sio: Bit(u8, 1),
-        cs: Bit(u8, 2),
-        raw: u8,
-    };
-
-    const Control = extern union {
-        /// Unknown, value should be preserved though
-        unk: Bit(u8, 1),
-        /// Per-minute IRQ
-        /// If set, fire a Gamepak IRQ every 30s,
-        irq: Bit(u8, 3),
-        /// 12/24 Hour Bit
-        /// If set, 12h mode
-        /// If cleared, 24h mode
-        mode: Bit(u8, 6),
-        /// Read-Only, bit cleared on read
-        /// If is set, means that there has been a failure / time has been lost
-        off: Bit(u8, 7),
-        raw: u8,
-    };
-
-    fn init(ptr: *Self, cpu: *Arm7tdmi, gpio: *const Gpio) void {
-        ptr.* = .{
-            .writer = .{ .buf = 0, .i = 0, .count = 0 },
-            .reader = .{ .i = 0, .count = 0 },
-            .state = .Idle,
-            .cnt = .{ .raw = 0 },
-            .year = 0x01,
-            .month = 0x6,
-            .day = 0x13,
-            .weekday = 0x3,
-            .hour = 0x23,
-            .minute = 0x59,
-            .second = 0x59,
-            .cpu = cpu,
-            .gpio = gpio, // Can't use Arm7tdmi ptr b/c not initialized yet
-        };
-
-        const sched_ptr: *Scheduler = @ptrCast(@alignCast(cpu.sched.ptr));
-        sched_ptr.push(.RealTimeClock, 1 << 24); // Every Second
-    }
-
-    pub fn onClockUpdate(self: *Self, late: u64) void {
-        const sched_ptr: *Scheduler = @ptrCast(@alignCast(self.cpu.sched.ptr));
-        sched_ptr.push(.RealTimeClock, (1 << 24) -| late); // Reschedule
-
-        const now = DateTime.now();
-        self.year = bcd(@intCast(now.date.year - 2000));
-        self.month = @truncate(bcd(now.date.month));
-        self.day = @truncate(bcd(now.date.day));
-        self.weekday = @truncate(bcd((now.date.weekday() + 1) % 7)); // API is Monday = 0, Sunday = 6. We want Sunday = 0, Saturday = 6
-        self.hour = @truncate(bcd(now.time.hour));
-        self.minute = @truncate(bcd(now.time.minute));
-        self.second = @truncate(bcd(now.time.second));
-    }
-
-    fn step(self: *Self, value: Data) u4 {
-        const cache: Data = .{ .raw = self.gpio.data };
-
-        return switch (self.state) {
-            .Idle => blk: {
-                // FIXME: Maybe check incoming value to see if SCK is also high?
-                if (cache.sck.read()) {
-                    if (!cache.cs.read() and value.cs.read()) {
-                        log.debug("Entering Command Mode", .{});
-                        self.state = .Command;
-                    }
-                }
-
-                break :blk @truncate(value.raw);
-            },
-            .Command => blk: {
-                if (!value.cs.read()) log.err("Expected CS to be set during {}, however CS was cleared", .{self.state});
-
-                // If SCK rises, sample SIO
-                if (!cache.sck.read() and value.sck.read()) {
-                    self.writer.push(@intFromBool(value.sio.read()));
-
-                    if (self.writer.finished()) {
-                        self.state = self.processCommand(self.writer.buf);
-                        self.writer.reset();
-
-                        log.debug("Switching to {}", .{self.state});
-                    }
-                }
-
-                break :blk @truncate(value.raw);
-            },
-            .Write => |register| blk: {
-                if (!value.cs.read()) log.err("Expected CS to be set during {}, however CS was cleared", .{self.state});
-
-                // If SCK rises, sample SIO
-                if (!cache.sck.read() and value.sck.read()) {
-                    self.writer.push(@intFromBool(value.sio.read()));
-
-                    const register_width: u32 = switch (register) {
-                        .Control => 1,
-                        .DateTime => 7,
-                        .Time => 3,
-                    };
-
-                    if (self.writer.finished()) {
-                        self.writer.write(self, register); // write inner buffer to RTC register
-                        self.writer.lap();
-
-                        if (self.writer.count == register_width) {
-                            self.writer.reset();
-                            self.state = .Idle;
-                        }
-                    }
-                }
-
-                break :blk @truncate(value.raw);
-            },
-            .Read => |register| blk: {
-                if (!value.cs.read()) log.err("Expected CS to be set during {}, however CS was cleared", .{self.state});
-                var ret = value;
-
-                // if SCK rises, sample SIO
-                if (!cache.sck.read() and value.sck.read()) {
-                    ret.sio.write(self.reader.read(self, register) == 0b1);
-
-                    const register_width: u32 = switch (register) {
-                        .Control => 1,
-                        .DateTime => 7,
-                        .Time => 3,
-                    };
-
-                    if (self.reader.finished()) {
-                        self.reader.lap();
-
-                        if (self.reader.count == register_width) {
-                            self.reader.reset();
-                            self.state = .Idle;
-                        }
-                    }
-                }
-
-                break :blk @truncate(ret.raw);
-            },
-        };
-    }
-
-    fn reset(self: *Self) void {
-        // mGBA and NBA only zero the control register. We will do the same
-        log.debug("Reset (control register was zeroed)", .{});
-
-        self.cnt.raw = 0;
-    }
-
-    fn irq(self: *Self) void {
-        const bus_ptr: *Bus = @ptrCast(@alignCast(self.cpu.bus.ptr));
-
-        // TODO: Confirm that this is the right behaviour
-        log.debug("Force GamePak IRQ", .{});
-
-        bus_ptr.io.irq.game_pak.set();
-        handleInterrupt(self.cpu);
-    }
-
-    fn processCommand(self: *Self, raw_command: u8) State {
-        const command = blk: {
-            // If High Nybble is 0x6, no need to switch the endianness
-            if (raw_command >> 4 & 0xF == 0x6) break :blk raw_command;
-
-            // Turns out reversing the order of bits isn't trivial at all
-            // https://stackoverflow.com/questions/2602823/in-c-c-whats-the-simplest-way-to-reverse-the-order-of-bits-in-a-byte
-            var ret = raw_command;
-            ret = (ret & 0xF0) >> 4 | (ret & 0x0F) << 4;
-            ret = (ret & 0xCC) >> 2 | (ret & 0x33) << 2;
-            ret = (ret & 0xAA) >> 1 | (ret & 0x55) << 1;
-
-            break :blk ret;
-        };
-        log.debug("Handling Command 0x{X:0>2} [0b{b:0>8}]", .{ command, command });
-
-        const is_write = command & 1 == 0;
-        const rtc_register: u3 = @truncate(command >> 1 & 0x7);
-
-        if (is_write) {
-            return switch (rtc_register) {
-                0 => blk: {
-                    self.reset();
-                    break :blk .Idle;
-                },
-                1 => .{ .Write = .Control },
-                2 => .{ .Write = .DateTime },
-                3 => .{ .Write = .Time },
-                6 => blk: {
-                    self.irq();
-                    break :blk .Idle;
-                },
-                4, 5, 7 => .Idle,
-            };
-        } else {
-            return switch (rtc_register) {
-                1 => .{ .Read = .Control },
-                2 => .{ .Read = .DateTime },
-                3 => .{ .Read = .Time },
-                0, 4, 5, 6, 7 => .Idle, // Do Nothing
-            };
-        }
-    }
-};
-
-/// Converts an 8-bit unsigned integer to its BCD representation.
-/// Note: Algorithm only works for values between 0 and 99 inclusive.
-fn bcd(value: u8) u8 {
-    return ((value / 10) << 4) + (value % 10);
-}
--- a/src/core/bus/timer.zig
+++ b/src/core/bus/timer.zig
@@ -1,254 +0,0 @@
-const std = @import("std");
-const util = @import("../../util.zig");
-
-const TimerControl = @import("io.zig").TimerControl;
-const Scheduler = @import("../scheduler.zig").Scheduler;
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const Bus = @import("../Bus.zig");
-
-const handleInterrupt = @import("../cpu_util.zig").handleInterrupt;
-
-pub const TimerTuple = struct { Timer(0), Timer(1), Timer(2), Timer(3) };
-const log = std.log.scoped(.Timer);
-
-const getHalf = util.getHalf;
-const setHalf = util.setHalf;
-
-pub fn create(sched: *Scheduler) TimerTuple {
-    return .{ Timer(0).init(sched), Timer(1).init(sched), Timer(2).init(sched), Timer(3).init(sched) };
-}
-
-pub fn read(comptime T: type, tim: *const TimerTuple, addr: u32) ?T {
-    const nybble_addr: u4 = @truncate(addr);
-
-    return switch (T) {
-        u32 => switch (nybble_addr) {
-            0x0 => @as(T, tim.*[0].cnt.raw) << 16 | tim.*[0].timcntL(),
-            0x4 => @as(T, tim.*[1].cnt.raw) << 16 | tim.*[1].timcntL(),
-            0x8 => @as(T, tim.*[2].cnt.raw) << 16 | tim.*[2].timcntL(),
-            0xC => @as(T, tim.*[3].cnt.raw) << 16 | tim.*[3].timcntL(),
-            else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
-        },
-        u16 => switch (nybble_addr) {
-            0x0 => tim.*[0].timcntL(),
-            0x2 => tim.*[0].cnt.raw,
-
-            0x4 => tim.*[1].timcntL(),
-            0x6 => tim.*[1].cnt.raw,
-
-            0x8 => tim.*[2].timcntL(),
-            0xA => tim.*[2].cnt.raw,
-
-            0xC => tim.*[3].timcntL(),
-            0xE => tim.*[3].cnt.raw,
-            else => util.io.read.err(T, log, "unaligned {} read from 0x{X:0>8}", .{ T, addr }),
-        },
-        u8 => switch (nybble_addr) {
-            0x0, 0x1 => @truncate(tim.*[0].timcntL() >> getHalf(nybble_addr)),
-            0x2, 0x3 => @truncate(tim.*[0].cnt.raw >> getHalf(nybble_addr)),
-
-            0x4, 0x5 => @truncate(tim.*[1].timcntL() >> getHalf(nybble_addr)),
-            0x6, 0x7 => @truncate(tim.*[1].cnt.raw >> getHalf(nybble_addr)),
-
-            0x8, 0x9 => @truncate(tim.*[2].timcntL() >> getHalf(nybble_addr)),
-            0xA, 0xB => @truncate(tim.*[2].cnt.raw >> getHalf(nybble_addr)),
-
-            0xC, 0xD => @truncate(tim.*[3].timcntL() >> getHalf(nybble_addr)),
-            0xE, 0xF => @truncate(tim.*[3].cnt.raw >> getHalf(nybble_addr)),
-        },
-        else => @compileError("TIM: Unsupported read width"),
-    };
-}
-
-pub fn write(comptime T: type, tim: *TimerTuple, addr: u32, value: T) void {
-    const nybble_addr: u4 = @truncate(addr);
-
-    return switch (T) {
-        u32 => switch (nybble_addr) {
-            0x0 => tim.*[0].setTimcnt(value),
-            0x4 => tim.*[1].setTimcnt(value),
-            0x8 => tim.*[2].setTimcnt(value),
-            0xC => tim.*[3].setTimcnt(value),
-            else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, addr }),
-        },
-        u16 => switch (nybble_addr) {
-            0x0 => tim.*[0].setTimcntL(value),
-            0x2 => tim.*[0].setTimcntH(value),
-
-            0x4 => tim.*[1].setTimcntL(value),
-            0x6 => tim.*[1].setTimcntH(value),
-
-            0x8 => tim.*[2].setTimcntL(value),
-            0xA => tim.*[2].setTimcntH(value),
-
-            0xC => tim.*[3].setTimcntL(value),
-            0xE => tim.*[3].setTimcntH(value),
-            else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, addr }),
-        },
-        u8 => switch (nybble_addr) {
-            0x0, 0x1 => tim.*[0].setTimcntL(setHalf(u16, tim.*[0]._reload, nybble_addr, value)),
-            0x2, 0x3 => tim.*[0].setTimcntH(setHalf(u16, tim.*[0].cnt.raw, nybble_addr, value)),
-
-            0x4, 0x5 => tim.*[1].setTimcntL(setHalf(u16, tim.*[1]._reload, nybble_addr, value)),
-            0x6, 0x7 => tim.*[1].setTimcntH(setHalf(u16, tim.*[1].cnt.raw, nybble_addr, value)),
-
-            0x8, 0x9 => tim.*[2].setTimcntL(setHalf(u16, tim.*[2]._reload, nybble_addr, value)),
-            0xA, 0xB => tim.*[2].setTimcntH(setHalf(u16, tim.*[2].cnt.raw, nybble_addr, value)),
-
-            0xC, 0xD => tim.*[3].setTimcntL(setHalf(u16, tim.*[3]._reload, nybble_addr, value)),
-            0xE, 0xF => tim.*[3].setTimcntH(setHalf(u16, tim.*[3].cnt.raw, nybble_addr, value)),
-        },
-        else => @compileError("TIM: Unsupported write width"),
-    };
-}
-
-fn Timer(comptime id: u2) type {
-    return struct {
-        const Self = @This();
-
-        /// Read Only, Internal. Please use self.timcntL()
-        _counter: u16,
-
-        /// Write Only, Internal. Please use self.setTimcntL()
-        _reload: u16,
-
-        /// Write Only, Internal. Please use self.setTimcntH()
-        cnt: TimerControl,
-
-        /// Internal.
-        sched: *Scheduler,
-
-        /// Internal
-        _start_timestamp: u64,
-
-        pub fn init(sched: *Scheduler) Self {
-            return .{
-                ._reload = 0,
-                ._counter = 0,
-                .cnt = .{ .raw = 0x0000 },
-                .sched = sched,
-                ._start_timestamp = 0,
-            };
-        }
-
-        pub fn reset(self: *Self) void {
-            const scheduler = self.sched;
-
-            self.* = Self.init(scheduler);
-        }
-
-        /// TIMCNT_L Getter
-        pub fn timcntL(self: *const Self) u16 {
-            if (self.cnt.cascade.read() or !self.cnt.enabled.read()) return self._counter;
-
-            return self._counter +% @as(u16, @truncate((self.sched.now() - self._start_timestamp) / self.frequency()));
-        }
-
-        /// TIMCNT_L Setter
-        pub fn setTimcntL(self: *Self, halfword: u16) void {
-            self._reload = halfword;
-        }
-
-        /// TIMCNT_L & TIMCNT_H
-        pub fn setTimcnt(self: *Self, word: u32) void {
-            self.setTimcntL(@truncate(word));
-            self.setTimcntH(@truncate(word >> 16));
-        }
-
-        /// TIMCNT_H
-        pub fn setTimcntH(self: *Self, halfword: u16) void {
-            const new = TimerControl{ .raw = halfword };
-
-            if (self.cnt.enabled.read()) {
-                // timer was already enabled
-
-                // If enabled falling edge or cascade falling edge, timer is paused
-                if (!new.enabled.read() or (!self.cnt.cascade.read() and new.cascade.read())) {
-                    self.sched.removeScheduledEvent(.{ .TimerOverflow = id });
-
-                    // Counter should hold the value it stopped at meaning we have to calculate it now
-                    self._counter +%= @truncate((self.sched.now() - self._start_timestamp) / self.frequency());
-                }
-
-                // the timer has always been enabled, but the cascade bit which was blocking the timer has been unset
-                if (new.enabled.read() and (self.cnt.cascade.read() and !new.cascade.read())) {
-                    // we want to reschedule the timer event, however we won't reload the counter.
-                    // the invariant here is that self._counter holds the already calculated paused value
-
-                    self.rescheduleTimerExpire(0);
-                }
-            } else {
-                // the timer was previously disabeld
-
-                if (new.enabled.read()) {
-                    // timer should start counting (with a reloaded counter value)
-                    self._counter = self._reload;
-
-                    // if cascade happens to be set, the timer doesn't actually do anything though
-                    if (!new.cascade.read()) self.rescheduleTimerExpire(0);
-                }
-            }
-
-            self.cnt.raw = halfword;
-        }
-
-        pub fn onTimerExpire(self: *Self, cpu: *Arm7tdmi, late: u64) void {
-            // Fire IRQ if enabled
-            const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-            const io = &bus_ptr.io;
-
-            if (self.cnt.irq.read()) {
-                switch (id) {
-                    0 => io.irq.tim0.set(),
-                    1 => io.irq.tim1.set(),
-                    2 => io.irq.tim2.set(),
-                    3 => io.irq.tim3.set(),
-                }
-
-                handleInterrupt(cpu);
-            }
-
-            // DMA Sound Things
-            if (id == 0 or id == 1) {
-                bus_ptr.apu.onDmaAudioSampleRequest(cpu, id);
-            }
-
-            // Perform Cascade Behaviour
-            switch (id) {
-                inline 0, 1, 2 => |idx| {
-                    const next = idx + 1;
-
-                    if (bus_ptr.tim[next].cnt.cascade.read()) {
-                        bus_ptr.tim[next]._counter +%= 1;
-                        if (bus_ptr.tim[next]._counter == 0) bus_ptr.tim[next].onTimerExpire(cpu, late);
-                    }
-                },
-                3 => {}, // THere is no timer for TIM3 to cascade to
-            }
-
-            // Reschedule Timer if we're not cascading
-            // TIM0 cascade value is N/A
-            if (id == 0 or !self.cnt.cascade.read()) {
-                self._counter = self._reload;
-                self.rescheduleTimerExpire(late);
-            }
-        }
-
-        fn rescheduleTimerExpire(self: *Self, late: u64) void {
-            const when = (@as(u64, 0x10000) - self._counter) * self.frequency();
-
-            self._start_timestamp = self.sched.now();
-            self.sched.push(.{ .TimerOverflow = id }, when -| late);
-        }
-
-        fn frequency(self: *const Self) u16 {
-            return switch (self.cnt.frequency.read()) {
-                0 => 1,
-                1 => 64,
-                2 => 256,
-                3 => 1024,
-            };
-        }
-    };
-}
--- a/src/core/cpu_util.zig
+++ b/src/core/cpu_util.zig
@@ -1,75 +0,0 @@
-const std = @import("std");
-
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const Bank = @import("arm32").Arm7tdmi.Bank;
-const Bus = @import("Bus.zig");
-
-pub inline fn isHalted(cpu: *const Arm7tdmi) bool {
-    const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-    return bus_ptr.io.haltcnt == .Halt;
-}
-
-pub fn stepDmaTransfer(cpu: *Arm7tdmi) bool {
-    const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-    inline for (0..4) |i| {
-        if (bus_ptr.dma[i].in_progress) {
-            bus_ptr.dma[i].step(cpu);
-            return true;
-        }
-    }
-
-    return false;
-}
-
-pub fn handleInterrupt(cpu: *Arm7tdmi) void {
-    const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-    const should_handle = bus_ptr.io.ie.raw & bus_ptr.io.irq.raw;
-
-    // Return if IME is disabled, CPSR I is set or there is nothing to handle
-    if (!bus_ptr.io.ime or cpu.cpsr.i.read() or should_handle == 0) return;
-
-    // If Pipeline isn't full, we have a bug
-    std.debug.assert(cpu.pipe.isFull());
-
-    // log.debug("Handling Interrupt!", .{});
-    bus_ptr.io.haltcnt = .Execute;
-
-    // FIXME: This seems weird, but retAddr.gba suggests I need to make these changes
-    const ret_addr = cpu.r[15] - if (cpu.cpsr.t.read()) 0 else @as(u32, 4);
-    const new_spsr = cpu.cpsr.raw;
-
-    cpu.changeMode(.Irq);
-    cpu.cpsr.t.write(false);
-    cpu.cpsr.i.write(true);
-
-    cpu.r[14] = ret_addr;
-    cpu.spsr.raw = new_spsr;
-    cpu.r[15] = 0x0000_0018;
-    cpu.pipe.reload(cpu);
-}
-
-/// Advances state so that the BIOS is skipped
-///
-/// Note: This accesses the CPU's bus ptr so it only may be called
-/// once the Bus has been properly initialized
-///
-/// TODO: Make above notice impossible to do in code
-pub fn fastBoot(cpu: *Arm7tdmi) void {
-    const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-    cpu.r = std.mem.zeroes([16]u32);
-
-    // cpu.r[0] = 0x08000000;
-    // cpu.r[1] = 0x000000EA;
-    cpu.r[13] = 0x0300_7F00;
-    cpu.r[15] = 0x0800_0000;
-
-    cpu.bank.r[Bank.regIdx(.Irq, .R13)] = 0x0300_7FA0;
-    cpu.bank.r[Bank.regIdx(.Supervisor, .R13)] = 0x0300_7FE0;
-
-    // cpu.cpsr.raw = 0x6000001F;
-    cpu.cpsr.raw = 0x0000_001F;
-
-    bus_ptr.bios.addr_latch = 0x0000_00DC + 8;
-}
--- a/src/core/emu.zig
+++ b/src/core/emu.zig
@@ -1,348 +0,0 @@
-const std = @import("std");
-const SDL = @import("sdl2");
-const config = @import("../config.zig");
-
-const Scheduler = @import("scheduler.zig").Scheduler;
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const Bus = @import("Bus.zig");
-const Tracker = @import("../util.zig").FpsTracker;
-const Channel = @import("../util.zig").Queue;
-
-const stepDmaTransfer = @import("cpu_util.zig").stepDmaTransfer;
-const isHalted = @import("cpu_util.zig").isHalted;
-
-const Timer = std.time.Timer;
-
-pub const Synchro = struct {
-    const AtomicBool = std.atomic.Value(bool);
-
-    // FIXME: This Enum ends up being really LARGE!!!
-    pub const Message = union(enum) {
-        rom_path: [std.fs.MAX_PATH_BYTES]u8,
-        bios_path: [std.fs.MAX_PATH_BYTES]u8,
-        restart: void,
-    };
-
-    paused: AtomicBool = AtomicBool.init(true), // FIXME: can ui_busy and paused be the same?
-    should_quit: AtomicBool = AtomicBool.init(false),
-
-    ch: Channel(Message),
-
-    pub fn init(allocator: std.mem.Allocator) !@This() {
-        const msg_buf = try allocator.alloc(Message, 1);
-        return .{ .ch = Channel(Message).init(msg_buf) };
-    }
-
-    pub fn deinit(self: *@This(), allocator: std.mem.Allocator) void {
-        allocator.free(self.ch.inner.buf);
-        self.* = undefined;
-    }
-};
-
-/// 4 Cycles in 1 dot
-const cycles_per_dot = 4;
-
-/// The GBA draws 228 Horizontal which each consist 308 dots
-/// (note: not all lines are visible)
-const cycles_per_frame = 228 * (308 * cycles_per_dot); //280896
-
-/// The GBA ARM7TDMI runs at 2^24 Hz
-const clock_rate = 1 << 24; // 16.78MHz
-
-/// The # of nanoseconds a frame should take
-const frame_period = (std.time.ns_per_s * cycles_per_frame) / clock_rate;
-
-/// Exact Value:  59.7275005696Hz
-/// The inverse of the frame period
-pub const frame_rate: f64 = @as(f64, @floatFromInt(clock_rate)) / cycles_per_frame;
-
-const log = std.log.scoped(.Emulation);
-
-const RunKind = enum {
-    Unlimited,
-    UnlimitedFPS,
-    Limited,
-    LimitedFPS,
-};
-
-pub fn run(cpu: *Arm7tdmi, scheduler: *Scheduler, tracker: *Tracker, sync: *Synchro) void {
-    const audio_sync = config.config().guest.audio_sync and !config.config().host.mute;
-    if (audio_sync) log.info("Audio sync enabled", .{});
-
-    if (config.config().guest.video_sync) {
-        inner(.LimitedFPS, audio_sync, cpu, scheduler, tracker, sync);
-    } else {
-        inner(.UnlimitedFPS, audio_sync, cpu, scheduler, tracker, sync);
-    }
-}
-
-fn inner(comptime kind: RunKind, audio_sync: bool, cpu: *Arm7tdmi, scheduler: *Scheduler, tracker: ?*Tracker, sync: *Synchro) void {
-    if (kind == .UnlimitedFPS or kind == .LimitedFPS) {
-        std.debug.assert(tracker != null);
-        log.info("FPS tracking enabled", .{});
-    }
-
-    const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-    // FIXME: audioSync accesses emulator state without any guarantees
-
-    switch (kind) {
-        .Unlimited, .UnlimitedFPS => {
-            log.info("Emulation w/out video sync", .{});
-
-            while (!sync.should_quit.load(.monotonic)) {
-                handleChannel(cpu, &sync.ch);
-                if (sync.paused.load(.monotonic)) continue;
-
-                runFrame(scheduler, cpu);
-                audioSync(audio_sync, bus_ptr.apu.stream, &bus_ptr.apu.is_buffer_full);
-
-                if (kind == .UnlimitedFPS) tracker.?.tick();
-            }
-        },
-        .Limited, .LimitedFPS => {
-            log.info("Emulation w/ video sync", .{});
-            var timer = Timer.start() catch @panic("failed to initalize std.timer.Timer");
-            var wake_time: u64 = frame_period;
-
-            while (!sync.should_quit.load(.monotonic)) {
-                handleChannel(cpu, &sync.ch);
-                if (sync.paused.load(.monotonic)) continue;
-
-                runFrame(scheduler, cpu);
-                const new_wake_time = videoSync(&timer, wake_time);
-
-                // Spin to make up the difference of OS scheduler innacuracies
-                // If we happen to also be syncing to audio, we choose to spin on
-                // the amount of time needed for audio to catch up rather than
-                // our expected wake-up time
-
-                audioSync(audio_sync, bus_ptr.apu.stream, &bus_ptr.apu.is_buffer_full);
-                if (!audio_sync) spinLoop(&timer, wake_time);
-                wake_time = new_wake_time;
-
-                if (kind == .LimitedFPS) tracker.?.tick();
-            }
-        },
-    }
-}
-
-inline fn handleChannel(cpu: *Arm7tdmi, channel: *Channel(Synchro.Message)) void {
-    const message = channel.pop() orelse return;
-
-    switch (message) {
-        .rom_path => |path_buf| {
-            const path = std.mem.sliceTo(&path_buf, 0);
-            replaceGamepak(cpu, path) catch |e| log.err("failed to replace GamePak: {}", .{e});
-        },
-        .bios_path => |path_buf| {
-            const path = std.mem.sliceTo(&path_buf, 0);
-            replaceBios(cpu, path) catch |e| log.err("failed to replace BIOS: {}", .{e});
-        },
-        .restart => reset(cpu),
-    }
-}
-
-pub fn runFrame(sched: *Scheduler, cpu: *Arm7tdmi) void {
-    const frame_end = sched.tick + cycles_per_frame;
-
-    while (sched.tick < frame_end) {
-        if (!stepDmaTransfer(cpu)) {
-            if (isHalted(cpu)) {
-                // Fast-forward to next Event
-                sched.tick = sched.nextTimestamp();
-            } else {
-                cpu.step();
-            }
-        }
-
-        if (sched.tick >= sched.nextTimestamp()) sched.handleEvent(cpu);
-    }
-}
-
-fn audioSync(audio_sync: bool, stream: *SDL.SDL_AudioStream, is_buffer_full: *bool) void {
-    comptime std.debug.assert(@import("../platform.zig").sample_format == SDL.AUDIO_U16);
-    const sample_size = 2 * @sizeOf(u16);
-    const max_buf_size: c_int = 0x400;
-
-    // Determine whether the APU is busy right at this moment
-    var still_full: bool = SDL.SDL_AudioStreamAvailable(stream) > sample_size * if (is_buffer_full.*) max_buf_size >> 1 else max_buf_size;
-    defer is_buffer_full.* = still_full; // Update APU Busy status right before exiting scope
-
-    // If Busy is false, there's no need to sync here
-    if (!still_full) return;
-
-    // TODO: Refactor!!!!
-    // while (SDL.SDL_AudioStreamAvailable(stream) > sample_size * max_buf_size >> 1)
-    //     std.atomic.spinLoopHint();
-
-    while (true) {
-        still_full = SDL.SDL_AudioStreamAvailable(stream) > sample_size * max_buf_size >> 1;
-        if (!audio_sync or !still_full) break;
-    }
-}
-
-fn videoSync(timer: *Timer, wake_time: u64) u64 {
-    // Use the OS scheduler to put the emulation thread to sleep
-    const recalculated = sleep(timer, wake_time);
-
-    // If sleep() determined we need to adjust our wake up time, do so
-    // otherwise predict our next wake up time according to the frame period
-    return recalculated orelse wake_time + frame_period;
-}
-
-// TODO: Better sleep impl?
-fn sleep(timer: *Timer, wake_time: u64) ?u64 {
-    const timestamp = timer.read();
-
-    // ns_late is non zero if we are late.
-    var ns_late = timestamp -| wake_time;
-
-    // If we're more than a frame late, skip the rest of this loop
-    // Recalculate what our new wake time should be so that we can
-    // get "back on track"
-    if (ns_late > frame_period) return timestamp + frame_period;
-    const sleep_for = frame_period - ns_late;
-
-    const step = 2 * std.time.ns_per_ms; // Granularity of 2ms
-    const times = sleep_for / step;
-
-    for (0..times) |_| {
-        std.time.sleep(step);
-
-        // Upon wakeup, check to see if this particular sleep was longer than expected
-        // if so we should exit early, but probably not skip a whole frame period
-        ns_late = timer.read() -| wake_time;
-        if (ns_late > frame_period) return null;
-    }
-
-    return null;
-}
-
-fn spinLoop(timer: *Timer, wake_time: u64) void {
-    while (timer.read() < wake_time)
-        std.atomic.spinLoopHint();
-}
-
-pub const EmuThing = struct {
-    const Self = @This();
-    const Interface = @import("gdbstub").Emulator;
-    const Allocator = std.mem.Allocator;
-
-    pub const target =
-        \\<target version="1.0">
-        \\    <architecture>armv4t</architecture>
-        \\    <feature name="org.gnu.gdb.arm.core">
-        \\        <reg name="r0" bitsize="32" type="uint32"/>
-        \\        <reg name="r1" bitsize="32" type="uint32"/>
-        \\        <reg name="r2" bitsize="32" type="uint32"/>
-        \\        <reg name="r3" bitsize="32" type="uint32"/>
-        \\        <reg name="r4" bitsize="32" type="uint32"/>
-        \\        <reg name="r5" bitsize="32" type="uint32"/>
-        \\        <reg name="r6" bitsize="32" type="uint32"/>
-        \\        <reg name="r7" bitsize="32" type="uint32"/>
-        \\        <reg name="r8" bitsize="32" type="uint32"/>
-        \\        <reg name="r9" bitsize="32" type="uint32"/>
-        \\        <reg name="r10" bitsize="32" type="uint32"/>
-        \\        <reg name="r11" bitsize="32" type="uint32"/>
-        \\        <reg name="r12" bitsize="32" type="uint32"/>
-        \\        <reg name="sp" bitsize="32" type="data_ptr"/>
-        \\        <reg name="lr" bitsize="32"/>
-        \\        <reg name="pc" bitsize="32" type="code_ptr"/>
-        \\
-        \\        <reg name="cpsr" bitsize="32" regnum="25"/>
-        \\    </feature>
-        \\</target>
-    ;
-
-    // Game Pak SRAM isn't included
-    // TODO: Can i be more specific here?
-    pub const map =
-        \\ <memory-map version="1.0">
-        \\     <memory type="rom" start="0x00000000" length="0x00004000"/>
-        \\     <memory type="ram" start="0x02000000" length="0x00040000"/>
-        \\     <memory type="ram" start="0x03000000" length="0x00008000"/>
-        \\     <memory type="ram" start="0x04000000" length="0x00000400"/>
-        \\     <memory type="ram" start="0x05000000" length="0x00000400"/>
-        \\     <memory type="ram" start="0x06000000" length="0x00018000"/>
-        \\     <memory type="ram" start="0x07000000" length="0x00000400"/>
-        \\     <memory type="rom" start="0x08000000" length="0x02000000"/>
-        \\     <memory type="rom" start="0x0A000000" length="0x02000000"/>
-        \\     <memory type="rom" start="0x0C000000" length="0x02000000"/>
-        \\ </memory-map>
-    ;
-
-    cpu: *Arm7tdmi,
-    scheduler: *Scheduler,
-
-    pub fn init(cpu: *Arm7tdmi, scheduler: *Scheduler) Self {
-        return .{ .cpu = cpu, .scheduler = scheduler };
-    }
-
-    pub fn interface(self: *Self, allocator: Allocator) Interface {
-        return Interface.init(allocator, self);
-    }
-
-    pub fn read(self: *const Self, addr: u32) u8 {
-        return self.cpu.bus.dbgRead(u8, addr);
-    }
-
-    pub fn write(self: *Self, addr: u32, value: u8) void {
-        self.cpu.bus.dbgWrite(u8, addr, value);
-    }
-
-    pub fn registers(self: *const Self) *[16]u32 {
-        return &self.cpu.r;
-    }
-
-    pub fn cpsr(self: *const Self) u32 {
-        return self.cpu.cpsr.raw;
-    }
-
-    pub fn step(self: *Self) void {
-        const cpu = self.cpu;
-        const sched = self.scheduler;
-
-        // Is true when we have executed one (1) instruction
-        var did_step: bool = false;
-
-        // TODO: How can I make it easier to keep this in lock-step with runFrame?
-        while (!did_step) {
-            if (!stepDmaTransfer(cpu)) {
-                if (isHalted(cpu)) {
-                    // Fast-forward to next Event
-                    sched.tick = sched.queue.peek().?.tick;
-                } else {
-                    cpu.step();
-                    did_step = true;
-                }
-            }
-
-            if (sched.tick >= sched.nextTimestamp()) sched.handleEvent(cpu);
-        }
-    }
-};
-
-fn reset(cpu: *Arm7tdmi) void {
-    // @breakpoint();
-    cpu.sched.reset(); // Yes this is order sensitive, see the PPU reset for why
-    cpu.bus.reset();
-    cpu.reset();
-}
-
-fn replaceGamepak(cpu: *Arm7tdmi, file_path: []const u8) !void {
-    const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-    try bus_ptr.replaceGamepak(file_path);
-    reset(cpu);
-}
-
-fn replaceBios(cpu: *Arm7tdmi, file_path: []const u8) !void {
-    const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-    const allocator = bus_ptr.bios.allocator;
-    const bios_len = 0x4000;
-
-    bus_ptr.bios.buf = try allocator.alloc(u8, bios_len);
-    try bus_ptr.bios.load(file_path);
-}
--- a/src/core/ppu.zig
+++ b/src/core/ppu.zig
--- a/src/core/ppu/Oam.zig
+++ b/src/core/ppu/Oam.zig
@@ -1,44 +0,0 @@
-const std = @import("std");
-
-const Allocator = std.mem.Allocator;
-
-const buf_len = 0x400;
-const Self = @This();
-
-buf: []u8,
-allocator: Allocator,
-
-pub fn read(self: *const Self, comptime T: type, address: usize) T {
-    const addr = address & 0x3FF;
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
-        else => @compileError("OAM: Unsupported read width"),
-    };
-}
-
-pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
-    const addr = address & 0x3FF;
-
-    switch (T) {
-        u32, u16 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
-        u8 => return, // 8-bit writes are explicitly ignored
-        else => @compileError("OAM: Unsupported write width"),
-    }
-}
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, buf_len);
-    @memset(buf, 0);
-
-    return Self{ .buf = buf, .allocator = allocator };
-}
-
-pub fn reset(self: *Self) void {
-    @memset(self.buf, 0);
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
--- a/src/core/ppu/Palette.zig
+++ b/src/core/ppu/Palette.zig
@@ -1,51 +0,0 @@
-const std = @import("std");
-
-const Allocator = std.mem.Allocator;
-
-const buf_len = 0x400;
-const Self = @This();
-
-buf: []u8,
-allocator: Allocator,
-
-pub fn read(self: *const Self, comptime T: type, address: usize) T {
-    const addr = address & 0x3FF;
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
-        else => @compileError("PALRAM: Unsupported read width"),
-    };
-}
-
-pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
-    const addr = address & 0x3FF;
-
-    switch (T) {
-        u32, u16 => std.mem.writeInt(T, self.buf[addr..][0..@sizeOf(T)], value, .little),
-        u8 => {
-            const align_addr = addr & ~@as(u32, 1); // Aligned to Halfword boundary
-            std.mem.writeInt(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101, .little);
-        },
-        else => @compileError("PALRAM: Unsupported write width"),
-    }
-}
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, buf_len);
-    @memset(buf, 0);
-
-    return Self{ .buf = buf, .allocator = allocator };
-}
-
-pub fn reset(self: *Self) void {
-    @memset(self.buf, 0);
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
-
-pub inline fn backdrop(self: *const Self) u16 {
-    return std.mem.readInt(u16, self.buf[0..2], .little);
-}
--- a/src/core/ppu/Vram.zig
+++ b/src/core/ppu/Vram.zig
@@ -1,64 +0,0 @@
-const std = @import("std");
-const io = @import("../bus/io.zig");
-
-const Allocator = std.mem.Allocator;
-
-const buf_len = 0x18000;
-const Self = @This();
-
-buf: []u8,
-allocator: Allocator,
-
-pub fn read(self: *const Self, comptime T: type, address: usize) T {
-    const addr = Self.mirror(address);
-
-    return switch (T) {
-        u32, u16, u8 => std.mem.readInt(T, self.buf[addr..][0..@sizeOf(T)], .little),
-        else => @compileError("VRAM: Unsupported read width"),
-    };
-}
-
-pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address: usize, value: T) void {
-    const mode: u3 = dispcnt.bg_mode.read();
-    const idx = Self.mirror(address);
-
-    switch (T) {
-        u32, u16 => std.mem.writeInt(T, self.buf[idx..][0..@sizeOf(T)], value, .little),
-        u8 => {
-            // Ignore write if it falls within the boundaries of OBJ VRAM
-            switch (mode) {
-                0, 1, 2 => if (0x0001_0000 <= idx) return,
-                else => if (0x0001_4000 <= idx) return,
-            }
-
-            const align_idx = idx & ~@as(u32, 1); // Aligned to a halfword boundary
-            std.mem.writeInt(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101, .little);
-        },
-        else => @compileError("VRAM: Unsupported write width"),
-    }
-}
-
-pub fn init(allocator: Allocator) !Self {
-    const buf = try allocator.alloc(u8, buf_len);
-    @memset(buf, 0);
-
-    return Self{ .buf = buf, .allocator = allocator };
-}
-
-pub fn reset(self: *Self) void {
-    @memset(self.buf, 0);
-}
-
-pub fn deinit(self: *Self) void {
-    self.allocator.free(self.buf);
-    self.* = undefined;
-}
-
-pub fn mirror(address: usize) usize {
-    // Mirrored in steps of 128K (64K + 32K + 32K) (abcc)
-    const addr = address & 0x1FFFF;
-
-    // If the address is within 96K we don't do anything,
-    // otherwise we want to mirror the last 32K (addresses between 64K and 96K)
-    return if (addr < buf_len) addr else 0x10000 + (addr & 0x7FFF);
-}
--- a/src/core/scheduler.zig
+++ b/src/core/scheduler.zig
@@ -1,134 +0,0 @@
-const std = @import("std");
-
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const Bus = @import("Bus.zig");
-const Clock = @import("bus/gpio.zig").Clock;
-
-const Order = std.math.Order;
-const PriorityQueue = std.PriorityQueue;
-const Allocator = std.mem.Allocator;
-const log = std.log.scoped(.Scheduler);
-
-pub const Scheduler = struct {
-    const Self = @This();
-
-    tick: u64 = 0,
-    queue: PriorityQueue(Event, void, lessThan),
-
-    pub fn init(allocator: Allocator) Self {
-        var sched = Self{ .queue = PriorityQueue(Event, void, lessThan).init(allocator, {}) };
-        sched.queue.add(.{ .kind = .HeatDeath, .tick = std.math.maxInt(u64) }) catch unreachable;
-
-        return sched;
-    }
-
-    pub fn deinit(self: *Self) void {
-        self.queue.deinit();
-        self.* = undefined;
-    }
-
-    pub fn reset(self: *Self) void {
-        // `std.PriorityQueue` provides no reset function, so we will just create a new one
-        const allocator = self.queue.allocator;
-        self.queue.deinit();
-
-        var new_queue = PriorityQueue(Event, void, lessThan).init(allocator, {});
-        new_queue.add(.{ .kind = .HeatDeath, .tick = std.math.maxInt(u64) }) catch unreachable;
-
-        self.* = .{ .queue = new_queue };
-    }
-
-    pub inline fn now(self: *const Self) u64 {
-        return self.tick;
-    }
-
-    pub fn handleEvent(self: *Self, cpu: *Arm7tdmi) void {
-        const event = self.queue.remove();
-        const late = self.tick - event.tick;
-
-        const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-        switch (event.kind) {
-            .HeatDeath => {
-                log.err("u64 overflow. This *actually* should never happen.", .{});
-                unreachable;
-            },
-            .Draw => {
-                // The end of a VDraw
-                bus_ptr.ppu.drawScanline();
-                bus_ptr.ppu.onHdrawEnd(cpu, late);
-            },
-            .TimerOverflow => |id| {
-                switch (id) {
-                    inline 0...3 => |idx| bus_ptr.tim[idx].onTimerExpire(cpu, late),
-                }
-            },
-            .ApuChannel => |id| {
-                switch (id) {
-                    0 => bus_ptr.apu.ch1.onToneSweepEvent(late),
-                    1 => bus_ptr.apu.ch2.onToneEvent(late),
-                    2 => bus_ptr.apu.ch3.onWaveEvent(late),
-                    3 => bus_ptr.apu.ch4.onNoiseEvent(late),
-                }
-            },
-            .RealTimeClock => {
-                const device = &bus_ptr.pak.gpio.device;
-                if (device.kind != .Rtc or device.ptr == null) return;
-
-                const clock: *Clock = @ptrCast(@alignCast(device.ptr.?));
-                clock.onClockUpdate(late);
-            },
-            .FrameSequencer => bus_ptr.apu.onSequencerTick(late),
-            .SampleAudio => bus_ptr.apu.sampleAudio(late),
-            .HBlank => bus_ptr.ppu.onHblankEnd(cpu, late), // The end of a HBlank
-            .VBlank => bus_ptr.ppu.onHdrawEnd(cpu, late), // The end of a VBlank
-        }
-    }
-
-    /// Removes the **first** scheduled event of type `needle`
-    pub fn removeScheduledEvent(self: *Self, needle: EventKind) void {
-        for (self.queue.items, 0..) |event, i| {
-            if (std.meta.eql(event.kind, needle)) {
-
-                // invalidates the slice we're iterating over
-                _ = self.queue.removeIndex(i);
-
-                // log.debug("Removed {?}@{}", .{ event.kind, event.tick });
-                break;
-            }
-        }
-    }
-
-    pub fn push(self: *Self, kind: EventKind, end: u64) void {
-        self.queue.add(.{ .kind = kind, .tick = self.now() + end }) catch unreachable;
-    }
-
-    pub inline fn nextTimestamp(self: *const Self) u64 {
-        @setRuntimeSafety(false);
-
-        // Typically you'd use PriorityQueue.peek here, but there's always at least a HeatDeath
-        // event in the PQ so we can just do this instead. Should be faster in ReleaseSafe
-        return self.queue.items[0].tick;
-    }
-};
-
-pub const Event = struct {
-    kind: EventKind,
-    tick: u64,
-};
-
-fn lessThan(_: void, a: Event, b: Event) Order {
-    return std.math.order(a.tick, b.tick);
-}
-
-pub const EventKind = union(enum) {
-    HeatDeath,
-    HBlank,
-    VBlank,
-    Draw,
-    TimerOverflow: u2,
-    SampleAudio,
-    FrameSequencer,
-    ApuChannel: u2,
-    RealTimeClock,
-};
--- a/src/cpu.zig
+++ b/src/cpu.zig
@@ -0,0 +1,770 @@
+const std = @import("std");
+const util = @import("util.zig");
+
+const Bus = @import("Bus.zig");
+const Bit = @import("bitfield").Bit;
+const Bitfield = @import("bitfield").Bitfield;
+const Scheduler = @import("scheduler.zig").Scheduler;
+const FilePaths = @import("util.zig").FilePaths;
+
+const Allocator = std.mem.Allocator;
+const File = std.fs.File;
+
+// ARM Instruction Groups
+const dataProcessing = @import("cpu/arm/data_processing.zig").dataProcessing;
+const psrTransfer = @import("cpu/arm/psr_transfer.zig").psrTransfer;
+const singleDataTransfer = @import("cpu/arm/single_data_transfer.zig").singleDataTransfer;
+const halfAndSignedDataTransfer = @import("cpu/arm/half_signed_data_transfer.zig").halfAndSignedDataTransfer;
+const blockDataTransfer = @import("cpu/arm/block_data_transfer.zig").blockDataTransfer;
+const branch = @import("cpu/arm/branch.zig").branch;
+const branchAndExchange = @import("cpu/arm/branch.zig").branchAndExchange;
+const armSoftwareInterrupt = @import("cpu/arm/software_interrupt.zig").armSoftwareInterrupt;
+const singleDataSwap = @import("cpu/arm/single_data_swap.zig").singleDataSwap;
+
+const multiply = @import("cpu/arm/multiply.zig").multiply;
+const multiplyLong = @import("cpu/arm/multiply.zig").multiplyLong;
+
+// THUMB Instruction Groups
+const format1 = @import("cpu/thumb/data_processing.zig").format1;
+const format2 = @import("cpu/thumb/data_processing.zig").format2;
+const format3 = @import("cpu/thumb/data_processing.zig").format3;
+const format12 = @import("cpu/thumb/data_processing.zig").format12;
+const format13 = @import("cpu/thumb/data_processing.zig").format13;
+
+const format4 = @import("cpu/thumb/alu.zig").format4;
+const format5 = @import("cpu/thumb/processing_branch.zig").format5;
+
+const format6 = @import("cpu/thumb/data_transfer.zig").format6;
+const format78 = @import("cpu/thumb/data_transfer.zig").format78;
+const format9 = @import("cpu/thumb/data_transfer.zig").format9;
+const format10 = @import("cpu/thumb/data_transfer.zig").format10;
+const format11 = @import("cpu/thumb/data_transfer.zig").format11;
+const format14 = @import("cpu/thumb/block_data_transfer.zig").format14;
+const format15 = @import("cpu/thumb/block_data_transfer.zig").format15;
+
+const format16 = @import("cpu/thumb/branch.zig").format16;
+const format18 = @import("cpu/thumb/branch.zig").format18;
+const format19 = @import("cpu/thumb/branch.zig").format19;
+
+const thumbSoftwareInterrupt = @import("cpu/thumb/software_interrupt.zig").thumbSoftwareInterrupt;
+
+pub const ArmInstrFn = fn (*Arm7tdmi, *Bus, u32) void;
+pub const ThumbInstrFn = fn (*Arm7tdmi, *Bus, u16) void;
+const arm_lut: [0x1000]ArmInstrFn = armPopulate();
+const thumb_lut: [0x400]ThumbInstrFn = thumbPopulate();
+
+const enable_logging = @import("main.zig").enable_logging;
+const log = std.log.scoped(.Arm7Tdmi);
+
+pub const Arm7tdmi = struct {
+    const Self = @This();
+
+    r: [16]u32,
+    pipe: Pipline,
+    sched: *Scheduler,
+    bus: Bus,
+    cpsr: PSR,
+    spsr: PSR,
+
+    /// Storage  for R8_fiq -> R12_fiq and their normal counterparts
+    /// e.g [r[0 + 8], fiq_r[0 + 8], r[1 + 8], fiq_r[1 + 8]...]
+    banked_fiq: [2 * 5]u32,
+
+    /// Storage for r13_<mode>, r14_<mode>
+    /// e.g. [r13, r14, r13_svc, r14_svc]
+    banked_r: [2 * 6]u32,
+
+    banked_spsr: [5]PSR,
+
+    log_file: ?*const File,
+    log_buf: [0x100]u8,
+    binary_log: bool,
+
+    pub fn init(alloc: Allocator, sched: *Scheduler, paths: FilePaths) !Self {
+        return Self{
+            .r = [_]u32{0x00} ** 16,
+            .pipe = Pipline.init(),
+            .sched = sched,
+            .bus = try Bus.init(alloc, sched, paths),
+            .cpsr = .{ .raw = 0x0000_001F },
+            .spsr = .{ .raw = 0x0000_0000 },
+            .banked_fiq = [_]u32{0x00} ** 10,
+            .banked_r = [_]u32{0x00} ** 12,
+            .banked_spsr = [_]PSR{.{ .raw = 0x0000_0000 }} ** 5,
+            .log_file = null,
+            .log_buf = undefined,
+            .binary_log = false,
+        };
+    }
+
+    pub fn deinit(self: Self) void {
+        self.bus.deinit();
+    }
+
+    pub fn useLogger(self: *Self, file: *const File, is_binary: bool) void {
+        self.log_file = file;
+        self.binary_log = is_binary;
+    }
+
+    inline fn bankedIdx(mode: Mode, kind: BankedKind) usize {
+        const idx: usize = switch (mode) {
+            .User, .System => 0,
+            .Supervisor => 1,
+            .Abort => 2,
+            .Undefined => 3,
+            .Irq => 4,
+            .Fiq => 5,
+        };
+
+        return (idx * 2) + if (kind == .R14) @as(usize, 1) else 0;
+    }
+
+    inline fn bankedSpsrIndex(mode: Mode) usize {
+        return switch (mode) {
+            .Supervisor => 0,
+            .Abort => 1,
+            .Undefined => 2,
+            .Irq => 3,
+            .Fiq => 4,
+            else => std.debug.panic("[CPU/Mode] {} does not have a SPSR Register", .{mode}),
+        };
+    }
+
+    inline fn bankedFiqIdx(i: usize, mode: Mode) usize {
+        return (i * 2) + if (mode == .Fiq) @as(usize, 1) else 0;
+    }
+
+    pub inline fn hasSPSR(self: *const Self) bool {
+        const mode = getModeChecked(self, self.cpsr.mode.read());
+        return switch (mode) {
+            .System, .User => false,
+            else => true,
+        };
+    }
+
+    pub inline fn isPrivileged(self: *const Self) bool {
+        const mode = getModeChecked(self, self.cpsr.mode.read());
+        return switch (mode) {
+            .User => false,
+            else => true,
+        };
+    }
+
+    pub inline fn isHalted(self: *const Self) bool {
+        return self.bus.io.haltcnt == .Halt;
+    }
+
+    pub fn setCpsrNoFlush(self: *Self, value: u32) void {
+        if (value & 0x1F != self.cpsr.raw & 0x1F) self.changeModeFromIdx(@truncate(u5, value & 0x1F));
+        self.cpsr.raw = value;
+    }
+
+    pub fn setCpsr(self: *Self, value: u32) void {
+        if (value & 0x1F != self.cpsr.raw & 0x1F) self.changeModeFromIdx(@truncate(u5, value & 0x1F));
+
+        const new: PSR = .{ .raw = value };
+        if (self.cpsr.t.read() != new.t.read()) {
+            // If THUMB to ARM or ARM to THUMB, flush pipeline
+            self.r[15] &= if (new.t.read()) ~@as(u32, 1) else ~@as(u32, 3);
+            self.pipe.flush();
+        }
+
+        self.cpsr.raw = value;
+    }
+
+    fn changeModeFromIdx(self: *Self, next: u5) void {
+        self.changeMode(getModeChecked(self, next));
+    }
+
+    pub fn setUserModeRegister(self: *Self, idx: usize, value: u32) void {
+        const current = getModeChecked(self, self.cpsr.mode.read());
+
+        switch (idx) {
+            8...12 => {
+                if (current == .Fiq) {
+                    self.banked_fiq[bankedFiqIdx(idx - 8, .User)] = value;
+                } else self.r[idx] = value;
+            },
+            13, 14 => switch (current) {
+                .User, .System => self.r[idx] = value,
+                else => {
+                    const kind = std.meta.intToEnum(BankedKind, idx - 13) catch unreachable;
+                    self.banked_r[bankedIdx(.User, kind)] = value;
+                },
+            },
+            else => self.r[idx] = value, // R0 -> R7  and R15
+        }
+    }
+
+    pub fn getUserModeRegister(self: *Self, idx: usize) u32 {
+        const current = getModeChecked(self, self.cpsr.mode.read());
+
+        return switch (idx) {
+            8...12 => if (current == .Fiq) self.banked_fiq[bankedFiqIdx(idx - 8, .User)] else self.r[idx],
+            13, 14 => switch (current) {
+                .User, .System => self.r[idx],
+                else => blk: {
+                    const kind = std.meta.intToEnum(BankedKind, idx - 13) catch unreachable;
+                    break :blk self.banked_r[bankedIdx(.User, kind)];
+                },
+            },
+            else => self.r[idx], // R0 -> R7  and R15
+        };
+    }
+
+    pub fn changeMode(self: *Self, next: Mode) void {
+        const now = getModeChecked(self, self.cpsr.mode.read());
+
+        // Bank R8 -> r12
+        var i: usize = 0;
+        while (i < 5) : (i += 1) {
+            self.banked_fiq[bankedFiqIdx(i, now)] = self.r[8 + i];
+        }
+
+        // Bank r13, r14, SPSR
+        switch (now) {
+            .User, .System => {
+                self.banked_r[bankedIdx(now, .R13)] = self.r[13];
+                self.banked_r[bankedIdx(now, .R14)] = self.r[14];
+            },
+            else => {
+                self.banked_r[bankedIdx(now, .R13)] = self.r[13];
+                self.banked_r[bankedIdx(now, .R14)] = self.r[14];
+                self.banked_spsr[bankedSpsrIndex(now)] = self.spsr;
+            },
+        }
+
+        // Grab R8 -> R12
+        i = 0;
+        while (i < 5) : (i += 1) {
+            self.r[8 + i] = self.banked_fiq[bankedFiqIdx(i, next)];
+        }
+
+        // Grab r13, r14, SPSR
+        switch (next) {
+            .User, .System => {
+                self.r[13] = self.banked_r[bankedIdx(next, .R13)];
+                self.r[14] = self.banked_r[bankedIdx(next, .R14)];
+            },
+            else => {
+                self.r[13] = self.banked_r[bankedIdx(next, .R13)];
+                self.r[14] = self.banked_r[bankedIdx(next, .R14)];
+                self.spsr = self.banked_spsr[bankedSpsrIndex(next)];
+            },
+        }
+
+        self.cpsr.mode.write(@enumToInt(next));
+    }
+
+    pub fn fastBoot(self: *Self) void {
+        self.r = std.mem.zeroes([16]u32);
+
+        self.r[0] = 0x08000000;
+        self.r[1] = 0x000000EA;
+        self.r[13] = 0x0300_7F00;
+        self.r[15] = 0x0800_0000;
+
+        self.banked_r[bankedIdx(.Irq, .R13)] = 0x0300_7FA0;
+        self.banked_r[bankedIdx(.Supervisor, .R13)] = 0x0300_7FE0;
+
+        self.cpsr.raw = 0x6000001F;
+    }
+
+    pub fn step(self: *Self) void {
+        if (self.cpsr.t.read()) blk: {
+            const opcode = @truncate(u16, self.pipe.step(self, u16) orelse break :blk);
+            if (enable_logging) if (self.log_file) |file| self.debug_log(file, opcode);
+
+            thumb_lut[thumbIdx(opcode)](self, &self.bus, opcode);
+        } else blk: {
+            const opcode = self.pipe.step(self, u32) orelse break :blk;
+            if (enable_logging) if (self.log_file) |file| self.debug_log(file, opcode);
+
+            if (checkCond(self.cpsr, @truncate(u4, opcode >> 28)))
+                arm_lut[armIdx(opcode)](self, &self.bus, opcode);
+        }
+
+        if (!self.pipe.flushed) self.r[15] += if (self.cpsr.t.read()) 2 else @as(u32, 4);
+        self.pipe.flushed = false;
+    }
+
+    pub fn stepDmaTransfer(self: *Self) bool {
+        const dma0 = &self.bus.dma[0];
+        const dma1 = &self.bus.dma[1];
+        const dma2 = &self.bus.dma[2];
+        const dma3 = &self.bus.dma[3];
+
+        if (dma0.in_progress) {
+            dma0.step(self);
+            return true;
+        }
+
+        if (dma1.in_progress) {
+            dma1.step(self);
+            return true;
+        }
+
+        if (dma2.in_progress) {
+            dma2.step(self);
+            return true;
+        }
+
+        if (dma3.in_progress) {
+            dma3.step(self);
+            return true;
+        }
+
+        return false;
+    }
+
+    pub fn handleInterrupt(self: *Self) void {
+        const should_handle = self.bus.io.ie.raw & self.bus.io.irq.raw;
+
+        if (should_handle != 0) {
+            self.bus.io.haltcnt = .Execute;
+            // log.debug("An Interrupt was Fired!", .{});
+
+            // Either IME is not true or I in CPSR is true
+            // Don't handle interrupts
+            if (!self.bus.io.ime or self.cpsr.i.read()) return;
+            // log.debug("An interrupt was Handled!", .{});
+
+            // retAddr.gba says r15 on it's own is off by -04h in both ARM and THUMB mode
+            const r15 = self.r[15] + 4;
+            const cpsr = self.cpsr.raw;
+
+            self.changeMode(.Irq);
+            self.cpsr.t.write(false);
+            self.cpsr.i.write(true);
+
+            self.r[14] = r15;
+            self.spsr.raw = cpsr;
+            self.r[15] = 0x000_0018;
+        }
+    }
+
+    inline fn fetch(self: *Self, comptime T: type) T {
+        comptime std.debug.assert(T == u32 or T == u16); // Opcode may be 32-bit (ARM) or 16-bit (THUMB)
+        defer self.r[15] += if (T == u32) 4 else 2;
+
+        // FIXME: You better hope this is optimized out
+        const tick_cache = self.sched.tick;
+        defer self.sched.tick = tick_cache + Bus.fetch_timings[@boolToInt(T == u32)][@truncate(u4, self.r[15] >> 24)];
+
+        return self.bus.read(T, self.r[15]);
+    }
+
+    pub fn fakePC(self: *const Self) u32 {
+        return self.r[15] + 4;
+    }
+
+    fn debug_log(self: *const Self, file: *const File, opcode: u32) void {
+        if (self.binary_log) {
+            self.skyLog(file) catch unreachable;
+        } else {
+            self.mgbaLog(file, opcode) catch unreachable;
+        }
+    }
+
+    pub fn panic(self: *const Self, comptime format: []const u8, args: anytype) noreturn {
+        var i: usize = 0;
+        while (i < 16) : (i += 4) {
+            const i_1 = i + 1;
+            const i_2 = i + 2;
+            const i_3 = i + 3;
+            std.debug.print("R{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\tR{}: 0x{X:0>8}\n", .{ i, self.r[i], i_1, self.r[i_1], i_2, self.r[i_2], i_3, self.r[i_3] });
+        }
+        std.debug.print("cpsr: 0x{X:0>8} ", .{self.cpsr.raw});
+        prettyPrintPsr(&self.cpsr);
+
+        std.debug.print("spsr: 0x{X:0>8} ", .{self.spsr.raw});
+        prettyPrintPsr(&self.spsr);
+
+        if (self.cpsr.t.read()) {
+            const opcode = self.bus.debugRead(u16, self.r[15] - 4);
+            const id = thumbIdx(opcode);
+            std.debug.print("opcode: ID: 0x{b:0>10} 0x{X:0>4}\n", .{ id, opcode });
+        } else {
+            const opcode = self.bus.debugRead(u32, self.r[15] - 4);
+            const id = armIdx(opcode);
+            std.debug.print("opcode: ID: 0x{X:0>3} 0x{X:0>8}\n", .{ id, opcode });
+        }
+
+        std.debug.print("tick: {}\n\n", .{self.sched.tick});
+
+        std.debug.panic(format, args);
+    }
+
+    fn prettyPrintPsr(psr: *const PSR) void {
+        std.debug.print("[", .{});
+
+        if (psr.n.read()) std.debug.print("N", .{}) else std.debug.print("-", .{});
+        if (psr.z.read()) std.debug.print("Z", .{}) else std.debug.print("-", .{});
+        if (psr.c.read()) std.debug.print("C", .{}) else std.debug.print("-", .{});
+        if (psr.v.read()) std.debug.print("V", .{}) else std.debug.print("-", .{});
+        if (psr.i.read()) std.debug.print("I", .{}) else std.debug.print("-", .{});
+        if (psr.f.read()) std.debug.print("F", .{}) else std.debug.print("-", .{});
+        if (psr.t.read()) std.debug.print("T", .{}) else std.debug.print("-", .{});
+        std.debug.print("|", .{});
+        if (getMode(psr.mode.read())) |mode| std.debug.print("{s}", .{modeString(mode)}) else std.debug.print("---", .{});
+
+        std.debug.print("]\n", .{});
+    }
+
+    fn modeString(mode: Mode) []const u8 {
+        return switch (mode) {
+            .User => "usr",
+            .Fiq => "fiq",
+            .Irq => "irq",
+            .Supervisor => "svc",
+            .Abort => "abt",
+            .Undefined => "und",
+            .System => "sys",
+        };
+    }
+
+    fn skyLog(self: *const Self, file: *const File) !void {
+        var buf: [18 * @sizeOf(u32)]u8 = undefined;
+
+        // Write Registers
+        var i: usize = 0;
+        while (i < 0x10) : (i += 1) {
+            skyWrite(&buf, i, self.r[i]);
+        }
+
+        skyWrite(&buf, 0x10, self.cpsr.raw);
+        skyWrite(&buf, 0x11, if (self.hasSPSR()) self.spsr.raw else self.cpsr.raw);
+        _ = try file.writeAll(&buf);
+    }
+
+    fn skyWrite(buf: []u8, i: usize, num: u32) void {
+        const j = @sizeOf(u32) * i;
+        std.mem.writeIntSliceNative(u32, buf[j..(j + @sizeOf(u32))], num);
+    }
+
+    fn mgbaLog(self: *const Self, file: *const File, opcode: u32) !void {
+        const thumb_fmt = "{X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} cpsr: {X:0>8} | {X:0>4}:\n";
+        const arm_fmt = "{X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} cpsr: {X:0>8} | {X:0>8}:\n";
+        var buf: [0x100]u8 = [_]u8{0x00} ** 0x100; // this is larger than it needs to be
+
+        const r0 = self.r[0];
+        const r1 = self.r[1];
+        const r2 = self.r[2];
+        const r3 = self.r[3];
+        const r4 = self.r[4];
+        const r5 = self.r[5];
+        const r6 = self.r[6];
+        const r7 = self.r[7];
+        const r8 = self.r[8];
+        const r9 = self.r[9];
+        const r10 = self.r[10];
+        const r11 = self.r[11];
+        const r12 = self.r[12];
+        const r13 = self.r[13];
+        const r14 = self.r[14];
+        const r15 = self.r[15] -| if (self.cpsr.t.read()) 2 else @as(u32, 4);
+
+        const c_psr = self.cpsr.raw;
+
+        var log_str: []u8 = undefined;
+        if (self.cpsr.t.read()) {
+            if (opcode >> 11 == 0x1E) {
+                // Instruction 1 of a BL Opcode, print in ARM mode
+                const other_half = self.bus.debugRead(u16, self.r[15] - 2);
+                const bl_opcode = @as(u32, opcode) << 16 | other_half;
+
+                log_str = try std.fmt.bufPrint(&buf, arm_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, bl_opcode });
+            } else {
+                log_str = try std.fmt.bufPrint(&buf, thumb_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, opcode });
+            }
+        } else {
+            log_str = try std.fmt.bufPrint(&buf, arm_fmt, .{ r0, r1, r2, r3, r4, r5, r6, r7, r8, r9, r10, r11, r12, r13, r14, r15, c_psr, opcode });
+        }
+
+        _ = try file.writeAll(log_str);
+    }
+};
+
+inline fn armIdx(opcode: u32) u12 {
+    return @truncate(u12, opcode >> 20 & 0xFF) << 4 | @truncate(u12, opcode >> 4 & 0xF);
+}
+
+inline fn thumbIdx(opcode: u16) u10 {
+    return @truncate(u10, opcode >> 6);
+}
+
+pub fn checkCond(cpsr: PSR, cond: u4) bool {
+    return switch (cond) {
+        0x0 => cpsr.z.read(), // EQ - Equal
+        0x1 => !cpsr.z.read(), // NE - Not equal
+        0x2 => cpsr.c.read(), // CS - Unsigned higher or same
+        0x3 => !cpsr.c.read(), // CC - Unsigned lower
+        0x4 => cpsr.n.read(), // MI - Negative
+        0x5 => !cpsr.n.read(), // PL - Positive or zero
+        0x6 => cpsr.v.read(), // VS - Overflow
+        0x7 => !cpsr.v.read(), // VC - No overflow
+        0x8 => cpsr.c.read() and !cpsr.z.read(), // HI - unsigned higher
+        0x9 => !cpsr.c.read() or cpsr.z.read(), // LS - unsigned lower or same
+        0xA => cpsr.n.read() == cpsr.v.read(), // GE - Greater or equal
+        0xB => cpsr.n.read() != cpsr.v.read(), // LT - Less than
+        0xC => !cpsr.z.read() and (cpsr.n.read() == cpsr.v.read()), // GT - Greater than
+        0xD => cpsr.z.read() or (cpsr.n.read() != cpsr.v.read()), // LE - Less than or equal
+        0xE => true, // AL - Always
+        0xF => false, // NV - Never (reserved in ARMv3 and up, but seems to have not changed?)
+    };
+}
+
+fn thumbPopulate() [0x400]ThumbInstrFn {
+    return comptime {
+        @setEvalBranchQuota(5025); // This is exact
+        var lut = [_]ThumbInstrFn{thumbUndefined} ** 0x400;
+
+        var i: usize = 0;
+        while (i < lut.len) : (i += 1) {
+            lut[i] = switch (@as(u3, i >> 7 & 0x7)) {
+                0b000 => if (i >> 5 & 0x3 == 0b11) blk: {
+                    const I = i >> 4 & 1 == 1;
+                    const is_sub = i >> 3 & 1 == 1;
+                    const rn = i & 0x7;
+                    break :blk format2(I, is_sub, rn);
+                } else blk: {
+                    const op = i >> 5 & 0x3;
+                    const offset = i & 0x1F;
+                    break :blk format1(op, offset);
+                },
+                0b001 => blk: {
+                    const op = i >> 5 & 0x3;
+                    const rd = i >> 2 & 0x7;
+                    break :blk format3(op, rd);
+                },
+                0b010 => switch (@as(u2, i >> 5 & 0x3)) {
+                    0b00 => if (i >> 4 & 1 == 1) blk: {
+                        const op = i >> 2 & 0x3;
+                        const h1 = i >> 1 & 1;
+                        const h2 = i & 1;
+                        break :blk format5(op, h1, h2);
+                    } else blk: {
+                        const op = i & 0xF;
+                        break :blk format4(op);
+                    },
+                    0b01 => blk: {
+                        const rd = i >> 2 & 0x7;
+                        break :blk format6(rd);
+                    },
+                    else => blk: {
+                        const op = i >> 4 & 0x3;
+                        const T = i >> 3 & 1 == 1;
+                        break :blk format78(op, T);
+                    },
+                },
+                0b011 => blk: {
+                    const B = i >> 6 & 1 == 1;
+                    const L = i >> 5 & 1 == 1;
+                    const offset = i & 0x1F;
+                    break :blk format9(B, L, offset);
+                },
+                else => switch (@as(u3, i >> 6 & 0x7)) {
+                    // MSB is guaranteed to be 1
+                    0b000 => blk: {
+                        const L = i >> 5 & 1 == 1;
+                        const offset = i & 0x1F;
+                        break :blk format10(L, offset);
+                    },
+                    0b001 => blk: {
+                        const L = i >> 5 & 1 == 1;
+                        const rd = i >> 2 & 0x7;
+                        break :blk format11(L, rd);
+                    },
+                    0b010 => blk: {
+                        const isSP = i >> 5 & 1 == 1;
+                        const rd = i >> 2 & 0x7;
+                        break :blk format12(isSP, rd);
+                    },
+                    0b011 => if (i >> 4 & 1 == 1) blk: {
+                        const L = i >> 5 & 1 == 1;
+                        const R = i >> 2 & 1 == 1;
+                        break :blk format14(L, R);
+                    } else blk: {
+                        const S = i >> 1 & 1 == 1;
+                        break :blk format13(S);
+                    },
+                    0b100 => blk: {
+                        const L = i >> 5 & 1 == 1;
+                        const rb = i >> 2 & 0x7;
+
+                        break :blk format15(L, rb);
+                    },
+                    0b101 => if (i >> 2 & 0xF == 0b1111) blk: {
+                        break :blk thumbSoftwareInterrupt();
+                    } else blk: {
+                        const cond = i >> 2 & 0xF;
+                        break :blk format16(cond);
+                    },
+                    0b110 => format18(),
+                    0b111 => blk: {
+                        const is_low = i >> 5 & 1 == 1;
+                        break :blk format19(is_low);
+                    },
+                },
+            };
+        }
+
+        return lut;
+    };
+}
+
+fn armPopulate() [0x1000]ArmInstrFn {
+    return comptime {
+        @setEvalBranchQuota(0xE000);
+        var lut = [_]ArmInstrFn{armUndefined} ** 0x1000;
+
+        var i: usize = 0;
+        while (i < lut.len) : (i += 1) {
+            lut[i] = switch (@as(u2, i >> 10)) {
+                0b00 => if (i == 0x121) blk: {
+                    break :blk branchAndExchange;
+                } else if (i & 0xFCF == 0x009) blk: {
+                    const A = i >> 5 & 1 == 1;
+                    const S = i >> 4 & 1 == 1;
+                    break :blk multiply(A, S);
+                } else if (i & 0xFBF == 0x109) blk: {
+                    const B = i >> 6 & 1 == 1;
+                    break :blk singleDataSwap(B);
+                } else if (i & 0xF8F == 0x089) blk: {
+                    const U = i >> 6 & 1 == 1;
+                    const A = i >> 5 & 1 == 1;
+                    const S = i >> 4 & 1 == 1;
+                    break :blk multiplyLong(U, A, S);
+                } else if (i & 0xE49 == 0x009 or i & 0xE49 == 0x049) blk: {
+                    const P = i >> 8 & 1 == 1;
+                    const U = i >> 7 & 1 == 1;
+                    const I = i >> 6 & 1 == 1;
+                    const W = i >> 5 & 1 == 1;
+                    const L = i >> 4 & 1 == 1;
+                    break :blk halfAndSignedDataTransfer(P, U, I, W, L);
+                } else if (i & 0xD90 == 0x100) blk: {
+                    const I = i >> 9 & 1 == 1;
+                    const R = i >> 6 & 1 == 1;
+                    const kind = i >> 4 & 0x3;
+                    break :blk psrTransfer(I, R, kind);
+                } else blk: {
+                    const I = i >> 9 & 1 == 1;
+                    const S = i >> 4 & 1 == 1;
+                    const instrKind = i >> 5 & 0xF;
+                    break :blk dataProcessing(I, S, instrKind);
+                },
+                0b01 => if (i >> 9 & 1 == 1 and i & 1 == 1) armUndefined else blk: {
+                    const I = i >> 9 & 1 == 1;
+                    const P = i >> 8 & 1 == 1;
+                    const U = i >> 7 & 1 == 1;
+                    const B = i >> 6 & 1 == 1;
+                    const W = i >> 5 & 1 == 1;
+                    const L = i >> 4 & 1 == 1;
+                    break :blk singleDataTransfer(I, P, U, B, W, L);
+                },
+                else => switch (@as(u2, i >> 9 & 0x3)) {
+                    // MSB is guaranteed to be 1
+                    0b00 => blk: {
+                        const P = i >> 8 & 1 == 1;
+                        const U = i >> 7 & 1 == 1;
+                        const S = i >> 6 & 1 == 1;
+                        const W = i >> 5 & 1 == 1;
+                        const L = i >> 4 & 1 == 1;
+                        break :blk blockDataTransfer(P, U, S, W, L);
+                    },
+                    0b01 => blk: {
+                        const L = i >> 8 & 1 == 1;
+                        break :blk branch(L);
+                    },
+                    0b10 => armUndefined, // COP Data Transfer
+                    0b11 => if (i >> 8 & 1 == 1) armSoftwareInterrupt() else armUndefined, // COP Data Operation + Register Transfer
+                },
+            };
+        }
+
+        return lut;
+    };
+}
+
+const Pipline = struct {
+    const Self = @This();
+    stage: [2]?u32,
+    flushed: bool,
+
+    fn init() Self {
+        return .{
+            .stage = [_]?u32{null} ** 2,
+            .flushed = false,
+        };
+    }
+
+    pub fn flush(self: *Self) void {
+        for (self.stage) |*opcode| opcode.* = null;
+        self.flushed = true;
+    }
+
+    pub fn step(self: *Self, cpu: *Arm7tdmi, comptime T: type) ?u32 {
+        comptime std.debug.assert(T == u32 or T == u16);
+
+        const opcode = self.stage[0];
+
+        self.stage[0] = self.stage[1];
+        self.stage[1] = cpu.bus.read(T, cpu.r[15]);
+
+        return opcode;
+    }
+
+    fn reload(self: *Self, cpu: *Arm7tdmi, comptime T: type) void {
+        comptime std.debug.assert(T == u32 or T == u16);
+        const inc = if (T == u32) 4 else 2;
+
+        self.stage[0] = cpu.bus.read(T, cpu.r[15]);
+        self.stage[1] = cpu.bus.read(T, cpu.r[15] + inc);
+        cpu.r[15] += inc * 2;
+    }
+};
+
+pub const PSR = extern union {
+    mode: Bitfield(u32, 0, 5),
+    t: Bit(u32, 5),
+    f: Bit(u32, 6),
+    i: Bit(u32, 7),
+    v: Bit(u32, 28),
+    c: Bit(u32, 29),
+    z: Bit(u32, 30),
+    n: Bit(u32, 31),
+    raw: u32,
+};
+
+const Mode = enum(u5) {
+    User = 0b10000,
+    Fiq = 0b10001,
+    Irq = 0b10010,
+    Supervisor = 0b10011,
+    Abort = 0b10111,
+    Undefined = 0b11011,
+    System = 0b11111,
+};
+
+const BankedKind = enum(u1) {
+    R13 = 0,
+    R14,
+};
+
+fn getMode(bits: u5) ?Mode {
+    return std.meta.intToEnum(Mode, bits) catch null;
+}
+
+fn getModeChecked(cpu: *const Arm7tdmi, bits: u5) Mode {
+    return getMode(bits) orelse cpu.panic("[CPU/CPSR] 0b{b:0>5} is an invalid CPU mode", .{bits});
+}
+
+fn armUndefined(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
+    const id = armIdx(opcode);
+    cpu.panic("[CPU/Decode] ID: 0x{X:0>3} 0x{X:0>8} is an illegal opcode", .{ id, opcode });
+}
+
+fn thumbUndefined(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+    const id = thumbIdx(opcode);
+    cpu.panic("[CPU/Decode] ID: 0b{b:0>10} 0x{X:0>2} is an illegal opcode", .{ id, opcode });
+}
--- a/src/cpu/arm/block_data_transfer.zig
+++ b/src/cpu/arm/block_data_transfer.zig
@@ -0,0 +1,110 @@
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ArmInstrFn;
+
+pub fn blockDataTransfer(comptime P: bool, comptime U: bool, comptime S: bool, comptime W: bool, comptime L: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
+            const rn = @truncate(u4, opcode >> 16 & 0xF);
+            const rlist = opcode & 0xFFFF;
+            const r15 = rlist >> 15 & 1 == 1;
+
+            var count: u32 = 0;
+            var i: u5 = 0;
+            var first: u4 = 0;
+            var write_to_base = true;
+
+            while (i < 16) : (i += 1) {
+                const r = @truncate(u4, 15 - i);
+                if (rlist >> r & 1 == 1) {
+                    first = r;
+                    count += 1;
+                }
+            }
+
+            var start = cpu.r[rn];
+            if (U) {
+                start += if (P) 4 else 0;
+            } else {
+                start = start - (4 * count) + if (!P) 4 else 0;
+            }
+
+            var end = cpu.r[rn];
+            if (U) {
+                end = end + (4 * count) - if (!P) 4 else 0;
+            } else {
+                end -= if (P) 4 else 0;
+            }
+
+            var new_base = cpu.r[rn];
+            if (U) {
+                new_base += 4 * count;
+            } else {
+                new_base -= 4 * count;
+            }
+
+            var address = start;
+
+            if (rlist == 0) {
+                var und_addr = cpu.r[rn];
+                if (U) {
+                    und_addr += if (P) 4 else 0;
+                } else {
+                    und_addr -= 0x40 - if (!P) 4 else 0;
+                }
+
+                if (L) {
+                    cpu.r[15] = bus.read(u32, und_addr);
+                } else {
+                    bus.write(u32, und_addr, cpu.r[15] + 8);
+                }
+
+                cpu.r[rn] = if (U) cpu.r[rn] + 0x40 else cpu.r[rn] - 0x40;
+                return;
+            }
+
+            i = first;
+            while (i < 16) : (i += 1) {
+                if (rlist >> i & 1 == 1) {
+                    transfer(cpu, bus, r15, i, address);
+                    address += 4;
+
+                    if (W and !L and write_to_base) {
+                        cpu.r[rn] = new_base;
+                        write_to_base = false;
+                    }
+                }
+            }
+
+            if (W and L and rlist >> rn & 1 == 0) cpu.r[rn] = new_base;
+        }
+
+        fn transfer(cpu: *Arm7tdmi, bus: *Bus, r15_present: bool, i: u5, address: u32) void {
+            if (L) {
+                if (S and !r15_present) {
+                    // Always Transfer User mode Registers
+                    cpu.setUserModeRegister(i, bus.read(u32, address));
+                } else {
+                    const value = bus.read(u32, address);
+
+                    cpu.r[i] = value;
+                    if (i == 0xF) {
+                        cpu.r[i] &= ~@as(u32, 3); // Align r15
+                        cpu.pipe.flush();
+
+                        if (S) cpu.setCpsr(cpu.spsr.raw);
+                    }
+                }
+            } else {
+                if (S) {
+                    // Always Transfer User mode Registers
+                    // This happens regardless if r15 is in the list
+                    const value = cpu.getUserModeRegister(i);
+                    bus.write(u32, address, value + if (i == 0xF) 8 else @as(u32, 0)); // PC is already 4 ahead to make 12
+                } else {
+                    bus.write(u32, address, cpu.r[i] + if (i == 0xF) 8 else @as(u32, 0));
+                }
+            }
+        }
+    }.inner;
+}
--- a/src/cpu/arm/branch.zig
+++ b/src/cpu/arm/branch.zig
@@ -0,0 +1,27 @@
+const std = @import("std");
+
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ArmInstrFn;
+
+const sext = @import("../../util.zig").sext;
+
+pub fn branch(comptime L: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
+            if (L) cpu.r[14] = cpu.r[15] - 4;
+
+            cpu.r[15] +%= sext(u32, u24, opcode) << 2;
+            cpu.pipe.flush();
+        }
+    }.inner;
+}
+
+pub fn branchAndExchange(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
+    const rn = opcode & 0xF;
+
+    const thumb = cpu.r[rn] & 1 == 1;
+    cpu.r[15] = cpu.r[rn] & if (thumb) ~@as(u32, 1) else ~@as(u32, 3);
+    cpu.cpsr.t.write(thumb);
+    cpu.pipe.flush();
+}
--- a/src/cpu/arm/data_processing.zig
+++ b/src/cpu/arm/data_processing.zig
@@ -0,0 +1,273 @@
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ArmInstrFn;
+
+const rotateRight = @import("../barrel_shifter.zig").rotateRight;
+const execute = @import("../barrel_shifter.zig").execute;
+
+pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
+            const rd = @truncate(u4, opcode >> 12 & 0xF);
+            const rn = opcode >> 16 & 0xF;
+            const old_carry = @boolToInt(cpu.cpsr.c.read());
+
+            // If certain conditions are met, PC is 12 ahead instead of 8
+            // TODO: What are these conditions? I can't remember
+            if (!I and opcode >> 4 & 1 == 1) cpu.r[15] += 4;
+            const op1 = cpu.r[rn];
+
+            const amount = @truncate(u8, (opcode >> 8 & 0xF) << 1);
+            const op2 = if (I) rotateRight(S, &cpu.cpsr, opcode & 0xFF, amount) else execute(S, cpu, opcode);
+
+            // Undo special condition from above
+            if (!I and opcode >> 4 & 1 == 1) cpu.r[15] -= 4;
+
+            switch (instrKind) {
+                0x0 => {
+                    // AND
+                    const result = op1 & op2;
+                    cpu.r[rd] = result;
+                    setArmLogicOpFlags(S, cpu, rd, result);
+                },
+                0x1 => {
+                    // EOR
+                    const result = op1 ^ op2;
+                    cpu.r[rd] = result;
+                    setArmLogicOpFlags(S, cpu, rd, result);
+                },
+                0x2 => {
+                    // SUB
+                    cpu.r[rd] = armSub(S, cpu, rd, op1, op2);
+                },
+                0x3 => {
+                    // RSB
+                    cpu.r[rd] = armSub(S, cpu, rd, op2, op1);
+                },
+                0x4 => {
+                    // ADD
+                    cpu.r[rd] = armAdd(S, cpu, rd, op1, op2);
+                },
+                0x5 => {
+                    // ADC
+                    cpu.r[rd] = armAdc(S, cpu, rd, op1, op2, old_carry);
+                },
+                0x6 => {
+                    // SBC
+                    cpu.r[rd] = armSbc(S, cpu, rd, op1, op2, old_carry);
+                },
+                0x7 => {
+                    // RSC
+                    cpu.r[rd] = armSbc(S, cpu, rd, op2, op1, old_carry);
+                },
+                0x8 => {
+                    // TST
+                    if (rd == 0xF)
+                        return undefinedTestBehaviour(cpu);
+
+                    const result = op1 & op2;
+                    setTestOpFlags(S, cpu, opcode, result);
+                },
+                0x9 => {
+                    // TEQ
+                    if (rd == 0xF)
+                        return undefinedTestBehaviour(cpu);
+
+                    const result = op1 ^ op2;
+                    setTestOpFlags(S, cpu, opcode, result);
+                },
+                0xA => {
+                    // CMP
+                    if (rd == 0xF)
+                        return undefinedTestBehaviour(cpu);
+
+                    cmp(cpu, op1, op2);
+                },
+                0xB => {
+                    // CMN
+                    if (rd == 0xF)
+                        return undefinedTestBehaviour(cpu);
+
+                    cmn(cpu, op1, op2);
+                },
+                0xC => {
+                    // ORR
+                    const result = op1 | op2;
+                    cpu.r[rd] = result;
+                    setArmLogicOpFlags(S, cpu, rd, result);
+                },
+                0xD => {
+                    // MOV
+                    cpu.r[rd] = op2;
+                    setArmLogicOpFlags(S, cpu, rd, op2);
+                },
+                0xE => {
+                    // BIC
+                    const result = op1 & ~op2;
+                    cpu.r[rd] = result;
+                    setArmLogicOpFlags(S, cpu, rd, result);
+                },
+                0xF => {
+                    // MVN
+                    const result = ~op2;
+                    cpu.r[rd] = result;
+                    setArmLogicOpFlags(S, cpu, rd, result);
+                },
+            }
+
+            if (rd == 0xF) cpu.pipe.flush();
+        }
+    }.inner;
+}
+
+fn armSbc(comptime S: bool, cpu: *Arm7tdmi, rd: u4, left: u32, right: u32, old_carry: u1) u32 {
+    var result: u32 = undefined;
+    if (S and rd == 0xF) {
+        result = sbc(false, cpu, left, right, old_carry);
+        cpu.setCpsr(cpu.spsr.raw);
+    } else {
+        result = sbc(S, cpu, left, right, old_carry);
+    }
+
+    return result;
+}
+
+pub fn sbc(comptime S: bool, cpu: *Arm7tdmi, left: u32, right: u32, old_carry: u1) u32 {
+    // TODO: Make your own version (thanks peach.bot)
+    const subtrahend = @as(u64, right) -% old_carry +% 1;
+    const result = @truncate(u32, left -% subtrahend);
+
+    if (S) {
+        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+        cpu.cpsr.z.write(result == 0);
+        cpu.cpsr.c.write(subtrahend <= left);
+        cpu.cpsr.v.write(((left ^ result) & (~right ^ result)) >> 31 & 1 == 1);
+    }
+
+    return result;
+}
+
+fn armSub(comptime S: bool, cpu: *Arm7tdmi, rd: u4, left: u32, right: u32) u32 {
+    var result: u32 = undefined;
+    if (S and rd == 0xF) {
+        result = sub(false, cpu, left, right);
+        cpu.setCpsr(cpu.spsr.raw);
+    } else {
+        result = sub(S, cpu, left, right);
+    }
+
+    return result;
+}
+
+pub fn sub(comptime S: bool, cpu: *Arm7tdmi, left: u32, right: u32) u32 {
+    const result = left -% right;
+
+    if (S) {
+        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+        cpu.cpsr.z.write(result == 0);
+        cpu.cpsr.c.write(right <= left);
+        cpu.cpsr.v.write(((left ^ result) & (~right ^ result)) >> 31 & 1 == 1);
+    }
+
+    return result;
+}
+
+fn armAdd(comptime S: bool, cpu: *Arm7tdmi, rd: u4, left: u32, right: u32) u32 {
+    var result: u32 = undefined;
+    if (S and rd == 0xF) {
+        result = add(false, cpu, left, right);
+        cpu.setCpsr(cpu.spsr.raw);
+    } else {
+        result = add(S, cpu, left, right);
+    }
+
+    return result;
+}
+
+pub fn add(comptime S: bool, cpu: *Arm7tdmi, left: u32, right: u32) u32 {
+    var result: u32 = undefined;
+    const didOverflow = @addWithOverflow(u32, left, right, &result);
+
+    if (S) {
+        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+        cpu.cpsr.z.write(result == 0);
+        cpu.cpsr.c.write(didOverflow);
+        cpu.cpsr.v.write(((left ^ result) & (right ^ result)) >> 31 & 1 == 1);
+    }
+
+    return result;
+}
+
+fn armAdc(comptime S: bool, cpu: *Arm7tdmi, rd: u4, left: u32, right: u32, old_carry: u1) u32 {
+    var result: u32 = undefined;
+    if (S and rd == 0xF) {
+        result = adc(false, cpu, left, right, old_carry);
+        cpu.setCpsr(cpu.spsr.raw);
+    } else {
+        result = adc(S, cpu, left, right, old_carry);
+    }
+
+    return result;
+}
+
+pub fn adc(comptime S: bool, cpu: *Arm7tdmi, left: u32, right: u32, old_carry: u1) u32 {
+    var result: u32 = undefined;
+    const did = @addWithOverflow(u32, left, right, &result);
+    const overflow = @addWithOverflow(u32, result, old_carry, &result);
+
+    if (S) {
+        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+        cpu.cpsr.z.write(result == 0);
+        cpu.cpsr.c.write(did or overflow);
+        cpu.cpsr.v.write(((left ^ result) & (right ^ result)) >> 31 & 1 == 1);
+    }
+
+    return result;
+}
+
+pub fn cmp(cpu: *Arm7tdmi, left: u32, right: u32) void {
+    const result = left -% right;
+
+    cpu.cpsr.n.write(result >> 31 & 1 == 1);
+    cpu.cpsr.z.write(result == 0);
+    cpu.cpsr.c.write(right <= left);
+    cpu.cpsr.v.write(((left ^ result) & (~right ^ result)) >> 31 & 1 == 1);
+}
+
+pub fn cmn(cpu: *Arm7tdmi, left: u32, right: u32) void {
+    var result: u32 = undefined;
+    const didOverflow = @addWithOverflow(u32, left, right, &result);
+
+    cpu.cpsr.n.write(result >> 31 & 1 == 1);
+    cpu.cpsr.z.write(result == 0);
+    cpu.cpsr.c.write(didOverflow);
+    cpu.cpsr.v.write(((left ^ result) & (right ^ result)) >> 31 & 1 == 1);
+}
+
+fn setArmLogicOpFlags(comptime S: bool, cpu: *Arm7tdmi, rd: u4, result: u32) void {
+    if (S and rd == 0xF) {
+        cpu.setCpsr(cpu.spsr.raw);
+    } else {
+        setLogicOpFlags(S, cpu, result);
+    }
+}
+
+pub fn setLogicOpFlags(comptime S: bool, cpu: *Arm7tdmi, result: u32) void {
+    if (S) {
+        cpu.cpsr.n.write(result >> 31 & 1 == 1);
+        cpu.cpsr.z.write(result == 0);
+        // C set by Barrel Shifter, V is unaffected
+    }
+}
+
+fn setTestOpFlags(comptime S: bool, cpu: *Arm7tdmi, opcode: u32, result: u32) void {
+    cpu.cpsr.n.write(result >> 31 & 1 == 1);
+    cpu.cpsr.z.write(result == 0);
+    // Barrel Shifter should always calc CPSR C in TST
+    if (!S) _ = execute(true, cpu, opcode);
+}
+
+fn undefinedTestBehaviour(cpu: *Arm7tdmi) void {
+    @setCold(true);
+    cpu.setCpsrNoFlush(cpu.spsr.raw);
+}
--- a/src/cpu/arm/half_signed_data_transfer.zig
+++ b/src/cpu/arm/half_signed_data_transfer.zig
@@ -0,0 +1,70 @@
+const std = @import("std");
+
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ArmInstrFn;
+
+const sext = @import("../../util.zig").sext;
+const rotr = @import("../../util.zig").rotr;
+
+pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
+            const rn = opcode >> 16 & 0xF;
+            const rd = opcode >> 12 & 0xF;
+            const rm = opcode & 0xF;
+            const imm_offset_high = opcode >> 8 & 0xF;
+
+            var base: u32 = undefined;
+            if (rn == 0xF) {
+                base = cpu.fakePC();
+                if (!L) base += 4;
+            } else {
+                base = cpu.r[rn];
+            }
+
+            var offset: u32 = undefined;
+            if (I) {
+                offset = imm_offset_high << 4 | rm;
+            } else {
+                offset = cpu.r[rm];
+            }
+
+            const modified_base = if (U) base +% offset else base -% offset;
+            var address = if (P) modified_base else base;
+
+            var result: u32 = undefined;
+            if (L) {
+                switch (@truncate(u2, opcode >> 5)) {
+                    0b01 => {
+                        // LDRH
+                        const value = bus.read(u16, address);
+                        result = rotr(u32, value, 8 * (address & 1));
+                    },
+                    0b10 => {
+                        // LDRSB
+                        result = sext(u32, u8, bus.read(u8, address));
+                    },
+                    0b11 => {
+                        // LDRSH
+                        result = if (address & 1 == 1) blk: {
+                            break :blk sext(u32, u8, bus.read(u8, address));
+                        } else blk: {
+                            break :blk sext(u32, u16, bus.read(u16, address));
+                        };
+                    },
+                    0b00 => unreachable, // SWP
+                }
+            } else {
+                if (opcode >> 5 & 0x01 == 0x01) {
+                    // STRH
+                    bus.write(u16, address, @truncate(u16, cpu.r[rd]));
+                } else unreachable; // SWP
+            }
+
+            address = modified_base;
+            if (W and P or !P) cpu.r[rn] = address;
+            if (L) cpu.r[rd] = result; // // This emulates the LDR rd == rn behaviour
+        }
+    }.inner;
+}
--- a/src/cpu/arm/multiply.zig
+++ b/src/cpu/arm/multiply.zig
@@ -0,0 +1,57 @@
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ArmInstrFn;
+
+pub fn multiply(comptime A: bool, comptime S: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
+            const rd = opcode >> 16 & 0xF;
+            const rn = opcode >> 12 & 0xF;
+            const rs = opcode >> 8 & 0xF;
+            const rm = opcode & 0xF;
+
+            const temp: u64 = @as(u64, cpu.r[rm]) * @as(u64, cpu.r[rs]) + if (A) cpu.r[rn] else 0;
+            const result = @truncate(u32, temp);
+            cpu.r[rd] = result;
+
+            if (S) {
+                cpu.cpsr.n.write(result >> 31 & 1 == 1);
+                cpu.cpsr.z.write(result == 0);
+                // V is unaffected, C is *actually* undefined in ARMv4
+            }
+        }
+    }.inner;
+}
+
+pub fn multiplyLong(comptime U: bool, comptime A: bool, comptime S: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
+            const rd_hi = opcode >> 16 & 0xF;
+            const rd_lo = opcode >> 12 & 0xF;
+            const rs = opcode >> 8 & 0xF;
+            const rm = opcode & 0xF;
+
+            if (U) {
+                // Signed (WHY IS IT U THEN?)
+                var result: i64 = @as(i64, @bitCast(i32, cpu.r[rm])) * @as(i64, @bitCast(i32, cpu.r[rs]));
+                if (A) result +%= @bitCast(i64, @as(u64, cpu.r[rd_hi]) << 32 | @as(u64, cpu.r[rd_lo]));
+
+                cpu.r[rd_hi] = @bitCast(u32, @truncate(i32, result >> 32));
+                cpu.r[rd_lo] = @bitCast(u32, @truncate(i32, result));
+            } else {
+                // Unsigned
+                var result: u64 = @as(u64, cpu.r[rm]) * @as(u64, cpu.r[rs]);
+                if (A) result +%= @as(u64, cpu.r[rd_hi]) << 32 | @as(u64, cpu.r[rd_lo]);
+
+                cpu.r[rd_hi] = @truncate(u32, result >> 32);
+                cpu.r[rd_lo] = @truncate(u32, result);
+            }
+
+            if (S) {
+                cpu.cpsr.z.write(cpu.r[rd_hi] == 0 and cpu.r[rd_lo] == 0);
+                cpu.cpsr.n.write(cpu.r[rd_hi] >> 31 & 1 == 1);
+                // C and V are set to meaningless values
+            }
+        }
+    }.inner;
+}
--- a/src/cpu/arm/psr_transfer.zig
+++ b/src/cpu/arm/psr_transfer.zig
@@ -0,0 +1,59 @@
+const std = @import("std");
+
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ArmInstrFn;
+const PSR = @import("../../cpu.zig").PSR;
+
+const log = std.log.scoped(.PsrTransfer);
+
+const rotr = @import("../../util.zig").rotr;
+
+pub fn psrTransfer(comptime I: bool, comptime R: bool, comptime kind: u2) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
+            switch (kind) {
+                0b00 => {
+                    // MRS
+                    const rd = opcode >> 12 & 0xF;
+
+                    if (R and !cpu.hasSPSR()) log.err("Tried to read SPSR from User/System Mode", .{});
+                    cpu.r[rd] = if (R) cpu.spsr.raw else cpu.cpsr.raw;
+                },
+                0b10 => {
+                    // MSR
+                    const field_mask = @truncate(u4, opcode >> 16 & 0xF);
+                    const rm_idx = opcode & 0xF;
+                    const right = if (I) rotr(u32, opcode & 0xFF, (opcode >> 8 & 0xF) * 2) else cpu.r[rm_idx];
+
+                    if (R and !cpu.hasSPSR()) log.err("Tried to write to SPSR in User/System Mode", .{});
+
+                    if (R) {
+                        // arm.gba seems to expect the SPSR to do somethign in SYS mode,
+                        // so we just assume that despite writing to the SPSR in USR or SYS mode
+                        // being UNPREDICTABLE, it just magically has a working SPSR somehow
+                        cpu.spsr.raw = fieldMask(&cpu.spsr, field_mask, right);
+                    } else {
+                        if (cpu.isPrivileged()) cpu.setCpsr(fieldMask(&cpu.cpsr, field_mask, right));
+                    }
+                },
+                else => cpu.panic("[CPU/PSR Transfer] Bits 21:220 of {X:0>8} are undefined", .{opcode}),
+            }
+        }
+    }.inner;
+}
+
+fn fieldMask(psr: *const PSR, field_mask: u4, right: u32) u32 {
+    // This bitwise ORs bits 3 and 0 of the field mask into a u2
+    // We do this because we only care about bits 7:0 and 31:28 of the CPSR
+    const bits = @truncate(u2, (field_mask >> 2 & 0x2) | (field_mask & 1));
+
+    const mask: u32 = switch (bits) {
+        0b00 => 0x0000_0000,
+        0b01 => 0x0000_00FF,
+        0b10 => 0xF000_0000,
+        0b11 => 0xF000_00FF,
+    };
+
+    return (psr.raw & ~mask) | (right & mask);
+}
--- a/src/cpu/arm/single_data_swap.zig
+++ b/src/cpu/arm/single_data_swap.zig
@@ -0,0 +1,31 @@
+const std = @import("std");
+
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ArmInstrFn;
+
+const rotr = @import("../../util.zig").rotr;
+
+pub fn singleDataSwap(comptime B: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
+            const rn = opcode >> 16 & 0xF;
+            const rd = opcode >> 12 & 0xF;
+            const rm = opcode & 0xF;
+
+            const address = cpu.r[rn];
+
+            if (B) {
+                // SWPB
+                const value = bus.read(u8, address);
+                bus.write(u8, address, @truncate(u8, cpu.r[rm]));
+                cpu.r[rd] = value;
+            } else {
+                // SWP
+                const value = rotr(u32, bus.read(u32, address), 8 * (address & 0x3));
+                bus.write(u32, address, cpu.r[rm]);
+                cpu.r[rd] = value;
+            }
+        }
+    }.inner;
+}
--- a/src/cpu/arm/single_data_transfer.zig
+++ b/src/cpu/arm/single_data_transfer.zig
@@ -0,0 +1,52 @@
+const std = @import("std");
+const util = @import("../../util.zig");
+
+const shifter = @import("../barrel_shifter.zig");
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ArmInstrFn;
+
+const rotr = @import("../../util.zig").rotr;
+
+pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u32) void {
+            const rn = opcode >> 16 & 0xF;
+            const rd = opcode >> 12 & 0xF;
+
+            // If L is set, there is an offset of 12 from the instruction to the PC
+            const base = cpu.r[rn] + if (!L) 4 else @as(u32, 0);
+
+            const offset = if (I) shifter.immShift(false, cpu, opcode) else opcode & 0xFFF;
+
+            const modified_base = if (U) base +% offset else base -% offset;
+            var address = if (P) modified_base else base;
+
+            var result: u32 = undefined;
+            if (L) {
+                if (B) {
+                    // LDRB
+                    result = bus.read(u8, address);
+                } else {
+                    // LDR
+                    const value = bus.read(u32, address);
+                    result = rotr(u32, value, 8 * (address & 0x3));
+                }
+            } else {
+                if (B) {
+                    // STRB
+                    const value = if (rd == 0xF) cpu.r[rd] + 8 else cpu.r[rd];
+                    bus.write(u8, address, @truncate(u8, value));
+                } else {
+                    // STR
+                    const value = if (rd == 0xF) cpu.r[rd] + 8 else cpu.r[rd];
+                    bus.write(u32, address, value);
+                }
+            }
+
+            address = modified_base;
+            if (W and P or !P) cpu.r[rn] = address;
+            if (L) cpu.r[rd] = result; // This emulates the LDR rd == rn behaviour
+        }
+    }.inner;
+}
--- a/src/cpu/arm/software_interrupt.zig
+++ b/src/cpu/arm/software_interrupt.zig
@@ -0,0 +1,23 @@
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ArmInstrFn;
+
+pub fn armSoftwareInterrupt() InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, _: u32) void {
+            // Copy Values from Current Mode
+            const ret_addr = cpu.r[15] - 4;
+            const cpsr = cpu.cpsr.raw;
+
+            // Switch Mode
+            cpu.changeMode(.Supervisor);
+            cpu.cpsr.t.write(false); // Force ARM Mode
+            cpu.cpsr.i.write(true); // Disable normal interrupts
+
+            cpu.r[14] = ret_addr; // Resume Execution
+            cpu.spsr.raw = cpsr; // Previous mode CPSR
+            cpu.r[15] = 0x0000_0008;
+            cpu.pipe.flush();
+        }
+    }.inner;
+}
--- a/src/cpu/barrel_shifter.zig
+++ b/src/cpu/barrel_shifter.zig
@@ -0,0 +1,149 @@
+const std = @import("std");
+
+const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
+const CPSR = @import("../cpu.zig").PSR;
+
+const rotr = @import("../util.zig").rotr;
+
+pub fn execute(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
+    var result: u32 = undefined;
+    if (opcode >> 4 & 1 == 1) {
+        result = registerShift(S, cpu, opcode);
+    } else {
+        result = immShift(S, cpu, opcode);
+    }
+
+    return result;
+}
+
+fn registerShift(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
+    const rs_idx = opcode >> 8 & 0xF;
+    const rm = cpu.r[opcode & 0xF];
+    const rs = @truncate(u8, cpu.r[rs_idx]);
+
+    return switch (@truncate(u2, opcode >> 5)) {
+        0b00 => logicalLeft(S, &cpu.cpsr, rm, rs),
+        0b01 => logicalRight(S, &cpu.cpsr, rm, rs),
+        0b10 => arithmeticRight(S, &cpu.cpsr, rm, rs),
+        0b11 => rotateRight(S, &cpu.cpsr, rm, rs),
+    };
+}
+
+pub fn immShift(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
+    const amount = @truncate(u8, opcode >> 7 & 0x1F);
+    const rm = cpu.r[opcode & 0xF];
+
+    var result: u32 = undefined;
+    if (amount == 0) {
+        switch (@truncate(u2, opcode >> 5)) {
+            0b00 => {
+                // LSL #0
+                result = rm;
+            },
+            0b01 => {
+                // LSR #0 aka LSR #32
+                if (S) cpu.cpsr.c.write(rm >> 31 & 1 == 1);
+                result = 0x0000_0000;
+            },
+            0b10 => {
+                // ASR #0 aka ASR #32
+                result = @bitCast(u32, @bitCast(i32, rm) >> 31);
+                if (S) cpu.cpsr.c.write(result >> 31 & 1 == 1);
+            },
+            0b11 => {
+                // ROR #0 aka RRX
+                const carry: u32 = @boolToInt(cpu.cpsr.c.read());
+                if (S) cpu.cpsr.c.write(rm & 1 == 1);
+
+                result = (carry << 31) | (rm >> 1);
+            },
+        }
+    } else {
+        switch (@truncate(u2, opcode >> 5)) {
+            0b00 => result = logicalLeft(S, &cpu.cpsr, rm, amount),
+            0b01 => result = logicalRight(S, &cpu.cpsr, rm, amount),
+            0b10 => result = arithmeticRight(S, &cpu.cpsr, rm, amount),
+            0b11 => result = rotateRight(S, &cpu.cpsr, rm, amount),
+        }
+    }
+
+    return result;
+}
+
+pub fn logicalLeft(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
+    const amount = @truncate(u5, total_amount);
+    const bit_count: u8 = @typeInfo(u32).Int.bits;
+
+    var result: u32 = 0x0000_0000;
+    if (total_amount < bit_count) {
+        // We can perform a well-defined shift here
+        result = rm << amount;
+
+        if (S and total_amount != 0) {
+            const carry_bit = @truncate(u5, bit_count - amount);
+            cpsr.c.write(rm >> carry_bit & 1 == 1);
+        }
+    } else {
+        if (S) {
+            if (total_amount == bit_count) {
+                // Shifted all bits out, carry bit is bit 0 of rm
+                cpsr.c.write(rm & 1 == 1);
+            } else {
+                cpsr.c.write(false);
+            }
+        }
+    }
+
+    return result;
+}
+
+pub fn logicalRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u32) u32 {
+    const amount = @truncate(u5, total_amount);
+    const bit_count: u8 = @typeInfo(u32).Int.bits;
+
+    var result: u32 = 0x0000_0000;
+    if (total_amount < bit_count) {
+        // We can perform a well-defined shift
+        result = rm >> amount;
+        if (S and total_amount != 0) cpsr.c.write(rm >> (amount - 1) & 1 == 1);
+    } else {
+        if (S) {
+            if (total_amount == bit_count) {
+                // LSR #32
+                cpsr.c.write(rm >> 31 & 1 == 1);
+            } else {
+                // All bits have been shifted out, including carry bit
+                cpsr.c.write(false);
+            }
+        }
+    }
+
+    return result;
+}
+
+pub fn arithmeticRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
+    const amount = @truncate(u5, total_amount);
+    const bit_count: u8 = @typeInfo(u32).Int.bits;
+
+    var result: u32 = 0x0000_0000;
+    if (total_amount < bit_count) {
+        result = @bitCast(u32, @bitCast(i32, rm) >> amount);
+        if (S and total_amount != 0) cpsr.c.write(rm >> (amount - 1) & 1 == 1);
+    } else {
+        // ASR #32 and ASR #>32 have the same result
+        result = @bitCast(u32, @bitCast(i32, rm) >> 31);
+        if (S) cpsr.c.write(result >> 31 & 1 == 1);
+    }
+
+    return result;
+}
+
+pub fn rotateRight(comptime S: bool, cpsr: *CPSR, rm: u32, total_amount: u8) u32 {
+    const result = rotr(u32, rm, total_amount);
+
+    if (S and total_amount != 0) {
+        cpsr.c.write(result >> 31 & 1 == 1);
+    }
+
+    return result;
+}
--- a/src/cpu/thumb/alu.zig
+++ b/src/cpu/thumb/alu.zig
@@ -0,0 +1,118 @@
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
+
+const adc = @import("../arm/data_processing.zig").adc;
+const sbc = @import("../arm/data_processing.zig").sbc;
+const sub = @import("../arm/data_processing.zig").sub;
+const cmp = @import("../arm/data_processing.zig").cmp;
+const cmn = @import("../arm/data_processing.zig").cmn;
+const setTestOpFlags = @import("../arm/data_processing.zig").setTestOpFlags;
+const setLogicOpFlags = @import("../arm/data_processing.zig").setLogicOpFlags;
+
+const logicalLeft = @import("../barrel_shifter.zig").logicalLeft;
+const logicalRight = @import("../barrel_shifter.zig").logicalRight;
+const arithmeticRight = @import("../barrel_shifter.zig").arithmeticRight;
+const rotateRight = @import("../barrel_shifter.zig").rotateRight;
+
+pub fn format4(comptime op: u4) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            const rs = opcode >> 3 & 0x7;
+            const rd = opcode & 0x7;
+            const carry = @boolToInt(cpu.cpsr.c.read());
+
+            switch (op) {
+                0x0 => {
+                    // AND
+                    const result = cpu.r[rd] & cpu.r[rs];
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0x1 => {
+                    // EOR
+                    const result = cpu.r[rd] ^ cpu.r[rs];
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0x2 => {
+                    // LSL
+                    const result = logicalLeft(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0x3 => {
+                    // LSR
+                    const result = logicalRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0x4 => {
+                    // ASR
+                    const result = arithmeticRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0x5 => {
+                    // ADC
+                    cpu.r[rd] = adc(true, cpu, cpu.r[rd], cpu.r[rs], carry);
+                },
+                0x6 => {
+                    // SBC
+                    cpu.r[rd] = sbc(true, cpu, cpu.r[rd], cpu.r[rs], carry);
+                },
+                0x7 => {
+                    // ROR
+                    const result = rotateRight(true, &cpu.cpsr, cpu.r[rd], @truncate(u8, cpu.r[rs]));
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0x8 => {
+                    // TST
+                    const result = cpu.r[rd] & cpu.r[rs];
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0x9 => {
+                    // NEG
+                    cpu.r[rd] = sub(true, cpu, 0, cpu.r[rs]);
+                },
+                0xA => {
+                    // CMP
+                    cmp(cpu, cpu.r[rd], cpu.r[rs]);
+                },
+                0xB => {
+                    // CMN
+                    cmn(cpu, cpu.r[rd], cpu.r[rs]);
+                },
+                0xC => {
+                    // ORR
+                    const result = cpu.r[rd] | cpu.r[rs];
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0xD => {
+                    // MUL
+                    const temp = @as(u64, cpu.r[rs]) * @as(u64, cpu.r[rd]);
+                    const result = @truncate(u32, temp);
+                    cpu.r[rd] = result;
+
+                    cpu.cpsr.n.write(result >> 31 & 1 == 1);
+                    cpu.cpsr.z.write(result == 0);
+                    // V is unaffected, assuming similar behaviour to ARMv4 MUL C is undefined
+                },
+                0xE => {
+                    // BIC
+                    const result = cpu.r[rd] & ~cpu.r[rs];
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+                0xF => {
+                    // MVN
+                    const result = ~cpu.r[rs];
+                    cpu.r[rd] = result;
+                    setLogicOpFlags(true, cpu, result);
+                },
+            }
+        }
+    }.inner;
+}
--- a/src/cpu/thumb/block_data_transfer.zig
+++ b/src/cpu/thumb/block_data_transfer.zig
@@ -0,0 +1,101 @@
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
+
+pub fn format14(comptime L: bool, comptime R: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
+            const count = @boolToInt(R) + countRlist(opcode);
+            const start = cpu.r[13] - if (!L) count * 4 else 0;
+
+            var end = cpu.r[13];
+            if (L) {
+                end += count * 4;
+            } else {
+                end -= 4;
+            }
+
+            var address = start;
+
+            var i: u4 = 0;
+            while (i < 8) : (i += 1) {
+                if (opcode >> i & 1 == 1) {
+                    if (L) {
+                        cpu.r[i] = bus.read(u32, address);
+                    } else {
+                        bus.write(u32, address, cpu.r[i]);
+                    }
+
+                    address += 4;
+                }
+            }
+
+            if (R) {
+                if (L) {
+                    const value = bus.read(u32, address);
+                    cpu.r[15] = value & ~@as(u32, 1);
+                    cpu.pipe.flush();
+                } else {
+                    bus.write(u32, address, cpu.r[14]);
+                }
+                address += 4;
+            }
+
+            cpu.r[13] = if (L) end else start;
+        }
+    }.inner;
+}
+
+pub fn format15(comptime L: bool, comptime rb: u3) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
+            var address = cpu.r[rb];
+            const end_address = cpu.r[rb] + 4 * countRlist(opcode);
+
+            if (opcode & 0xFF == 0) {
+                if (L) {
+                    cpu.r[15] = bus.read(u32, address);
+                    cpu.pipe.flush();
+                } else {
+                    bus.write(u32, address, cpu.r[15] + 2);
+                }
+
+                cpu.r[rb] += 0x40;
+                return;
+            }
+
+            var i: u4 = 0;
+            var first_write = true;
+
+            while (i < 8) : (i += 1) {
+                if (opcode >> i & 1 == 1) {
+                    if (L) {
+                        cpu.r[i] = bus.read(u32, address);
+                    } else {
+                        bus.write(u32, address, cpu.r[i]);
+                    }
+
+                    if (!L and first_write) {
+                        cpu.r[rb] = end_address;
+                        first_write = false;
+                    }
+
+                    address += 4;
+                }
+            }
+
+            if (L and opcode >> rb & 1 != 1) cpu.r[rb] = address;
+        }
+    }.inner;
+}
+
+inline fn countRlist(opcode: u16) u32 {
+    var count: u32 = 0;
+
+    comptime var i: u4 = 0;
+    inline while (i < 8) : (i += 1) {
+        if (opcode >> (7 - i) & 1 == 1) count += 1;
+    }
+
+    return count;
+}
--- a/src/cpu/thumb/branch.zig
+++ b/src/cpu/thumb/branch.zig
@@ -0,0 +1,54 @@
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
+
+const checkCond = @import("../../cpu.zig").checkCond;
+const sext = @import("../../util.zig").sext;
+
+pub fn format16(comptime cond: u4) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            // B
+            if (cond == 0xE or cond == 0xF)
+                cpu.panic("[CPU/THUMB.16] Undefined conditional branch with condition {}", .{cond});
+
+            if (!checkCond(cpu.cpsr, cond)) return;
+
+            cpu.r[15] +%= sext(u32, u8, opcode & 0xFF) << 1;
+            cpu.pipe.flush();
+        }
+    }.inner;
+}
+
+pub fn format18() InstrFn {
+    return struct {
+        // B but conditional
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            cpu.r[15] +%= sext(u32, u11, opcode & 0x7FF) << 1;
+            cpu.pipe.flush();
+        }
+    }.inner;
+}
+
+pub fn format19(comptime is_low: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            // BL
+            const offset = opcode & 0x7FF;
+
+            if (is_low) {
+                // Instruction 2
+                const next_opcode = cpu.r[15] - 2;
+
+                cpu.r[15] = cpu.r[14] +% (offset << 1);
+                cpu.r[14] = next_opcode | 1;
+
+                cpu.pipe.flush();
+            } else {
+                // Instruction 1
+                const lr_offset = sext(u32, u11, offset) << 12;
+                cpu.r[14] = (cpu.r[15] +% lr_offset) & ~@as(u32, 1);
+            }
+        }
+    }.inner;
+}
--- a/src/cpu/thumb/data_processing.zig
+++ b/src/cpu/thumb/data_processing.zig
@@ -0,0 +1,121 @@
+const std = @import("std");
+
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
+const shifter = @import("../barrel_shifter.zig");
+
+const add = @import("../arm/data_processing.zig").add;
+const sub = @import("../arm/data_processing.zig").sub;
+const cmp = @import("../arm/data_processing.zig").cmp;
+const setLogicOpFlags = @import("../arm/data_processing.zig").setLogicOpFlags;
+
+const log = std.log.scoped(.Thumb1);
+
+pub fn format1(comptime op: u2, comptime offset: u5) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            const rs = opcode >> 3 & 0x7;
+            const rd = opcode & 0x7;
+
+            const result = switch (op) {
+                0b00 => blk: {
+                    // LSL
+                    if (offset == 0) {
+                        break :blk cpu.r[rs];
+                    } else {
+                        break :blk shifter.logicalLeft(true, &cpu.cpsr, cpu.r[rs], offset);
+                    }
+                },
+                0b01 => blk: {
+                    // LSR
+                    if (offset == 0) {
+                        cpu.cpsr.c.write(cpu.r[rs] >> 31 & 1 == 1);
+                        break :blk @as(u32, 0);
+                    } else {
+                        break :blk shifter.logicalRight(true, &cpu.cpsr, cpu.r[rs], offset);
+                    }
+                },
+                0b10 => blk: {
+                    // ASR
+                    if (offset == 0) {
+                        cpu.cpsr.c.write(cpu.r[rs] >> 31 & 1 == 1);
+                        break :blk @bitCast(u32, @bitCast(i32, cpu.r[rs]) >> 31);
+                    } else {
+                        break :blk shifter.arithmeticRight(true, &cpu.cpsr, cpu.r[rs], offset);
+                    }
+                },
+                else => cpu.panic("[CPU/THUMB.1] 0b{b:0>2} is not a valid op", .{op}),
+            };
+
+            // Equivalent to an ARM MOVS
+            cpu.r[rd] = result;
+            setLogicOpFlags(true, cpu, result);
+        }
+    }.inner;
+}
+
+pub fn format2(comptime I: bool, is_sub: bool, rn: u3) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            const rs = opcode >> 3 & 0x7;
+            const rd = @truncate(u3, opcode);
+
+            if (is_sub) {
+                // SUB
+                cpu.r[rd] = if (I) blk: {
+                    break :blk sub(true, cpu, cpu.r[rs], rn);
+                } else blk: {
+                    break :blk sub(true, cpu, cpu.r[rs], cpu.r[rn]);
+                };
+            } else {
+                // ADD
+                cpu.r[rd] = if (I) blk: {
+                    break :blk add(true, cpu, cpu.r[rs], rn);
+                } else blk: {
+                    break :blk add(true, cpu, cpu.r[rs], cpu.r[rn]);
+                };
+            }
+        }
+    }.inner;
+}
+
+pub fn format3(comptime op: u2, comptime rd: u3) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            const offset = @truncate(u8, opcode);
+
+            switch (op) {
+                0b00 => {
+                    // MOV
+                    cpu.r[rd] = offset;
+                    setLogicOpFlags(true, cpu, offset);
+                },
+                0b01 => cmp(cpu, cpu.r[rd], offset), // CMP
+                0b10 => cpu.r[rd] = add(true, cpu, cpu.r[rd], offset), // ADD
+                0b11 => cpu.r[rd] = sub(true, cpu, cpu.r[rd], offset), // SUB
+            }
+        }
+    }.inner;
+}
+
+pub fn format12(comptime SP: bool, comptime rd: u3) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            // ADD
+            const left = if (SP) cpu.r[13] else cpu.r[15] & ~@as(u32, 2);
+            const right = (opcode & 0xFF) << 2;
+            cpu.r[rd] = left + right;
+        }
+    }.inner;
+}
+
+pub fn format13(comptime S: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            // ADD
+            const offset = (opcode & 0x7F) << 2;
+            cpu.r[13] = if (S) cpu.r[13] - offset else cpu.r[13] + offset;
+        }
+    }.inner;
+}
--- a/src/cpu/thumb/data_transfer.zig
+++ b/src/cpu/thumb/data_transfer.zig
@@ -0,0 +1,151 @@
+const std = @import("std");
+
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
+
+const rotr = @import("../../util.zig").rotr;
+
+pub fn format6(comptime rd: u3) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
+            // LDR
+            const offset = (opcode & 0xFF) << 2;
+
+            // Bit 1 of the PC intentionally ignored
+            cpu.r[rd] = bus.read(u32, (cpu.r[15] & ~@as(u32, 2)) + offset);
+        }
+    }.inner;
+}
+
+const sext = @import("../../util.zig").sext;
+
+pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
+            const ro = opcode >> 6 & 0x7;
+            const rb = opcode >> 3 & 0x7;
+            const rd = opcode & 0x7;
+
+            const address = cpu.r[rb] +% cpu.r[ro];
+
+            if (T) {
+                // Format 8
+                switch (op) {
+                    0b00 => {
+                        // STRH
+                        bus.write(u16, address, @truncate(u16, cpu.r[rd]));
+                    },
+                    0b01 => {
+                        // LDSB
+                        cpu.r[rd] = sext(u32, u8, bus.read(u8, address));
+                    },
+                    0b10 => {
+                        // LDRH
+                        const value = bus.read(u16, address);
+                        cpu.r[rd] = rotr(u32, value, 8 * (address & 1));
+                    },
+                    0b11 => {
+                        // LDRSH
+                        cpu.r[rd] = if (address & 1 == 1) blk: {
+                            break :blk sext(u32, u8, bus.read(u8, address));
+                        } else blk: {
+                            break :blk sext(u32, u16, bus.read(u16, address));
+                        };
+                    },
+                }
+            } else {
+                // Format 7
+                switch (op) {
+                    0b00 => {
+                        // STR
+                        bus.write(u32, address, cpu.r[rd]);
+                    },
+                    0b01 => {
+                        // STRB
+                        bus.write(u8, address, @truncate(u8, cpu.r[rd]));
+                    },
+                    0b10 => {
+                        // LDR
+                        const value = bus.read(u32, address);
+                        cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
+                    },
+                    0b11 => {
+                        // LDRB
+                        cpu.r[rd] = bus.read(u8, address);
+                    },
+                }
+            }
+        }
+    }.inner;
+}
+
+pub fn format9(comptime B: bool, comptime L: bool, comptime offset: u5) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
+            const rb = opcode >> 3 & 0x7;
+            const rd = opcode & 0x7;
+
+            if (L) {
+                if (B) {
+                    // LDRB
+                    const address = cpu.r[rb] + offset;
+                    cpu.r[rd] = bus.read(u8, address);
+                } else {
+                    // LDR
+                    const address = cpu.r[rb] + (@as(u32, offset) << 2);
+                    const value = bus.read(u32, address);
+                    cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
+                }
+            } else {
+                if (B) {
+                    // STRB
+                    const address = cpu.r[rb] + offset;
+                    bus.write(u8, address, @truncate(u8, cpu.r[rd]));
+                } else {
+                    // STR
+                    const address = cpu.r[rb] + (@as(u32, offset) << 2);
+                    bus.write(u32, address, cpu.r[rd]);
+                }
+            }
+        }
+    }.inner;
+}
+
+pub fn format10(comptime L: bool, comptime offset: u5) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
+            const rb = opcode >> 3 & 0x7;
+            const rd = opcode & 0x7;
+
+            const address = cpu.r[rb] + (@as(u6, offset) << 1);
+
+            if (L) {
+                // LDRH
+                const value = bus.read(u16, address);
+                cpu.r[rd] = rotr(u32, value, 8 * (address & 1));
+            } else {
+                // STRH
+                bus.write(u16, address, @truncate(u16, cpu.r[rd]));
+            }
+        }
+    }.inner;
+}
+
+pub fn format11(comptime L: bool, comptime rd: u3) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, bus: *Bus, opcode: u16) void {
+            const offset = (opcode & 0xFF) << 2;
+            const address = cpu.r[13] + offset;
+
+            if (L) {
+                // LDR
+                const value = bus.read(u32, address);
+                cpu.r[rd] = rotr(u32, value, 8 * (address & 0x3));
+            } else {
+                // STR
+                bus.write(u32, address, cpu.r[rd]);
+            }
+        }
+    }.inner;
+}
--- a/src/cpu/thumb/processing_branch.zig
+++ b/src/cpu/thumb/processing_branch.zig
@@ -0,0 +1,42 @@
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
+
+const cmp = @import("../arm/data_processing.zig").cmp;
+const add = @import("../arm/data_processing.zig").add;
+
+pub fn format5(comptime op: u2, comptime h1: u1, comptime h2: u1) InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
+            const src_idx = @as(u4, h2) << 3 | (opcode >> 3 & 0x7);
+            const dst_idx = @as(u4, h1) << 3 | (opcode & 0x7);
+
+            const src_mask = if (src_idx == 0xF) ~@as(u32, 1) else ~@as(u32, 0);
+            const dst_mask = if (dst_idx == 0xF) ~@as(u32, 1) else ~@as(u32, 0);
+
+            const src = cpu.r[src_idx] & src_mask;
+            const dst = cpu.r[dst_idx] & dst_mask;
+
+            switch (op) {
+                0b00 => {
+                    // ADD
+                    const sum = add(false, cpu, dst, src);
+                    cpu.r[dst_idx] = sum & dst_mask;
+                },
+                0b01 => cmp(cpu, dst, src), // CMP
+                0b10 => {
+                    // MOV
+                    cpu.r[dst_idx] = src & dst_mask;
+                },
+                0b11 => {
+                    // BX
+                    cpu.cpsr.t.write(src & 1 == 1);
+                    cpu.r[15] = src & ~@as(u32, 1);
+                    cpu.pipe.flush();
+                },
+            }
+
+            if (dst_idx == 0xF) cpu.pipe.flush();
+        }
+    }.inner;
+}
--- a/src/cpu/thumb/software_interrupt.zig
+++ b/src/cpu/thumb/software_interrupt.zig
@@ -0,0 +1,23 @@
+const Bus = @import("../../Bus.zig");
+const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
+const InstrFn = @import("../../cpu.zig").ThumbInstrFn;
+
+pub fn thumbSoftwareInterrupt() InstrFn {
+    return struct {
+        fn inner(cpu: *Arm7tdmi, _: *Bus, _: u16) void {
+            // Copy Values from Current Mode
+            const ret_addr = cpu.r[15] - 2;
+            const cpsr = cpu.cpsr.raw;
+
+            // Switch Mode
+            cpu.changeMode(.Supervisor);
+            cpu.cpsr.t.write(false); // Force ARM Mode
+            cpu.cpsr.i.write(true); // Disable normal interrupts
+
+            cpu.r[14] = ret_addr; // Resume Execution
+            cpu.spsr.raw = cpsr; // Previous mode CPSR
+            cpu.r[15] = 0x0000_0008;
+            cpu.pipe.flush();
+        }
+    }.inner;
+}
--- a/src/emu.zig
+++ b/src/emu.zig
@@ -0,0 +1,176 @@
+const std = @import("std");
+const SDL = @import("sdl2");
+
+const Bus = @import("Bus.zig");
+const Scheduler = @import("scheduler.zig").Scheduler;
+const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
+const FpsTracker = @import("util.zig").FpsTracker;
+
+const Timer = std.time.Timer;
+const Thread = std.Thread;
+const Atomic = std.atomic.Atomic;
+
+const audio_sync = true;
+
+// 228 Lines which consist of 308 dots (which are 4 cycles long)
+const cycles_per_frame: u64 = 228 * (308 * 4); //280896
+const clock_rate: u64 = 1 << 24; // 16.78MHz
+
+// TODO: Don't truncate this, be more accurate w/ timing
+// 59.6046447754ns (truncated to just 59ns)
+const clock_period: u64 = std.time.ns_per_s / clock_rate;
+const frame_period = (clock_period * cycles_per_frame);
+
+// 59.7275005696Hz
+pub const frame_rate = @intToFloat(f64, std.time.ns_per_s) /
+    ((@intToFloat(f64, std.time.ns_per_s) / @intToFloat(f64, clock_rate)) * @intToFloat(f64, cycles_per_frame));
+
+const log = std.log.scoped(.Emulation);
+
+const RunKind = enum {
+    Unlimited,
+    UnlimitedFPS,
+    Limited,
+    LimitedFPS,
+    LimitedBusy,
+};
+
+pub fn run(kind: RunKind, quit: *Atomic(bool), fps: *FpsTracker, sched: *Scheduler, cpu: *Arm7tdmi) void {
+    if (audio_sync) log.info("Audio sync enabled", .{});
+
+    switch (kind) {
+        .Unlimited => runUnsynchronized(quit, sched, cpu, null),
+        .Limited => runSynchronized(quit, sched, cpu, null),
+        .UnlimitedFPS => runUnsynchronized(quit, sched, cpu, fps),
+        .LimitedFPS => runSynchronized(quit, sched, cpu, fps),
+        .LimitedBusy => runBusyLoop(quit, sched, cpu),
+    }
+}
+
+pub fn runFrame(sched: *Scheduler, cpu: *Arm7tdmi) void {
+    const frame_end = sched.tick + cycles_per_frame;
+
+    while (true) {
+        while (sched.tick < std.math.min(frame_end, sched.nextTimestamp())) {
+            if (cpu.stepDmaTransfer()) continue; // DMA is blocking, ticks scheduler
+            if (!cpu.isHalted()) cpu.step() else sched.tick += 1;
+        }
+
+        if (sched.tick >= frame_end) break;
+        sched.handleEvent(cpu);
+    }
+}
+
+fn syncToAudio(cpu: *const Arm7tdmi) void {
+    const stream = cpu.bus.apu.stream;
+    const min_sample_count = 0x800;
+
+    // Busy Loop while we wait for the Audio system to catch up
+    while (SDL.SDL_AudioStreamAvailable(stream) > (@sizeOf(u16) * 2) * min_sample_count) {}
+}
+
+pub fn runUnsynchronized(quit: *Atomic(bool), sched: *Scheduler, cpu: *Arm7tdmi, fps: ?*FpsTracker) void {
+    log.info("Emulation thread w/out video sync", .{});
+
+    if (fps) |tracker| {
+        log.info("FPS Tracking Enabled", .{});
+
+        while (!quit.load(.SeqCst)) {
+            runFrame(sched, cpu);
+            if (audio_sync) syncToAudio(cpu);
+
+            tracker.tick();
+        }
+    } else {
+        while (!quit.load(.SeqCst)) {
+            runFrame(sched, cpu);
+            if (audio_sync) syncToAudio(cpu);
+        }
+    }
+}
+
+pub fn runSynchronized(quit: *Atomic(bool), sched: *Scheduler, cpu: *Arm7tdmi, fps: ?*FpsTracker) void {
+    log.info("Emulation thread w/ video sync", .{});
+    var timer = Timer.start() catch unreachable;
+    var wake_time: u64 = frame_period;
+
+    if (fps) |tracker| {
+        log.info("FPS Tracking Enabled", .{});
+
+        while (!quit.load(.SeqCst)) {
+            runFrame(sched, cpu);
+            const new_wake_time = syncToVideo(&timer, wake_time);
+
+            // Spin to make up the difference of OS scheduler innacuracies
+            // If we happen to also be syncing to audio, we choose to spin on
+            // the amount of time needed for audio to catch up rather than
+            // our expected wake-up time
+            if (audio_sync) syncToAudio(cpu) else spinLoop(&timer, wake_time);
+            wake_time = new_wake_time;
+
+            tracker.tick();
+        }
+    } else {
+        while (!quit.load(.SeqCst)) {
+            runFrame(sched, cpu);
+            const new_wake_time = syncToVideo(&timer, wake_time);
+            // see above comment
+            if (audio_sync) syncToAudio(cpu) else spinLoop(&timer, wake_time);
+
+            wake_time = new_wake_time;
+        }
+    }
+}
+
+inline fn syncToVideo(timer: *Timer, wake_time: u64) u64 {
+    // Use the OS scheduler to put the emulation thread to sleep
+    const maybe_recalc_wake_time = sleep(timer, wake_time);
+
+    // If sleep() determined we need to adjust our wake up time, do so
+    // otherwise predict our next wake up time according to the frame period
+    return if (maybe_recalc_wake_time) |recalc| recalc else wake_time + frame_period;
+}
+
+pub fn runBusyLoop(quit: *Atomic(bool), sched: *Scheduler, cpu: *Arm7tdmi) void {
+    log.info("Emulation thread with video sync using busy loop", .{});
+    var timer = Timer.start() catch unreachable;
+    var wake_time: u64 = frame_period;
+
+    while (!quit.load(.SeqCst)) {
+        runFrame(sched, cpu);
+        spinLoop(&timer, wake_time);
+
+        // Update to the new wake time
+        wake_time += frame_period;
+    }
+}
+
+fn sleep(timer: *Timer, wake_time: u64) ?u64 {
+    // const step = std.time.ns_per_ms * 10; // 10ms
+    const timestamp = timer.read();
+
+    // ns_late is non zero if we are late.
+    const ns_late = timestamp -| wake_time;
+
+    // If we're more than a frame late, skip the rest of this loop
+    // Recalculate what our new wake time should be so that we can
+    // get "back on track"
+    if (ns_late > frame_period) return timestamp + frame_period;
+    const sleep_for = frame_period - ns_late;
+
+    // // Employ several sleep calls in periods of 10ms
+    // // By doing this the behaviour should average out to be
+    // // more consistent
+    // const loop_count = sleep_for / step; // How many groups of 10ms
+
+    // var i: usize = 0;
+    // while (i < loop_count) : (i += 1) std.time.sleep(step);
+
+    std.time.sleep(sleep_for);
+
+    return null;
+}
+
+fn spinLoop(timer: *Timer, wake_time: u64) void {
+    while (true) if (timer.read() > wake_time) break;
+}
--- a/src/imgui.zig
+++ b/src/imgui.zig
@@ -1,511 +0,0 @@
-//! Namespace for dealing with ZBA's immediate-mode GUI
-//! Currently, ZBA uses zgui from https://github.com/michal-z/zig-gamedev
-//! which provides Zig bindings for https://github.com/ocornut/imgui under the hood
-
-const std = @import("std");
-const zgui = @import("zgui");
-const gl = @import("gl");
-const nfd = @import("nfd");
-const config = @import("config.zig");
-const emu = @import("core/emu.zig");
-
-const Gui = @import("platform.zig").Gui;
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const Scheduler = @import("core/scheduler.zig").Scheduler;
-const Bus = @import("core/Bus.zig");
-const Synchro = @import("core/emu.zig").Synchro;
-
-const RingBuffer = @import("zba-util").RingBuffer;
-const Dimensions = @import("platform.zig").Dimensions;
-
-const Allocator = std.mem.Allocator;
-const GLuint = gl.GLuint;
-
-const gba_width = @import("core/ppu.zig").width;
-const gba_height = @import("core/ppu.zig").height;
-
-const log = std.log.scoped(.Imgui);
-
-// two seconds worth of fps values into the past
-const histogram_len = 0x80;
-
-/// Immediate-Mode GUI State
-pub const State = struct {
-    title: [12:0]u8,
-
-    fps_hist: RingBuffer(u32),
-    should_quit: bool = false,
-    emulation: Emulation,
-
-    win_stat: WindowStatus = .{},
-
-    const WindowStatus = struct {
-        show_deps: bool = false,
-        show_regs: bool = false,
-        show_schedule: bool = false,
-        show_perf: bool = false,
-        show_palette: bool = false,
-    };
-
-    const Emulation = union(enum) {
-        Active,
-        Inactive,
-        Transition: enum { Active, Inactive },
-    };
-
-    /// if zba is initialized with a ROM already provided, this initializer should be called
-    /// with `title_opt` being non-null
-    pub fn init(allocator: Allocator, title_opt: ?*const [12]u8) !@This() {
-        const history = try allocator.alloc(u32, histogram_len);
-
-        return .{
-            .title = handleTitle(title_opt),
-            .emulation = if (title_opt == null) .Inactive else .{ .Transition = .Active },
-            .fps_hist = RingBuffer(u32).init(history),
-        };
-    }
-
-    pub fn deinit(self: *@This(), allocator: Allocator) void {
-        allocator.free(self.fps_hist.buf);
-        self.* = undefined;
-    }
-};
-
-pub fn draw(state: *State, sync: *Synchro, dim: Dimensions, cpu: *const Arm7tdmi, tex_id: GLuint) bool {
-    const scn_scale = config.config().host.win_scale;
-    const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-    zgui.backend.newFrame(@floatFromInt(dim.width), @floatFromInt(dim.height));
-
-    state.title = handleTitle(&bus_ptr.pak.title);
-
-    {
-        _ = zgui.beginMainMenuBar();
-        defer zgui.endMainMenuBar();
-
-        if (zgui.beginMenu("File", true)) {
-            defer zgui.endMenu();
-
-            if (zgui.menuItem("Quit", .{}))
-                state.should_quit = true;
-
-            if (zgui.menuItem("Insert ROM", .{})) blk: {
-                const file_path = tmp: {
-                    const path_opt = nfd.openFileDialog("gba", null) catch |e| {
-                        log.err("file dialog failed to open: {}", .{e});
-                        break :blk;
-                    };
-
-                    break :tmp path_opt orelse {
-                        log.warn("did not receive a file path", .{});
-                        break :blk;
-                    };
-                };
-                defer nfd.freePath(file_path);
-
-                log.info("user chose: \"{s}\"", .{file_path});
-
-                const message = tmp: {
-                    var msg: Synchro.Message = .{ .rom_path = undefined };
-                    @memcpy(msg.rom_path[0..file_path.len], file_path);
-                    break :tmp msg;
-                };
-
-                sync.ch.push(message) catch |e| {
-                    log.err("failed to send file path to emu thread: {}", .{e});
-                    break :blk;
-                };
-
-                state.emulation = .{ .Transition = .Active };
-            }
-
-            if (zgui.menuItem("Load BIOS", .{})) blk: {
-                const file_path = tmp: {
-                    const path_opt = nfd.openFileDialog("bin", null) catch |e| {
-                        log.err("file dialog failed to open: {}", .{e});
-                        break :blk;
-                    };
-
-                    break :tmp path_opt orelse {
-                        log.warn("did not receive a file path", .{});
-                        break :blk;
-                    };
-                };
-                defer nfd.freePath(file_path);
-
-                log.info("user chose: \"{s}\"", .{file_path});
-
-                const message = tmp: {
-                    var msg: Synchro.Message = .{ .bios_path = undefined };
-                    @memcpy(msg.bios_path[0..file_path.len], file_path);
-                    break :tmp msg;
-                };
-
-                sync.ch.push(message) catch |e| {
-                    log.err("failed to send file path to emu thread: {}", .{e});
-                    break :blk;
-                };
-            }
-        }
-
-        if (zgui.beginMenu("Emulation", true)) {
-            defer zgui.endMenu();
-
-            if (zgui.menuItem("Registers", .{ .selected = state.win_stat.show_regs }))
-                state.win_stat.show_regs = true;
-
-            if (zgui.menuItem("Palette", .{ .selected = state.win_stat.show_palette }))
-                state.win_stat.show_palette = true;
-
-            if (zgui.menuItem("Schedule", .{ .selected = state.win_stat.show_schedule }))
-                state.win_stat.show_schedule = true;
-
-            if (zgui.menuItem("Paused", .{ .selected = state.emulation == .Inactive })) {
-                state.emulation = switch (state.emulation) {
-                    .Active => .{ .Transition = .Inactive },
-                    .Inactive => .{ .Transition = .Active },
-                    else => state.emulation,
-                };
-            }
-
-            if (zgui.menuItem("Restart", .{}))
-                sync.ch.push(.restart) catch |e| log.err("failed to send restart req to emu thread: {}", .{e});
-        }
-
-        if (zgui.beginMenu("Stats", true)) {
-            defer zgui.endMenu();
-
-            if (zgui.menuItem("Performance", .{ .selected = state.win_stat.show_perf }))
-                state.win_stat.show_perf = true;
-        }
-
-        if (zgui.beginMenu("Help", true)) {
-            defer zgui.endMenu();
-
-            if (zgui.menuItem("Dependencies", .{ .selected = state.win_stat.show_deps }))
-                state.win_stat.show_deps = true;
-        }
-    }
-
-    {
-        const w: f32 = @floatFromInt(gba_width * scn_scale);
-        const h: f32 = @floatFromInt(gba_height * scn_scale);
-
-        const window_title = std.mem.sliceTo(&state.title, 0);
-        _ = zgui.begin(window_title, .{ .flags = .{ .no_resize = true, .always_auto_resize = true } });
-        defer zgui.end();
-
-        zgui.image(@ptrFromInt(tex_id), .{ .w = w, .h = h });
-    }
-
-    // TODO: Any other steps to respect the copyright of the libraries I use?
-    if (state.win_stat.show_deps) {
-        _ = zgui.begin("Dependencies", .{ .popen = &state.win_stat.show_deps });
-        defer zgui.end();
-
-        zgui.bulletText("known-folders by ziglibs", .{});
-        zgui.bulletText("nfd-zig by Fabio Arnold", .{});
-        {
-            zgui.indent(.{});
-            defer zgui.unindent(.{});
-
-            zgui.bulletText("nativefiledialog by Michael Labbe", .{});
-        }
-
-        zgui.bulletText("SDL.zig by Felix Queißner", .{});
-        {
-            zgui.indent(.{});
-            defer zgui.unindent(.{});
-
-            zgui.bulletText("SDL by Sam Lantinga", .{});
-        }
-
-        zgui.bulletText("tomlz by Matthew Hall", .{});
-        zgui.bulletText("zba-gdbstub by Rekai Musuka", .{});
-        zgui.bulletText("zba-util by Rekai Musuka", .{});
-        zgui.bulletText("zgui by Michal Ziulek", .{});
-        {
-            zgui.indent(.{});
-            defer zgui.unindent(.{});
-
-            zgui.bulletText("DearImGui by Omar Cornut", .{});
-        }
-        zgui.bulletText("zig-clap by Jimmi Holst Christensen", .{});
-        zgui.bulletText("zig-datetime by Jairus Martin", .{});
-
-        zgui.newLine();
-        zgui.bulletText("bitfield.zig by Hannes Bredberg and FlorenceOS contributors", .{});
-        zgui.bulletText("zig-opengl by Felix Queißner", .{});
-        {
-            zgui.indent(.{});
-            defer zgui.unindent(.{});
-
-            zgui.bulletText("OpenGL-Registry by The Khronos Group", .{});
-        }
-    }
-
-    if (state.win_stat.show_regs) {
-        _ = zgui.begin("Guest Registers", .{ .popen = &state.win_stat.show_regs });
-        defer zgui.end();
-
-        for (0..8) |i| {
-            zgui.text("R{}: 0x{X:0>8}", .{ i, cpu.r[i] });
-
-            zgui.sameLine(.{});
-
-            const padding = if (8 + i < 10) " " else "";
-            zgui.text("{s}R{}: 0x{X:0>8}", .{ padding, 8 + i, cpu.r[8 + i] });
-        }
-
-        zgui.separator();
-
-        widgets.psr("CPSR", cpu.cpsr);
-        widgets.psr("SPSR", cpu.spsr);
-
-        zgui.separator();
-
-        widgets.interrupts(" IE", bus_ptr.io.ie);
-        widgets.interrupts("IRQ", bus_ptr.io.irq);
-    }
-
-    if (state.win_stat.show_perf) {
-        _ = zgui.begin("Performance", .{ .popen = &state.win_stat.show_perf });
-        defer zgui.end();
-
-        const tmp = blk: {
-            var buf: [histogram_len]u32 = undefined;
-            const len = state.fps_hist.copy(&buf);
-
-            break :blk .{ buf, len };
-        };
-        const values = tmp[0];
-        const len = tmp[1];
-
-        if (len == values.len) _ = state.fps_hist.pop();
-
-        const sorted = blk: {
-            var buf: @TypeOf(values) = undefined;
-
-            @memcpy(buf[0..len], values[0..len]);
-            std.mem.sort(u32, buf[0..len], {}, std.sort.asc(u32));
-
-            break :blk buf;
-        };
-
-        const y_max: f64 = 2 * if (len != 0) @as(f64, @floatFromInt(sorted[len - 1])) else emu.frame_rate;
-        const x_max: f64 = @floatFromInt(values.len);
-
-        const y_args = .{ .flags = .{ .no_grid_lines = true } };
-        const x_args = .{ .flags = .{ .no_grid_lines = true, .no_tick_labels = true, .no_tick_marks = true } };
-
-        if (zgui.plot.beginPlot("Emulation FPS", .{ .w = 0.0, .flags = .{ .no_title = true, .no_frame = true } })) {
-            defer zgui.plot.endPlot();
-
-            zgui.plot.setupLegend(.{ .north = true, .east = true }, .{});
-            zgui.plot.setupAxis(.x1, x_args);
-            zgui.plot.setupAxis(.y1, y_args);
-            zgui.plot.setupAxisLimits(.y1, .{ .min = 0.0, .max = y_max, .cond = .always });
-            zgui.plot.setupAxisLimits(.x1, .{ .min = 0.0, .max = x_max, .cond = .always });
-            zgui.plot.setupFinish();
-
-            zgui.plot.plotLineValues("FPS", u32, .{ .v = values[0..len] });
-        }
-
-        const stats: struct { u32, u32, u32 } = blk: {
-            if (len == 0) break :blk .{ 0, 0, 0 };
-
-            const average: u32 = average: {
-                var sum: u32 = 0;
-                for (sorted[0..len]) |value| sum += value;
-
-                break :average @intCast(sum / len);
-            };
-            const median = sorted[len / 2];
-            const low = sorted[len / 100]; // 1% Low
-
-            break :blk .{ average, median, low };
-        };
-
-        zgui.text("Average: {:0>3} fps", .{stats[0]});
-        zgui.text(" Median: {:0>3} fps", .{stats[1]});
-        zgui.text(" 1% Low: {:0>3} fps", .{stats[2]});
-    }
-
-    if (state.win_stat.show_schedule) {
-        _ = zgui.begin("Schedule", .{ .popen = &state.win_stat.show_schedule });
-        defer zgui.end();
-
-        const scheduler = cpu.sched;
-
-        zgui.text("tick: {X:0>16}", .{scheduler.now()});
-        zgui.separator();
-
-        const sched_ptr: *Scheduler = @ptrCast(@alignCast(cpu.sched.ptr));
-        const Event = std.meta.Child(@TypeOf(sched_ptr.queue.items));
-
-        var items: [20]Event = undefined;
-        const len = @min(sched_ptr.queue.items.len, items.len);
-
-        @memcpy(items[0..len], sched_ptr.queue.items[0..len]);
-        std.mem.sort(Event, items[0..len], {}, widgets.eventDesc(Event));
-
-        for (items[0..len]) |event| {
-            zgui.text("{X:0>16} | {?}", .{ event.tick, event.kind });
-        }
-    }
-
-    if (state.win_stat.show_palette) {
-        _ = zgui.begin("Palette", .{ .popen = &state.win_stat.show_palette });
-        defer zgui.end();
-
-        widgets.paletteGrid(.Background, cpu);
-
-        zgui.sameLine(.{ .spacing = 20.0 });
-
-        widgets.paletteGrid(.Object, cpu);
-    }
-
-    // {
-    //     zgui.showDemoWindow(null);
-    // }
-
-    return true; // request redraw
-}
-
-const widgets = struct {
-    const PaletteKind = enum { Background, Object };
-
-    fn paletteGrid(comptime kind: PaletteKind, cpu: *const Arm7tdmi) void {
-        _ = zgui.beginGroup();
-        defer zgui.endGroup();
-
-        const address: u32 = switch (kind) {
-            .Background => 0x0500_0000,
-            .Object => 0x0500_0200,
-        };
-
-        for (0..0x100) |i| {
-            const offset: u32 = @truncate(i);
-            const bgr555 = cpu.bus.dbgRead(u16, address + offset * @sizeOf(u16));
-            widgets.colourSquare(bgr555);
-
-            if ((i + 1) % 0x10 != 0) zgui.sameLine(.{});
-        }
-        zgui.text(@tagName(kind), .{});
-    }
-
-    fn colourSquare(bgr555: u16) void {
-        // FIXME: working with the packed struct enum is currently broken :pensive:
-        const ImguiColorEditFlags_NoInputs: u32 = 1 << 5;
-        const ImguiColorEditFlags_NoPicker: u32 = 1 << 2;
-        const flags: zgui.ColorEditFlags = @bitCast(ImguiColorEditFlags_NoInputs | ImguiColorEditFlags_NoPicker);
-
-        const b: f32 = @floatFromInt(bgr555 >> 10 & 0x1f);
-        const g: f32 = @floatFromInt(bgr555 >> 5 & 0x1F);
-        const r: f32 = @floatFromInt(bgr555 & 0x1F);
-
-        var col = [_]f32{ r / 31.0, g / 31.0, b / 31.0 };
-
-        _ = zgui.colorEdit3("", .{ .col = &col, .flags = flags });
-    }
-
-    fn interrupts(comptime label: []const u8, int: anytype) void {
-        const h = 15.0;
-        const w = 9.0 * 2 + 3.5;
-        const ww = 9.0 * 3;
-
-        {
-            zgui.text(label ++ ":", .{});
-
-            zgui.sameLine(.{});
-            _ = zgui.selectable("VBL", .{ .w = w, .h = h, .selected = int.vblank.read() });
-
-            zgui.sameLine(.{});
-            _ = zgui.selectable("HBL", .{ .w = w, .h = h, .selected = int.hblank.read() });
-
-            zgui.sameLine(.{});
-            _ = zgui.selectable("VCT", .{ .w = w, .h = h, .selected = int.coincidence.read() });
-
-            {
-                zgui.sameLine(.{});
-                _ = zgui.selectable("TIM0", .{ .w = ww, .h = h, .selected = int.tim0.read() });
-
-                zgui.sameLine(.{});
-                _ = zgui.selectable("TIM1", .{ .w = ww, .h = h, .selected = int.tim1.read() });
-
-                zgui.sameLine(.{});
-                _ = zgui.selectable("TIM2", .{ .w = ww, .h = h, .selected = int.tim2.read() });
-
-                zgui.sameLine(.{});
-                _ = zgui.selectable("TIM3", .{ .w = ww, .h = h, .selected = int.tim3.read() });
-            }
-
-            zgui.sameLine(.{});
-            _ = zgui.selectable("SRL", .{ .w = w, .h = h, .selected = int.serial.read() });
-
-            {
-                zgui.sameLine(.{});
-                _ = zgui.selectable("DMA0", .{ .w = ww, .h = h, .selected = int.dma0.read() });
-
-                zgui.sameLine(.{});
-                _ = zgui.selectable("DMA1", .{ .w = ww, .h = h, .selected = int.dma1.read() });
-
-                zgui.sameLine(.{});
-                _ = zgui.selectable("DMA2", .{ .w = ww, .h = h, .selected = int.dma2.read() });
-
-                zgui.sameLine(.{});
-                _ = zgui.selectable("DMA3", .{ .w = ww, .h = h, .selected = int.dma3.read() });
-            }
-
-            zgui.sameLine(.{});
-            _ = zgui.selectable("KPD", .{ .w = w, .h = h, .selected = int.keypad.read() });
-
-            zgui.sameLine(.{});
-            _ = zgui.selectable("GPK", .{ .w = w, .h = h, .selected = int.game_pak.read() });
-        }
-    }
-
-    fn psr(comptime label: []const u8, register: anytype) void {
-        const Mode = @import("arm32").arm.Mode;
-
-        const maybe_mode = std.meta.intToEnum(Mode, register.mode.read()) catch null;
-        const mode = if (maybe_mode) |mode| mode.toString() else "???";
-        const w = 9.0;
-        const h = 15.0;
-
-        zgui.text(label ++ ": 0x{X:0>8}", .{register.raw});
-
-        zgui.sameLine(.{});
-        _ = zgui.selectable("N", .{ .w = w, .h = h, .selected = register.n.read() });
-
-        zgui.sameLine(.{});
-        _ = zgui.selectable("Z", .{ .w = w, .h = h, .selected = register.z.read() });
-
-        zgui.sameLine(.{});
-        _ = zgui.selectable("C", .{ .w = w, .h = h, .selected = register.c.read() });
-
-        zgui.sameLine(.{});
-        _ = zgui.selectable("V", .{ .w = w, .h = h, .selected = register.v.read() });
-
-        zgui.sameLine(.{});
-        zgui.text("{s}", .{mode});
-    }
-
-    fn eventDesc(comptime T: type) fn (void, T, T) bool {
-        return struct {
-            fn inner(_: void, left: T, right: T) bool {
-                return left.tick > right.tick;
-            }
-        }.inner;
-    }
-};
-
-fn handleTitle(title_opt: ?*const [12]u8) [12:0]u8 {
-    if (title_opt == null) return "[N/A Title]\x00".*; // No ROM present
-    const title = title_opt.?;
-
-    // ROM Title is an empty string (ImGui hates these)
-    if (title[0] == '\x00') return "[No Title]\x00\x00".*;
-
-    return title.* ++ [_:0]u8{};
-}
--- a/src/main.zig
+++ b/src/main.zig
@@ -1,234 +1,290 @@
 const std = @import("std");
 const builtin = @import("builtin");
-const known_folders = @import("known_folders");
+const SDL = @import("sdl2");
 const clap = @import("clap");
+const known_folders = @import("known_folders");

-const config = @import("config.zig");
-const emu = @import("core/emu.zig");
-
-const Synchro = @import("core/emu.zig").Synchro;
-const Gui = @import("platform.zig").Gui;
-const Bus = @import("core/Bus.zig");
-const Scheduler = @import("core/scheduler.zig").Scheduler;
-const FilePaths = @import("util.zig").FilePaths;
+const emu = @import("emu.zig");
+const Bus = @import("Bus.zig");
+const Apu = @import("apu.zig").Apu;
+const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
+const Scheduler = @import("scheduler.zig").Scheduler;
 const FpsTracker = @import("util.zig").FpsTracker;
-const Allocator = std.mem.Allocator;

-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const IBus = @import("arm32").Bus;
-const IScheduler = @import("arm32").Scheduler;
+const Timer = std.time.Timer;
+const Thread = std.Thread;
+const Atomic = std.atomic.Atomic;
+const File = std.fs.File;

-const log = std.log.scoped(.Cli);
+const window_scale = 4;
+const gba_width = @import("ppu.zig").width;
+const gba_height = @import("ppu.zig").height;
+const framebuf_pitch = @import("ppu.zig").framebuf_pitch;
+const expected_rate = @import("emu.zig").frame_rate;
+
+const sample_rate = @import("apu.zig").host_sample_rate;
+
+pub const enable_logging: bool = true;
+const is_binary: bool = false;
+const log = std.log.scoped(.GUI);
 pub const log_level = if (builtin.mode != .Debug) .info else std.log.default_level;

+const asString = @import("util.zig").asString;
+
 // CLI Arguments + Help Text
 const params = clap.parseParamsComptime(
    \\-h, --help            Display this help and exit.
-    \\-s, --skip            Skip BIOS.
    \\-b, --bios <str>      Optional path to a GBA BIOS ROM.
-    \\ --gdb                Run ZBA from the context of a GDB Server
-    \\<str>                 Path to the GBA GamePak ROM.
+    \\<str>                 Path to the GBA GamePak ROM
    \\
 );

-pub fn main() void {
-    // Main Allocator for ZBA
+pub fn main() anyerror!void {
+    // Allocator for Emulator + CLI
    var gpa = std.heap.GeneralPurposeAllocator(.{}){};
-    defer std.debug.assert(gpa.deinit() == .ok);
+    defer std.debug.assert(!gpa.deinit());
+    const alloc = gpa.allocator();

-    const allocator = gpa.allocator();
+    // Setup CLI using zig-clap
+    var res = try clap.parse(clap.Help, &params, clap.parsers.default, .{});
+    defer res.deinit();

-    // Determine the Data Directory (stores saves)
-    const data_path = blk: {
-        const result = known_folders.getPath(allocator, .data);
-        const option = result catch |e| exitln("interrupted while determining the data folder: {}", .{e});
-        const path = option orelse exitln("no valid data folder found", .{});
-        ensureDataDirsExist(path) catch |e| exitln("failed to create folders under \"{s}\": {}", .{ path, e });
+    const stderr = std.io.getStdErr();
+    defer stderr.close();

-        break :blk path;
-    };
-    defer allocator.free(data_path);
+    // Display Help, if requested
+    // Grab ROM and BIOS paths if provided
+    if (res.args.help) return clap.help(stderr.writer(), clap.Help, &params, .{});
+    const rom_path = try getRomPath(res, stderr);
+    const bios_path: ?[]const u8 = if (res.args.bios) |p| p else null;

-    // Determine the Config Directory
-    const config_path = blk: {
-        const result = known_folders.getPath(allocator, .roaming_configuration);
-        const option = result catch |e| exitln("interreupted while determining the config folder: {}", .{e});
-        const path = option orelse exitln("no valid config folder found", .{});
-        ensureConfigDirExists(path) catch |e| exitln("failed to create required folder \"{s}\": {}", .{ path, e });
+    // Determine Save Directory
+    const save_dir = try getSavePath(alloc);
+    defer if (save_dir) |path| alloc.free(path);
+    log.info("Found save directory: {s}", .{save_dir});

-        break :blk path;
-    };
-    defer allocator.free(config_path);
-
-    // Parse CLI
-
-    const result = clap.parse(clap.Help, &params, clap.parsers.default, .{ .allocator = allocator }) catch |e| exitln("failed to parse cli: {}", .{e});
-    defer result.deinit();
-
-    // TODO: Move config file to XDG Config directory?
-    const cfg_file_path = configFilePath(allocator, config_path) catch |e| exitln("failed to ready config file for access: {}", .{e});
-    defer allocator.free(cfg_file_path);
-
-    config.load(allocator, cfg_file_path) catch |e| exitln("failed to load config file: {}", .{e});
-
-    var paths = handleArguments(allocator, data_path, &result) catch |e| exitln("failed to handle cli arguments: {}", .{e});
-    defer paths.deinit(allocator);
-
-    // if paths.bios is null, then we want to see if it's in the data directory
-    if (paths.bios == null) blk: {
-        const bios_path = std.mem.join(allocator, "/", &.{ data_path, "zba", "gba_bios.bin" }) catch |e| exitln("failed to allocate backup bios dir path: {}", .{e});
-        defer allocator.free(bios_path);
-
-        _ = std.fs.cwd().statFile(bios_path) catch |e| switch (e) {
-            error.FileNotFound => { // ZBA will crash on attempt to read BIOS but that's fine
-                log.err("file located at {s} was not found", .{bios_path});
-                break :blk;
-            },
-            else => exitln("error when checking \"{s}\": {}", .{ bios_path, e }),
-        };
-
-        paths.bios = allocator.dupe(u8, bios_path) catch |e| exitln("failed to duplicate path to bios: {}", .{e});
-    }
-
-    const log_file = switch (config.config().debug.cpu_trace) {
-        true => std.fs.cwd().createFile("zba.log", .{}) catch |e| exitln("failed to create trace log file: {}", .{e}),
-        false => null,
-    };
-    defer if (log_file) |file| file.close();
-
-    // TODO: Take Emulator Init Code out of main.zig
-    var scheduler = Scheduler.init(allocator);
+    // Initialize Scheduler and ARM7TDMI Emulator
+    // Provide GBA Bus (initialized with ARM7TDMI) with a valid ptr to ARM7TDMI
+    var scheduler = Scheduler.init(alloc);
    defer scheduler.deinit();

-    var bus: Bus = undefined;
+    const paths = .{ .bios = bios_path, .rom = rom_path, .save = save_dir };
+    var cpu = try Arm7tdmi.init(alloc, &scheduler, paths);
+    defer cpu.deinit();
+    cpu.bus.attach(&cpu);
+    cpu.fastBoot(); // Uncomment to skip BIOS

-    const ischeduler = IScheduler.init(&scheduler);
-    const ibus = IBus.init(&bus);
+    // Copy ROM title while Emulator still belongs to this thread
+    const title = cpu.bus.pak.title;

-    var cpu = Arm7tdmi.init(ischeduler, ibus);
+    // Initialize SDL2
+    initSdl2();
+    defer SDL.SDL_Quit();

-    bus.init(allocator, &scheduler, &cpu, paths) catch |e| exitln("failed to init zba bus: {}", .{e});
-    defer bus.deinit();
+    const dev = initAudio(&cpu.bus.apu);
+    defer SDL.SDL_CloseAudioDevice(dev);

-    if (config.config().guest.skip_bios or result.args.skip != 0 or paths.bios == null) {
-        @import("core/cpu_util.zig").fastBoot(&cpu);
+    // TODO: Refactor or delete this Logging code
+    // I probably still need logging in some form though (e.g. Golden Sun IIRC)
+    const log_file: ?File = if (enable_logging) blk: {
+        const file = try std.fs.cwd().createFile(if (is_binary) "zba.bin" else "zba.log", .{});
+        cpu.useLogger(&file, is_binary);
+        break :blk file;
+    } else null;
+    defer if (log_file) |file| file.close();
+
+    var quit = Atomic(bool).init(false);
+    var emu_rate = FpsTracker.init();
+
+    // Run Emulator in it's separate thread
+    // From this point on, interacting with Arm7tdmi or Scheduler
+    // be justified, as it will require to be thread-afe
+    const emu_thread = try Thread.spawn(.{}, emu.run, .{ .LimitedFPS, &quit, &emu_rate, &scheduler, &cpu });
+    defer emu_thread.join();
+
+    var title_buf: [0x20]u8 = std.mem.zeroes([0x20]u8);
+    const window_title = try std.fmt.bufPrint(&title_buf, "ZBA | {s}", .{asString(title)});
+
+    const window = createWindow(window_title, gba_width, gba_height);
+    defer SDL.SDL_DestroyWindow(window);
+
+    const renderer = createRenderer(window);
+    defer SDL.SDL_DestroyRenderer(renderer);
+
+    const texture = createTexture(renderer, gba_width, gba_height);
+    defer SDL.SDL_DestroyTexture(texture);
+
+    // Init FPS Timer
+    var dyn_title_buf: [0x100]u8 = [_]u8{0x00} ** 0x100;
+
+    emu_loop: while (true) {
+        var event: SDL.SDL_Event = undefined;
+        while (SDL.SDL_PollEvent(&event) != 0) {
+            switch (event.type) {
+                SDL.SDL_QUIT => break :emu_loop,
+                SDL.SDL_KEYDOWN => {
+                    const io = &cpu.bus.io;
+                    const key_code = event.key.keysym.sym;
+
+                    switch (key_code) {
+                        SDL.SDLK_UP => io.keyinput.up.unset(),
+                        SDL.SDLK_DOWN => io.keyinput.down.unset(),
+                        SDL.SDLK_LEFT => io.keyinput.left.unset(),
+                        SDL.SDLK_RIGHT => io.keyinput.right.unset(),
+                        SDL.SDLK_x => io.keyinput.a.unset(),
+                        SDL.SDLK_z => io.keyinput.b.unset(),
+                        SDL.SDLK_a => io.keyinput.shoulder_l.unset(),
+                        SDL.SDLK_s => io.keyinput.shoulder_r.unset(),
+                        SDL.SDLK_RETURN => io.keyinput.start.unset(),
+                        SDL.SDLK_RSHIFT => io.keyinput.select.unset(),
+                        else => {},
                    }
+                },
+                SDL.SDL_KEYUP => {
+                    const io = &cpu.bus.io;
+                    const key_code = event.key.keysym.sym;

-    const title_ptr = if (paths.rom != null) &bus.pak.title else null;
+                    switch (key_code) {
+                        SDL.SDLK_UP => io.keyinput.up.set(),
+                        SDL.SDLK_DOWN => io.keyinput.down.set(),
+                        SDL.SDLK_LEFT => io.keyinput.left.set(),
+                        SDL.SDLK_RIGHT => io.keyinput.right.set(),
+                        SDL.SDLK_x => io.keyinput.a.set(),
+                        SDL.SDLK_z => io.keyinput.b.set(),
+                        SDL.SDLK_a => io.keyinput.shoulder_l.set(),
+                        SDL.SDLK_s => io.keyinput.shoulder_r.set(),
+                        SDL.SDLK_RETURN => io.keyinput.start.set(),
+                        SDL.SDLK_RSHIFT => io.keyinput.select.set(),
+                        SDL.SDLK_i => log.err("Sample Count: {}", .{@intCast(u32, SDL.SDL_AudioStreamAvailable(cpu.bus.apu.stream)) / (2 * @sizeOf(u16))}),
+                        SDL.SDLK_j => log.err("Scheduler Capacity: {} | Scheduler Event Count: {}", .{ scheduler.queue.capacity(), scheduler.queue.count() }),
+                        SDL.SDLK_k => {
+                            // Dump IWRAM to file
+                            log.info("PC: 0x{X:0>8}", .{cpu.r[15]});
+                            log.info("LR: 0x{X:0>8}", .{cpu.r[14]});
+                            // const iwram_file = try std.fs.cwd().createFile("iwram.bin", .{});
+                            // defer iwram_file.close();

-    // TODO: Just copy the title instead of grabbing a pointer to it
-    var gui = Gui.init(allocator, &bus.apu, title_ptr) catch |e| exitln("failed to init gui: {}", .{e});
-    defer gui.deinit();
-
-    var sync = Synchro.init(allocator) catch |e| exitln("failed to allocate sync types: {}", .{e});
-    defer sync.deinit(allocator);
-
-    if (result.args.gdb != 0) {
-        const Server = @import("gdbstub").Server;
-        const EmuThing = @import("core/emu.zig").EmuThing;
-
-        var wrapper = EmuThing.init(&cpu, &scheduler);
-        var emulator = wrapper.interface(allocator);
-        defer emulator.deinit();
-
-        log.info("Ready to connect", .{});
-
-        var server = Server.init(
-            emulator,
-            .{ .memory_map = EmuThing.map, .target = EmuThing.target },
-        ) catch |e| exitln("failed to init gdb server: {}", .{e});
-        defer server.deinit(allocator);
-
-        log.info("Starting GDB Server Thread", .{});
-
-        const thread = std.Thread.spawn(.{}, Server.run, .{ &server, allocator, &sync.should_quit }) catch |e| exitln("gdb server thread crashed: {}", .{e});
-        defer thread.join();
-
-        gui.run(.{
-            .cpu = &cpu,
-            .scheduler = &scheduler,
-            .sync = &sync,
-        }) catch |e| exitln("main thread panicked: {}", .{e});
-    } else {
-        var tracker = FpsTracker.init();
-
-        const thread = std.Thread.spawn(.{}, emu.run, .{ &cpu, &scheduler, &tracker, &sync }) catch |e| exitln("emu thread panicked: {}", .{e});
-        defer thread.join();
-
-        gui.run(.{
-            .cpu = &cpu,
-            .scheduler = &scheduler,
-            .tracker = &tracker,
-            .sync = &sync,
-        }) catch |e| exitln("main thread panicked: {}", .{e});
+                            // try iwram_file.writeAll(cpu.bus.iwram.buf);
+                        },
+                        else => {},
+                    }
+                },
+                else => {},
            }
        }

-fn handleArguments(allocator: Allocator, data_path: []const u8, result: *const clap.Result(clap.Help, &params, clap.parsers.default)) !FilePaths {
-    const rom_path = try romPath(allocator, result);
-    errdefer if (rom_path) |path| allocator.free(path);
+        // Emulator has an internal Double Buffer
+        const buf_ptr = cpu.bus.ppu.framebuf.get(.Renderer).ptr;
+        _ = SDL.SDL_UpdateTexture(texture, null, buf_ptr, framebuf_pitch);
+        _ = SDL.SDL_RenderCopy(renderer, texture, null, null);
+        SDL.SDL_RenderPresent(renderer);

-    const bios_path: ?[]const u8 = if (result.args.bios) |path| try allocator.dupe(u8, path) else null;
-    errdefer if (bios_path) |path| allocator.free(path);
-
-    const save_path = try std.fs.path.join(allocator, &[_][]const u8{ data_path, "zba", "save" });
-
-    log.info("ROM path: {?s}", .{rom_path});
-    log.info("BIOS path: {?s}", .{bios_path});
-    log.info("Save path: {s}", .{save_path});
-
-    return .{
-        .rom = rom_path,
-        .bios = bios_path,
-        .save = save_path,
-    };
+        const dyn_title = std.fmt.bufPrint(&dyn_title_buf, "{s} [Emu: {}fps] ", .{ window_title, emu_rate.value() }) catch unreachable;
+        SDL.SDL_SetWindowTitle(window, dyn_title.ptr);
    }

-fn configFilePath(allocator: Allocator, config_path: []const u8) ![]const u8 {
-    const path = try std.fs.path.join(allocator, &[_][]const u8{ config_path, "zba", "config.toml" });
-    errdefer allocator.free(path);
+    quit.store(true, .SeqCst); // Terminate Emulator Thread
+}

-    // We try to create the file exclusively, meaning that we err out if the file already exists.
-    // All we care about is a file being there so we can just ignore that error in particular and
-    // continue down the happy pathj
-    std.fs.accessAbsolute(path, .{}) catch |e| {
-        if (e != error.FileNotFound) return e;
-
-        const config_file = std.fs.createFileAbsolute(path, .{}) catch |err| exitln("failed to create \"{s}\": {}", .{ path, err });
-        defer config_file.close();
-
-        try config_file.writeAll(@embedFile("example.toml"));
+const CliError = error{
+    InsufficientOptions,
+    UnneededOptions,
 };

-    return path;
+fn sdlPanic() noreturn {
+    const str = @as(?[*:0]const u8, SDL.SDL_GetError()) orelse "unknown error";
+    @panic(std.mem.sliceTo(str, 0));
 }

-fn ensureDataDirsExist(data_path: []const u8) !void {
-    var dir = try std.fs.openDirAbsolute(data_path, .{});
-    defer dir.close();
-
-    // Will recursively create directories
-    try dir.makePath("zba" ++ std.fs.path.sep_str ++ "save");
+fn initSdl2() void {
+    const status = SDL.SDL_Init(SDL.SDL_INIT_VIDEO | SDL.SDL_INIT_EVENTS | SDL.SDL_INIT_AUDIO | SDL.SDL_INIT_GAMECONTROLLER);
+    if (status < 0) sdlPanic();
 }

-fn ensureConfigDirExists(config_path: []const u8) !void {
-    var dir = try std.fs.openDirAbsolute(config_path, .{});
-    defer dir.close();
-
-    try dir.makePath("zba");
+fn createWindow(title: []u8, width: c_int, height: c_int) *SDL.SDL_Window {
+    return SDL.SDL_CreateWindow(
+        title.ptr,
+        SDL.SDL_WINDOWPOS_CENTERED,
+        SDL.SDL_WINDOWPOS_CENTERED,
+        width * window_scale,
+        height * window_scale,
+        SDL.SDL_WINDOW_SHOWN,
+    ) orelse sdlPanic();
 }

-fn romPath(allocator: Allocator, result: *const clap.Result(clap.Help, &params, clap.parsers.default)) !?[]const u8 {
-    return switch (result.positionals.len) {
-        0 => null,
-        1 => try allocator.dupe(u8, result.positionals[0]),
-        else => exitln("ZBA received too many positional arguments.", .{}),
+fn createRenderer(window: *SDL.SDL_Window) *SDL.SDL_Renderer {
+    return SDL.SDL_CreateRenderer(window, -1, SDL.SDL_RENDERER_ACCELERATED | SDL.SDL_RENDERER_PRESENTVSYNC) orelse sdlPanic();
+}
+
+fn createTexture(renderer: *SDL.SDL_Renderer, width: c_int, height: c_int) *SDL.SDL_Texture {
+    return SDL.SDL_CreateTexture(
+        renderer,
+        SDL.SDL_PIXELFORMAT_RGBA8888,
+        SDL.SDL_TEXTUREACCESS_STREAMING,
+        width,
+        height,
+    ) orelse sdlPanic();
+}
+
+fn initAudio(apu: *Apu) SDL.SDL_AudioDeviceID {
+    var have: SDL.SDL_AudioSpec = undefined;
+    var want: SDL.SDL_AudioSpec = .{
+        .freq = sample_rate,
+        .format = SDL.AUDIO_U16,
+        .channels = 2,
+        .samples = 0x100,
+        .callback = audioCallback,
+        .userdata = apu,
+        .silence = undefined,
+        .size = undefined,
+        .padding = undefined,
+    };
+
+    const dev = SDL.SDL_OpenAudioDevice(null, 0, &want, &have, 0);
+    if (dev == 0) sdlPanic();
+
+    // Start Playback on the Audio device
+    SDL.SDL_PauseAudioDevice(dev, 0);
+    return dev;
+}
+
+export fn audioCallback(userdata: ?*anyopaque, stream: [*c]u8, len: c_int) void {
+    const apu = @ptrCast(*Apu, @alignCast(8, userdata));
+    const written = SDL.SDL_AudioStreamGet(apu.stream, stream, len);
+
+    // If we don't write anything, play silence otherwise garbage will be played
+    // FIXME: I don't think this hack to remove DC Offset is acceptable :thinking:
+    if (written == 0) std.mem.set(u8, stream[0..@intCast(usize, len)], 0x40);
+}
+
+fn getSavePath(alloc: std.mem.Allocator) !?[]const u8 {
+    const save_subpath = "zba" ++ [_]u8{std.fs.path.sep} ++ "save";
+
+    const maybe_data_path = try known_folders.getPath(alloc, .data);
+    defer if (maybe_data_path) |path| alloc.free(path);
+
+    const save_path = if (maybe_data_path) |base| try std.fs.path.join(alloc, &[_][]const u8{ base, "zba", "save" }) else null;
+
+    if (save_path) |_| {
+        // If we've determined what our save path should be, ensure the prereq directories
+        // are present so that we can successfully write to the path when necessary
+        const maybe_data_dir = try known_folders.open(alloc, .data, .{});
+        if (maybe_data_dir) |data_dir| try data_dir.makePath(save_subpath);
+    }
+
+    return save_path;
+}
+
+fn getRomPath(res: clap.Result(clap.Help, &params, clap.parsers.default), stderr: std.fs.File) ![]const u8 {
+    return switch (res.positionals.len) {
+        1 => res.positionals[0],
+        0 => {
+            try stderr.writeAll("ZBA requires a positional path to a GamePak ROM.\n");
+            return CliError.InsufficientOptions;
+        },
+        else => {
+            try stderr.writeAll("ZBA received too many arguments.\n");
+            return CliError.UnneededOptions;
+        },
    };
 }
-
-fn exitln(comptime format: []const u8, args: anytype) noreturn {
-    const stderr = std.io.getStdErr().writer();
-    stderr.print(format, args) catch {}; // Just exit already...
-    stderr.writeByte('\n') catch {};
-    std.process.exit(1);
-}
--- a/src/platform.zig
+++ b/src/platform.zig
@@ -1,416 +0,0 @@
-const std = @import("std");
-const SDL = @import("sdl2");
-const gl = @import("gl");
-const zgui = @import("zgui");
-
-const emu = @import("core/emu.zig");
-const config = @import("config.zig");
-const imgui = @import("imgui.zig");
-
-const Apu = @import("core/apu.zig").Apu;
-const Arm7tdmi = @import("arm32").Arm7tdmi;
-const Bus = @import("core/Bus.zig");
-const Scheduler = @import("core/scheduler.zig").Scheduler;
-const FpsTracker = @import("util.zig").FpsTracker;
-const Synchro = @import("core/emu.zig").Synchro;
-const KeyInput = @import("core/bus/io.zig").KeyInput;
-
-const gba_width = @import("core/ppu.zig").width;
-const gba_height = @import("core/ppu.zig").height;
-
-const GLuint = gl.GLuint;
-const GLsizei = gl.GLsizei;
-const SDL_GLContext = *anyopaque;
-const Allocator = std.mem.Allocator;
-
-pub const Dimensions = struct { width: u32, height: u32 };
-const default_dim: Dimensions = .{ .width = 1280, .height = 720 };
-
-pub const sample_rate = 1 << 15;
-pub const sample_format = SDL.AUDIO_U16;
-
-const window_title = "ZBA";
-
-pub const Gui = struct {
-    const Self = @This();
-    const log = std.log.scoped(.Gui);
-
-    window: *SDL.SDL_Window,
-    ctx: SDL_GLContext,
-    audio: Audio,
-
-    state: imgui.State,
-    allocator: Allocator,
-
-    pub fn init(allocator: Allocator, apu: *Apu, title_opt: ?*const [12]u8) !Self {
-        if (SDL.SDL_Init(SDL.SDL_INIT_VIDEO | SDL.SDL_INIT_EVENTS | SDL.SDL_INIT_AUDIO) < 0) panic();
-        if (SDL.SDL_GL_SetAttribute(SDL.SDL_GL_CONTEXT_PROFILE_MASK, SDL.SDL_GL_CONTEXT_PROFILE_CORE) < 0) panic();
-        if (SDL.SDL_GL_SetAttribute(SDL.SDL_GL_CONTEXT_MAJOR_VERSION, 3) < 0) panic();
-        if (SDL.SDL_GL_SetAttribute(SDL.SDL_GL_CONTEXT_MAJOR_VERSION, 3) < 0) panic();
-
-        const window = SDL.SDL_CreateWindow(
-            window_title,
-            SDL.SDL_WINDOWPOS_CENTERED,
-            SDL.SDL_WINDOWPOS_CENTERED,
-            default_dim.width,
-            default_dim.height,
-            SDL.SDL_WINDOW_OPENGL | SDL.SDL_WINDOW_SHOWN | SDL.SDL_WINDOW_RESIZABLE,
-        ) orelse panic();
-
-        const ctx = SDL.SDL_GL_CreateContext(window) orelse panic();
-        if (SDL.SDL_GL_MakeCurrent(window, ctx) < 0) panic();
-
-        gl.load(ctx, Self.glGetProcAddress) catch {};
-        if (SDL.SDL_GL_SetSwapInterval(@intFromBool(config.config().host.vsync)) < 0) panic();
-
-        zgui.init(allocator);
-        zgui.plot.init();
-        zgui.backend.init(window, ctx, "#version 330 core");
-
-        // zgui.io.setIniFilename(null);
-
-        return Self{
-            .window = window,
-            .ctx = ctx,
-            .audio = Audio.init(apu),
-
-            .allocator = allocator,
-            .state = try imgui.State.init(allocator, title_opt),
-        };
-    }
-
-    pub fn deinit(self: *Self) void {
-        self.audio.deinit();
-        self.state.deinit(self.allocator);
-
-        zgui.backend.deinit();
-        zgui.plot.deinit();
-        zgui.deinit();
-
-        SDL.SDL_GL_DeleteContext(self.ctx);
-        SDL.SDL_DestroyWindow(self.window);
-        SDL.SDL_Quit();
-
-        self.* = undefined;
-    }
-
-    const RunOptions = struct {
-        sync: *Synchro,
-        tracker: ?*FpsTracker = null,
-        cpu: *Arm7tdmi,
-        scheduler: *Scheduler,
-    };
-
-    pub fn run(self: *Self, opt: RunOptions) !void {
-        const cpu = opt.cpu;
-        const tracker = opt.tracker;
-        const sync = opt.sync;
-
-        const bus_ptr: *Bus = @ptrCast(@alignCast(cpu.bus.ptr));
-
-        const vao_id = opengl_impl.vao();
-        defer gl.deleteVertexArrays(1, &[_]GLuint{vao_id});
-
-        const emu_tex = opengl_impl.screenTex(bus_ptr.ppu.framebuf.get(.Renderer));
-        const out_tex = opengl_impl.outTex();
-        defer gl.deleteTextures(2, &[_]GLuint{ emu_tex, out_tex });
-
-        const fbo_id = try opengl_impl.frameBuffer(out_tex);
-        defer gl.deleteFramebuffers(1, &fbo_id);
-
-        const prog_id = try opengl_impl.program(); // Dynamic Shaders?
-        defer gl.deleteProgram(prog_id);
-
-        var win_dim: Dimensions = default_dim;
-
-        emu_loop: while (true) {
-            // Outside of `SDL.SDL_QUIT` below, the DearImgui UI might signal that the program
-            // should exit, in which case we should also handle this
-            if (self.state.should_quit or sync.should_quit.load(.monotonic)) break :emu_loop;
-
-            var event: SDL.SDL_Event = undefined;
-            while (SDL.SDL_PollEvent(&event) != 0) {
-                _ = zgui.backend.processEvent(&event);
-
-                switch (event.type) {
-                    SDL.SDL_QUIT => break :emu_loop,
-                    SDL.SDL_KEYDOWN => {
-                        // TODO: Make use of compare_and_xor?
-                        const key_code = event.key.keysym.sym;
-                        var keyinput: KeyInput = .{ .raw = 0x0000 };
-
-                        switch (key_code) {
-                            SDL.SDLK_UP => keyinput.up.set(),
-                            SDL.SDLK_DOWN => keyinput.down.set(),
-                            SDL.SDLK_LEFT => keyinput.left.set(),
-                            SDL.SDLK_RIGHT => keyinput.right.set(),
-                            SDL.SDLK_x => keyinput.a.set(),
-                            SDL.SDLK_z => keyinput.b.set(),
-                            SDL.SDLK_a => keyinput.shoulder_l.set(),
-                            SDL.SDLK_s => keyinput.shoulder_r.set(),
-                            SDL.SDLK_RETURN => keyinput.start.set(),
-                            SDL.SDLK_RSHIFT => keyinput.select.set(),
-                            else => {},
-                        }
-
-                        bus_ptr.io.keyinput.fetchAnd(~keyinput.raw, .monotonic);
-                    },
-                    SDL.SDL_KEYUP => {
-                        // TODO: Make use of compare_and_xor?
-                        const key_code = event.key.keysym.sym;
-                        var keyinput: KeyInput = .{ .raw = 0x0000 };
-
-                        switch (key_code) {
-                            SDL.SDLK_UP => keyinput.up.set(),
-                            SDL.SDLK_DOWN => keyinput.down.set(),
-                            SDL.SDLK_LEFT => keyinput.left.set(),
-                            SDL.SDLK_RIGHT => keyinput.right.set(),
-                            SDL.SDLK_x => keyinput.a.set(),
-                            SDL.SDLK_z => keyinput.b.set(),
-                            SDL.SDLK_a => keyinput.shoulder_l.set(),
-                            SDL.SDLK_s => keyinput.shoulder_r.set(),
-                            SDL.SDLK_RETURN => keyinput.start.set(),
-                            SDL.SDLK_RSHIFT => keyinput.select.set(),
-                            else => {},
-                        }
-
-                        bus_ptr.io.keyinput.fetchOr(keyinput.raw, .monotonic);
-                    },
-                    SDL.SDL_WINDOWEVENT => {
-                        if (event.window.event == SDL.SDL_WINDOWEVENT_RESIZED) {
-                            log.debug("window resized to: {}x{}", .{ event.window.data1, event.window.data2 });
-
-                            win_dim.width = @intCast(event.window.data1);
-                            win_dim.height = @intCast(event.window.data2);
-                        }
-                    },
-                    else => {},
-                }
-            }
-
-            var zgui_redraw: bool = false;
-
-            switch (self.state.emulation) {
-                .Transition => |inner| switch (inner) {
-                    .Active => {
-                        sync.paused.store(false, .monotonic);
-                        if (!config.config().host.mute) SDL.SDL_PauseAudioDevice(self.audio.device, 0);
-
-                        self.state.emulation = .Active;
-                    },
-                    .Inactive => {
-                        // Assert that double pausing is impossible
-                        SDL.SDL_PauseAudioDevice(self.audio.device, 1);
-                        sync.paused.store(true, .monotonic);
-
-                        self.state.emulation = .Inactive;
-                    },
-                },
-                .Active => {
-                    // Add FPS count to the histogram
-                    if (tracker) |t| self.state.fps_hist.push(t.value()) catch {};
-
-                    // Draw GBA Screen to Texture
-                    {
-                        gl.bindFramebuffer(gl.FRAMEBUFFER, fbo_id);
-                        defer gl.bindFramebuffer(gl.FRAMEBUFFER, 0);
-
-                        gl.viewport(0, 0, gba_width, gba_height);
-                        opengl_impl.drawScreen(emu_tex, prog_id, vao_id, bus_ptr.ppu.framebuf.get(.Renderer));
-                    }
-
-                    // FIXME: We only really care about locking the audio device (and therefore writing silence)
-                    // since if nfd-zig is used the emu may be paused for way too long. Perhaps we should try and limit
-                    // spurious calls to SDL_LockAudioDevice?
-                    SDL.SDL_LockAudioDevice(self.audio.device);
-                    defer SDL.SDL_UnlockAudioDevice(self.audio.device);
-
-                    zgui_redraw = imgui.draw(&self.state, sync, win_dim, cpu, out_tex);
-                },
-                .Inactive => zgui_redraw = imgui.draw(&self.state, sync, win_dim, cpu, out_tex),
-            }
-
-            if (zgui_redraw) {
-                // Background Colour
-                const size = zgui.io.getDisplaySize();
-                gl.viewport(0, 0, @intFromFloat(size[0]), @intFromFloat(size[1]));
-                gl.clearColor(0, 0, 0, 1.0);
-                gl.clear(gl.COLOR_BUFFER_BIT);
-
-                zgui.backend.draw();
-            }
-
-            SDL.SDL_GL_SwapWindow(self.window);
-        }
-
-        sync.should_quit.store(true, .monotonic);
-    }
-
-    fn glGetProcAddress(ctx: SDL.SDL_GLContext, proc: [:0]const u8) ?*anyopaque {
-        _ = ctx;
-        return SDL.SDL_GL_GetProcAddress(proc.ptr);
-    }
-};
-
-const Audio = struct {
-    const Self = @This();
-    const log = std.log.scoped(.PlatformAudio);
-
-    device: SDL.SDL_AudioDeviceID,
-
-    fn init(apu: *Apu) Self {
-        var have: SDL.SDL_AudioSpec = undefined;
-        var want: SDL.SDL_AudioSpec = std.mem.zeroes(SDL.SDL_AudioSpec);
-        want.freq = sample_rate;
-        want.format = sample_format;
-        want.channels = 2;
-        want.samples = 0x100;
-        want.callback = Self.callback;
-        want.userdata = apu;
-
-        std.debug.assert(sample_format == SDL.AUDIO_U16);
-        log.info("Host Sample Rate: {}Hz, Host Format: SDL.AUDIO_U16", .{sample_rate});
-
-        const device = SDL.SDL_OpenAudioDevice(null, 0, &want, &have, 0);
-        if (device == 0) panic();
-
-        return .{ .device = device };
-    }
-
-    fn deinit(self: *Self) void {
-        SDL.SDL_CloseAudioDevice(self.device);
-        self.* = undefined;
-    }
-
-    export fn callback(userdata: ?*anyopaque, stream: [*c]u8, len: c_int) void {
-        const apu: *Apu = @ptrCast(@alignCast(userdata));
-
-        _ = SDL.SDL_AudioStreamGet(apu.stream, stream, len);
-    }
-};
-
-fn panic() noreturn {
-    const str = @as(?[*:0]const u8, SDL.SDL_GetError()) orelse "unknown error";
-    @panic(std.mem.sliceTo(str, 0));
-}
-
-const opengl_impl = struct {
-    fn drawScreen(tex_id: GLuint, prog_id: GLuint, vao_id: GLuint, buf: []const u8) void {
-        gl.bindTexture(gl.TEXTURE_2D, tex_id);
-        defer gl.bindTexture(gl.TEXTURE_2D, 0);
-
-        gl.texSubImage2D(gl.TEXTURE_2D, 0, 0, 0, gba_width, gba_height, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, buf.ptr);
-
-        // Bind VAO
-        gl.bindVertexArray(vao_id);
-        defer gl.bindVertexArray(0);
-
-        // Use compiled frag + vertex shader
-        gl.useProgram(prog_id);
-        defer gl.useProgram(0);
-
-        gl.drawArrays(gl.TRIANGLE_STRIP, 0, 3);
-    }
-
-    fn program() !GLuint {
-        const vert_shader = @embedFile("shader/pixelbuf.vert");
-        const frag_shader = @embedFile("shader/pixelbuf.frag");
-
-        const vs = gl.createShader(gl.VERTEX_SHADER);
-        defer gl.deleteShader(vs);
-
-        gl.shaderSource(vs, 1, &[_][*c]const u8{vert_shader}, 0);
-        gl.compileShader(vs);
-
-        if (!shader.didCompile(vs)) return error.VertexCompileError;
-
-        const fs = gl.createShader(gl.FRAGMENT_SHADER);
-        defer gl.deleteShader(fs);
-
-        gl.shaderSource(fs, 1, &[_][*c]const u8{frag_shader}, 0);
-        gl.compileShader(fs);
-
-        if (!shader.didCompile(fs)) return error.FragmentCompileError;
-
-        const prog = gl.createProgram();
-        gl.attachShader(prog, vs);
-        gl.attachShader(prog, fs);
-        gl.linkProgram(prog);
-
-        return prog;
-    }
-
-    fn vao() GLuint {
-        var vao_id: GLuint = undefined;
-        gl.genVertexArrays(1, &vao_id);
-
-        return vao_id;
-    }
-
-    fn screenTex(buf: []const u8) GLuint {
-        var tex_id: GLuint = undefined;
-        gl.genTextures(1, &tex_id);
-
-        gl.bindTexture(gl.TEXTURE_2D, tex_id);
-        defer gl.bindTexture(gl.TEXTURE_2D, 0);
-
-        gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MIN_FILTER, gl.NEAREST);
-        gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MAG_FILTER, gl.NEAREST);
-
-        gl.texImage2D(gl.TEXTURE_2D, 0, gl.RGBA, gba_width, gba_height, 0, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, buf.ptr);
-
-        return tex_id;
-    }
-
-    fn outTex() GLuint {
-        var tex_id: GLuint = undefined;
-        gl.genTextures(1, &tex_id);
-
-        gl.bindTexture(gl.TEXTURE_2D, tex_id);
-        defer gl.bindTexture(gl.TEXTURE_2D, 0);
-
-        gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MIN_FILTER, gl.NEAREST);
-        gl.texParameteri(gl.TEXTURE_2D, gl.TEXTURE_MAG_FILTER, gl.NEAREST);
-
-        gl.texImage2D(gl.TEXTURE_2D, 0, gl.RGBA, gba_width, gba_height, 0, gl.RGBA, gl.UNSIGNED_INT_8_8_8_8, null);
-
-        return tex_id;
-    }
-
-    fn frameBuffer(tex_id: GLuint) !GLuint {
-        var fbo_id: GLuint = undefined;
-        gl.genFramebuffers(1, &fbo_id);
-
-        gl.bindFramebuffer(gl.FRAMEBUFFER, fbo_id);
-        defer gl.bindFramebuffer(gl.FRAMEBUFFER, 0);
-
-        gl.framebufferTexture(gl.FRAMEBUFFER, gl.COLOR_ATTACHMENT0, tex_id, 0);
-        gl.drawBuffers(1, &@as(GLuint, gl.COLOR_ATTACHMENT0));
-
-        if (gl.checkFramebufferStatus(gl.FRAMEBUFFER) != gl.FRAMEBUFFER_COMPLETE)
-            return error.FrameBufferObejctInitFailed;
-
-        return fbo_id;
-    }
-
-    const shader = struct {
-        const log = std.log.scoped(.shader);
-
-        fn didCompile(id: gl.GLuint) bool {
-            var success: gl.GLint = undefined;
-            gl.getShaderiv(id, gl.COMPILE_STATUS, &success);
-
-            if (success == 0) err(id);
-
-            return success == 1;
-        }
-
-        fn err(id: gl.GLuint) void {
-            const buf_len = 512;
-            var error_msg: [buf_len]u8 = undefined;
-
-            gl.getShaderInfoLog(id, buf_len, 0, &error_msg);
-            log.err("{s}", .{std.mem.sliceTo(&error_msg, 0)});
-        }
-    };
-};
--- a/src/ppu.zig
+++ b/src/ppu.zig
--- a/src/scheduler.zig
+++ b/src/scheduler.zig
@@ -0,0 +1,120 @@
+const std = @import("std");
+
+const Bus = @import("Bus.zig");
+const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
+
+const Order = std.math.Order;
+const PriorityQueue = std.PriorityQueue;
+const Allocator = std.mem.Allocator;
+const log = std.log.scoped(.Scheduler);
+
+pub const Scheduler = struct {
+    const Self = @This();
+
+    tick: u64,
+    queue: PriorityQueue(Event, void, lessThan),
+
+    pub fn init(alloc: Allocator) Self {
+        var sched = Self{ .tick = 0, .queue = PriorityQueue(Event, void, lessThan).init(alloc, {}) };
+        sched.queue.add(.{ .kind = .HeatDeath, .tick = std.math.maxInt(u64) }) catch unreachable;
+
+        return sched;
+    }
+
+    pub fn deinit(self: Self) void {
+        self.queue.deinit();
+    }
+
+    pub inline fn now(self: *const Self) u64 {
+        return self.tick;
+    }
+
+    pub fn handleEvent(self: *Self, cpu: *Arm7tdmi) void {
+        if (self.queue.removeOrNull()) |event| {
+            const late = self.tick - event.tick;
+
+            switch (event.kind) {
+                .HeatDeath => {
+                    log.err("u64 overflow. This *actually* should never happen.", .{});
+                    unreachable;
+                },
+                .Draw => {
+                    // The end of a VDraw
+                    cpu.bus.ppu.drawScanline();
+                    cpu.bus.ppu.handleHDrawEnd(cpu, late);
+                },
+                .TimerOverflow => |id| {
+                    switch (id) {
+                        0 => cpu.bus.tim[0].handleOverflow(cpu, late),
+                        1 => cpu.bus.tim[1].handleOverflow(cpu, late),
+                        2 => cpu.bus.tim[2].handleOverflow(cpu, late),
+                        3 => cpu.bus.tim[3].handleOverflow(cpu, late),
+                    }
+                },
+                .ApuChannel => |id| {
+                    switch (id) {
+                        0 => cpu.bus.apu.ch1.channelTimerOverflow(late),
+                        1 => cpu.bus.apu.ch2.channelTimerOverflow(late),
+                        2 => cpu.bus.apu.ch3.channelTimerOverflow(late),
+                        3 => cpu.bus.apu.ch4.channelTimerOverflow(late),
+                    }
+                },
+                .FrameSequencer => cpu.bus.apu.tickFrameSequencer(late),
+                .SampleAudio => cpu.bus.apu.sampleAudio(late),
+                .HBlank => cpu.bus.ppu.handleHBlankEnd(cpu, late), // The end of a HBlank
+                .VBlank => cpu.bus.ppu.handleHDrawEnd(cpu, late), // The end of a VBlank
+            }
+        }
+    }
+
+    /// Removes the **first** scheduled event of type `needle`
+    pub fn removeScheduledEvent(self: *Self, needle: EventKind) void {
+        var it = self.queue.iterator();
+
+        var i: usize = 0;
+        while (it.next()) |event| : (i += 1) {
+            if (std.meta.eql(event.kind, needle)) {
+
+                // This invalidates the iterator
+                _ = self.queue.removeIndex(i);
+
+                // Since removing something from the PQ invalidates the iterator,
+                // this implementation can safely only remove the first instance of
+                // a Scheduled Event. Exit Early
+                break;
+            }
+        }
+    }
+
+    pub fn push(self: *Self, kind: EventKind, end: u64) void {
+        self.queue.add(.{ .kind = kind, .tick = self.now() + end }) catch unreachable;
+    }
+
+    pub inline fn nextTimestamp(self: *const Self) u64 {
+        @setRuntimeSafety(false);
+
+        // Typically you'd use PriorityQueue.peek here, but there's always at least a HeatDeath
+        // event in the PQ so we can just do this instead. Should be faster in ReleaseSafe
+        return self.queue.items[0].tick;
+    }
+};
+
+pub const Event = struct {
+    kind: EventKind,
+    tick: u64,
+};
+
+fn lessThan(_: void, a: Event, b: Event) Order {
+    return std.math.order(a.tick, b.tick);
+}
+
+pub const EventKind = union(enum) {
+    HeatDeath,
+    HBlank,
+    VBlank,
+    Draw,
+    TimerOverflow: u2,
+    SampleAudio,
+    FrameSequencer,
+    ApuChannel: u2,
+};
--- a/src/shader/pixelbuf.frag
+++ b/src/shader/pixelbuf.frag
@@ -1,24 +0,0 @@
-#version 330 core
-out vec4 frag_color;
-
-in vec2 uv;
-
-uniform sampler2D screen;
-
-void main() {
-	// https://near.sh/video/color-emulation
-	// Thanks to Talarubi + Near for the Colour Correction
-	// Thanks to fleur + mattrb for the Shader Impl
-
-	vec4 color = texture(screen, uv);
-	color.rgb = pow(color.rgb, vec3(4.0)); // LCD Gamma
-  
-	frag_color = vec4(
-		pow(vec3(
-		  	  0 * color.b +  50 * color.g + 255 * color.r,
-	     	 30 * color.b + 230 * color.g +  10 * color.r,
-			220 * color.b +  10 * color.g +  50 * color.r
-		) / 255, vec3(1.0 / 2.2)), // Out Gamma
-	1.0); 
-}
-
--- a/src/shader/pixelbuf.vert
+++ b/src/shader/pixelbuf.vert
@@ -1,10 +0,0 @@
-#version 330 core
-out vec2 uv;
-
-const vec2 pos[3] = vec2[3](vec2(-1.0f, -1.0f), vec2(-1.0f, 3.0f), vec2(3.0f, -1.0f));
-const vec2 uvs[3] = vec2[3](vec2( 0.0f,  0.0f), vec2( 0.0f, 2.0f), vec2(2.0f,  0.0f));
-
-void main() {
-	uv = uvs[gl_VertexID];
-	gl_Position = vec4(pos[gl_VertexID], 0.0, 1.0);
-}
--- a/src/util.zig
+++ b/src/util.zig
@@ -1,34 +1,50 @@
 const std = @import("std");
 const builtin = @import("builtin");
-const config = @import("config.zig");
-
 const Log2Int = std.math.Log2Int;
-const Arm7tdmi = @import("arm32").Arm7tdmi;

-const Allocator = std.mem.Allocator;
+// Sign-Extend value of type `T` to type `U`
+pub fn sext(comptime T: type, comptime U: type, value: T) T {
+    // U must have less bits than T
+    comptime std.debug.assert(@typeInfo(U).Int.bits <= @typeInfo(T).Int.bits);
+
+    const iT = std.meta.Int(.signed, @typeInfo(T).Int.bits);
+    const ExtU = if (@typeInfo(U).Int.signedness == .unsigned) T else iT;
+    const shift = @intCast(Log2Int(T), @typeInfo(T).Int.bits - @typeInfo(U).Int.bits);
+
+    return @bitCast(T, @bitCast(iT, @as(ExtU, @truncate(U, value)) << shift) >> shift);
+}
+
+/// See https://godbolt.org/z/W3en9Eche
+pub inline fn rotr(comptime T: type, x: T, r: anytype) T {
+    if (@typeInfo(T).Int.signedness == .signed)
+        @compileError("cannot rotate signed integer");
+
+    const ar = @intCast(Log2Int(T), @mod(r, @typeInfo(T).Int.bits));
+    return x >> ar | x << (1 +% ~ar);
+}

 pub const FpsTracker = struct {
    const Self = @This();

    fps: u32,
-    count: std.atomic.Value(u32),
+    count: std.atomic.Atomic(u32),
    timer: std.time.Timer,

    pub fn init() Self {
        return .{
            .fps = 0,
-            .count = std.atomic.Value(u32).init(0),
+            .count = std.atomic.Atomic(u32).init(0),
            .timer = std.time.Timer.start() catch unreachable,
        };
    }

    pub fn tick(self: *Self) void {
-        _ = self.count.fetchAdd(1, .monotonic);
+        _ = self.count.fetchAdd(1, .Monotonic);
    }

    pub fn value(self: *Self) u32 {
        if (self.timer.read() >= std.time.ns_per_s) {
-            self.fps = self.count.swap(0, .monotonic);
+            self.fps = self.count.swap(0, .SeqCst);
            self.timer.reset();
        }

@@ -36,290 +52,63 @@ pub const FpsTracker = struct {
    }
 };

-/// Creates a copy of a title with all Filesystem-invalid characters replaced
+pub fn intToBytes(comptime T: type, value: anytype) [@sizeOf(T)]u8 {
+    comptime std.debug.assert(@typeInfo(T) == .Int);
+
+    var result: [@sizeOf(T)]u8 = undefined;
+
+    var i: Log2Int(T) = 0;
+    while (i < result.len) : (i += 1) result[i] = @truncate(u8, value >> i * @bitSizeOf(u8));
+
+    return result;
+}
+
+/// The Title from the GBA Cartridge may be null padded to a maximum
+/// length of 12 bytes.
+///
+/// This function returns a slice of everything just before the first
+/// `\0`
+pub fn asString(title: [12]u8) []const u8 {
+    var len = title.len;
+    for (title) |char, i| {
+        if (char == 0) {
+            len = i;
+            break;
+        }
+    }
+
+    return title[0..len];
+}
+
+/// Copies a Title and returns either an identical or similar
+/// array consisting of ASCII that won't make any file system angry
 ///
 /// e.g. POKEPIN R/S to POKEPIN R_S
 pub fn escape(title: [12]u8) [12]u8 {
-    var ret: [12]u8 = title;
+    var result: [12]u8 = title;

-    //TODO: Add more replacements
-    std.mem.replaceScalar(u8, &ret, '/', '_');
-    std.mem.replaceScalar(u8, &ret, '\\', '_');
+    for (result) |*char| {
+        if (char.* == '/' or char.* == '\\') char.* = '_';
+        if (char.* == 0) break;
+    }

-    return ret;
+    return result;
 }

 pub const FilePaths = struct {
-    rom: ?[]const u8,
+    rom: []const u8,
    bios: ?[]const u8,
-    save: []const u8,
-
-    pub fn deinit(self: @This(), allocator: Allocator) void {
-        if (self.rom) |path| allocator.free(path);
-        if (self.bios) |path| allocator.free(path);
-        allocator.free(self.save);
-    }
+    save: ?[]const u8,
 };

-pub const io = struct {
-    pub const read = struct {
-        pub fn todo(comptime log: anytype, comptime format: []const u8, args: anytype) u8 {
-            log.debug(format, args);
+pub fn readUndefined(log: anytype, comptime format: []const u8, args: anytype) u8 {
+    log.warn(format, args);
+    if (builtin.mode == .Debug) std.debug.panic("TODO: Implement I/O Register", .{});
+
    return 0;
 }

-        pub fn undef(comptime T: type, comptime log: anytype, comptime format: []const u8, args: anytype) ?T {
-            @setCold(true);
-
-            const unhandled_io = config.config().debug.unhandled_io;
-
+pub fn writeUndefined(log: anytype, comptime format: []const u8, args: anytype) void {
    log.warn(format, args);
-            if (builtin.mode == .Debug and !unhandled_io) std.debug.panic("TODO: Implement I/O Register", .{});
-
-            return null;
-        }
-
-        pub fn err(comptime T: type, comptime log: anytype, comptime format: []const u8, args: anytype) ?T {
-            @setCold(true);
-
-            log.err(format, args);
-            return null;
-        }
-    };
-
-    pub const write = struct {
-        pub fn undef(log: anytype, comptime format: []const u8, args: anytype) void {
-            const unhandled_io = config.config().debug.unhandled_io;
-
-            log.warn(format, args);
-            if (builtin.mode == .Debug and !unhandled_io) std.debug.panic("TODO: Implement I/O Register", .{});
-        }
-    };
-};
-
-pub const Logger = struct {
-    const Self = @This();
-    const FmtArgTuple = std.meta.Tuple(&.{ u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 });
-
-    buf: std.io.BufferedWriter(4096 << 2, std.fs.File.Writer),
-
-    pub fn init(file: std.fs.File) Self {
-        return .{
-            .buf = .{ .unbuffered_writer = file.writer() },
-        };
-    }
-
-    pub fn print(self: *Self, comptime format: []const u8, args: anytype) !void {
-        try self.buf.writer().print(format, args);
-        try self.buf.flush(); // FIXME: On panics, whatever is in the buffer isn't written to file
-    }
-
-    pub fn mgbaLog(self: *Self, cpu: *const Arm7tdmi, opcode: u32) void {
-        const fmt_base = "{X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} {X:0>8} cpsr: {X:0>8} | ";
-        const thumb_fmt = fmt_base ++ "{X:0>4}:\n";
-        const arm_fmt = fmt_base ++ "{X:0>8}:\n";
-
-        if (cpu.cpsr.t.read()) {
-            if (opcode >> 11 == 0x1E) {
-                // Instruction 1 of a BL Opcode, print in ARM mode
-                const low = cpu.bus.dbgRead(u16, cpu.r[15] - 2);
-                const bl_opcode = @as(u32, opcode) << 16 | low;
-
-                self.print(arm_fmt, Self.fmtArgs(cpu, bl_opcode)) catch @panic("failed to write to log file");
-            } else {
-                self.print(thumb_fmt, Self.fmtArgs(cpu, opcode)) catch @panic("failed to write to log file");
-            }
-        } else {
-            self.print(arm_fmt, Self.fmtArgs(cpu, opcode)) catch @panic("failed to write to log file");
-        }
-    }
-
-    fn fmtArgs(cpu: *const Arm7tdmi, opcode: u32) FmtArgTuple {
-        return .{
-            cpu.r[0],
-            cpu.r[1],
-            cpu.r[2],
-            cpu.r[3],
-            cpu.r[4],
-            cpu.r[5],
-            cpu.r[6],
-            cpu.r[7],
-            cpu.r[8],
-            cpu.r[9],
-            cpu.r[10],
-            cpu.r[11],
-            cpu.r[12],
-            cpu.r[13],
-            cpu.r[14],
-            cpu.r[15] - if (cpu.cpsr.t.read()) 2 else @as(u32, 4),
-            cpu.cpsr.raw,
-            opcode,
-        };
-    }
-};
-
-pub const audio = struct {
-    const _io = @import("core/bus/io.zig");
-
-    const ToneSweep = @import("core/apu/ToneSweep.zig");
-    const Tone = @import("core/apu/Tone.zig");
-    const Wave = @import("core/apu/Wave.zig");
-    const Noise = @import("core/apu/Noise.zig");
-
-    pub const length = struct {
-        const FrameSequencer = @import("core/apu.zig").FrameSequencer;
-
-        /// Update State of Ch1, Ch2 and Ch3 length timer
-        pub fn update(comptime T: type, self: *T, fs: *const FrameSequencer, nrx34: _io.Frequency) void {
-            comptime std.debug.assert(T == ToneSweep or T == Tone or T == Wave);
-
-            // Write to NRx4 when FS's next step is not one that clocks the length counter
-            if (!fs.isLengthNext()) {
-                // If length_enable was disabled but is now enabled and length timer is not 0 already,
-                // decrement the length timer
-
-                if (!self.freq.length_enable.read() and nrx34.length_enable.read() and self.len_dev.timer != 0) {
-                    self.len_dev.timer -= 1;
-
-                    // If Length Timer is now 0 and trigger is clear, disable the channel
-                    if (self.len_dev.timer == 0 and !nrx34.trigger.read()) self.enabled = false;
-                }
-            }
-        }
-
-        pub const ch4 = struct {
-            /// update state of ch4 length timer
-            pub fn update(self: *Noise, fs: *const FrameSequencer, nr44: _io.NoiseControl) void {
-                // Write to NRx4 when FS's next step is not one that clocks the length counter
-                if (!fs.isLengthNext()) {
-                    // If length_enable was disabled but is now enabled and length timer is not 0 already,
-                    // decrement the length timer
-
-                    if (!self.cnt.length_enable.read() and nr44.length_enable.read() and self.len_dev.timer != 0) {
-                        self.len_dev.timer -= 1;
-
-                        // If Length Timer is now 0 and trigger is clear, disable the channel
-                        if (self.len_dev.timer == 0 and !nr44.trigger.read()) self.enabled = false;
-                    }
-                }
-            }
-        };
-    };
-};
-
-/// Sets a quarter (8) of the bits of the u32 `left` to the value of u8 `right`
-pub inline fn setQuart(left: u32, addr: u8, right: u8) u32 {
-    const offset: u2 = @truncate(addr);
-
-    return switch (offset) {
-        0b00 => (left & 0xFFFF_FF00) | right,
-        0b01 => (left & 0xFFFF_00FF) | @as(u32, right) << 8,
-        0b10 => (left & 0xFF00_FFFF) | @as(u32, right) << 16,
-        0b11 => (left & 0x00FF_FFFF) | @as(u32, right) << 24,
-    };
-}
-
-/// Calculates the correct shift offset for an aligned/unaligned u8 read
-///
-/// TODO: Support u16 reads of u32 values?
-pub inline fn getHalf(byte: u8) u4 {
-    return @as(u4, @truncate(byte & 1)) << 3;
-}
-
-pub inline fn setHalf(comptime T: type, left: T, addr: u8, right: HalfInt(T)) T {
-    const offset: u1 = @truncate(addr >> if (T == u32) 1 else 0);
-
-    return switch (T) {
-        u32 => switch (offset) {
-            0b0 => (left & 0xFFFF_0000) | right,
-            0b1 => (left & 0x0000_FFFF) | @as(u32, right) << 16,
-        },
-        u16 => switch (offset) {
-            0b0 => (left & 0xFF00) | right,
-            0b1 => (left & 0x00FF) | @as(u16, right) << 8,
-        },
-        else => @compileError("unsupported type"),
-    };
-}
-
-/// The Integer type which corresponds to T with exactly half the amount of bits
-fn HalfInt(comptime T: type) type {
-    const type_info = @typeInfo(T);
-    comptime std.debug.assert(type_info == .Int); // Type must be an integer
-    comptime std.debug.assert(type_info.Int.bits % 2 == 0); // Type must have an even amount of bits
-
-    return std.meta.Int(type_info.Int.signedness, type_info.Int.bits >> 1);
-}
-
-/// Double Buffering Implementation
-pub const FrameBuffer = struct {
-    const Self = @This();
-
-    layers: [2][]u8,
-    buf: []u8,
-    current: u1 = 0,
-
-    allocator: Allocator,
-
-    // TODO: Rename
-    const Device = enum { Emulator, Renderer };
-
-    pub fn init(allocator: Allocator, comptime len: comptime_int) !Self {
-        const buf = try allocator.alloc(u8, len * 2);
-        @memset(buf, 0);
-
-        return .{
-            // Front and Back Framebuffers
-            .layers = [_][]u8{ buf[0..][0..len], buf[len..][0..len] },
-            .buf = buf,
-
-            .allocator = allocator,
-        };
-    }
-
-    pub fn reset(self: *Self) void {
-        @memset(self.buf, 0);
-        self.current = 0;
-    }
-
-    pub fn deinit(self: *Self) void {
-        self.allocator.free(self.buf);
-        self.* = undefined;
-    }
-
-    pub fn swap(self: *Self) void {
-        self.current = ~self.current;
-    }
-
-    pub fn get(self: *Self, comptime dev: Device) []u8 {
-        return self.layers[if (dev == .Emulator) self.current else ~self.current];
-    }
-};
-
-const RingBuffer = @import("zba-util").RingBuffer;
-
-// TODO: Lock Free Queue?
-pub fn Queue(comptime T: type) type {
-    return struct {
-        inner: RingBuffer(T),
-        mtx: std.Thread.Mutex = .{},
-
-        pub fn init(buf: []T) @This() {
-            return .{ .inner = RingBuffer(T).init(buf) };
-        }
-
-        pub fn push(self: *@This(), value: T) !void {
-            self.mtx.lock();
-            defer self.mtx.unlock();
-
-            try self.inner.push(value);
-        }
-
-        pub fn pop(self: *@This()) ?T {
-            self.mtx.lock();
-            defer self.mtx.unlock();
-
-            return self.inner.pop();
-        }
-    };
+    if (builtin.mode == .Debug) std.debug.panic("TODO: Implement I/O Register", .{});
 }
Author	SHA1	Message	Date
Rekai Musuka	69cf5b12f1	fix: remove undefined	2022-07-12 19:29:10 -03:00
Rekai Musuka	e694110fbd	feat: pass thumb.gba	2022-07-12 19:29:10 -03:00
Rekai Musuka	e17e9fb703	fix: don't fake the pipeline in swi	2022-07-12 19:29:10 -03:00
Rekai Musuka	74f1fbc8fd	feat: fake the pipeline less	2022-07-12 19:29:10 -03:00
Rekai Musuka	446b5f6aea	feat: implement obscure behaviour for ARM data processing instrs When a test instruction is called when rd == 15, then the CPSR is reloaded from the SPSR, the pipline is not flushed	2022-07-12 19:29:10 -03:00
Rekai Musuka	f500da5f10	fix: replace accidental removal of code in Cpu.ChangeMode	2022-07-12 19:29:10 -03:00
Rekai Musuka	45f65ce877	chore: progress towards working pipeline focus on THMB branching and a little bit of ARM data processing	2022-07-12 19:29:10 -03:00
Rekai Musuka	d279c4c519	fix: off-by-one error in debug logs	2022-07-12 19:29:10 -03:00
Rekai Musuka	5a9c0c2f19	fix: flush pipline on mode change	2022-07-12 19:29:10 -03:00
Rekai Musuka	379e667704	fix: get beeg.gba working again	2022-07-12 19:29:10 -03:00
Rekai Musuka	66ac4050fd	fix: resolve off-by-one error in mgba log PC	2022-07-12 19:29:10 -03:00
Rekai Musuka	53988b1c83	fix(pipeline): gang.gba works	2022-07-12 19:29:10 -03:00
Rekai Musuka	c47ef37ba5	chore: add non-working pipeline	2022-07-12 19:29:10 -03:00