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f96e26eb76
Author | SHA1 | Date |
---|---|---|
Rekai Nyangadzayi Musuka | f96e26eb76 | |
Rekai Nyangadzayi Musuka | f3e5939c51 | |
Rekai Nyangadzayi Musuka | 5351c14e12 | |
Rekai Nyangadzayi Musuka | d6304a7382 |
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@ -266,7 +266,7 @@ fn DmaController(comptime id: u2) type {
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};
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};
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}
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}
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pub fn pollDmaOnBlank(bus: *Bus, comptime kind: DmaKind) void {
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pub fn onBlanking(bus: *Bus, comptime kind: DmaKind) void {
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bus.dma[0].poll(kind);
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bus.dma[0].poll(kind);
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bus.dma[1].poll(kind);
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bus.dma[1].poll(kind);
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bus.dma[2].poll(kind);
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bus.dma[2].poll(kind);
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@ -305,11 +305,21 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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0x0400_0009 => bus.ppu.bg[0].cnt.raw = setHi(u16, bus.ppu.bg[0].cnt.raw, value),
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0x0400_0009 => bus.ppu.bg[0].cnt.raw = setHi(u16, bus.ppu.bg[0].cnt.raw, value),
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0x0400_000A => bus.ppu.bg[1].cnt.raw = setLo(u16, bus.ppu.bg[1].cnt.raw, value),
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0x0400_000A => bus.ppu.bg[1].cnt.raw = setLo(u16, bus.ppu.bg[1].cnt.raw, value),
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0x0400_000B => bus.ppu.bg[1].cnt.raw = setHi(u16, bus.ppu.bg[1].cnt.raw, value),
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0x0400_000B => bus.ppu.bg[1].cnt.raw = setHi(u16, bus.ppu.bg[1].cnt.raw, value),
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0x0400_0040 => bus.ppu.win.h[0].raw = setLo(u16, bus.ppu.win.h[0].raw, value),
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0x0400_0041 => bus.ppu.win.h[0].raw = setHi(u16, bus.ppu.win.h[0].raw, value),
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0x0400_0042 => bus.ppu.win.h[1].raw = setLo(u16, bus.ppu.win.h[1].raw, value),
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0x0400_0043 => bus.ppu.win.h[1].raw = setHi(u16, bus.ppu.win.h[1].raw, value),
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0x0400_0044 => bus.ppu.win.v[0].raw = setLo(u16, bus.ppu.win.v[0].raw, value),
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0x0400_0045 => bus.ppu.win.v[0].raw = setHi(u16, bus.ppu.win.v[0].raw, value),
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0x0400_0046 => bus.ppu.win.v[1].raw = setLo(u16, bus.ppu.win.v[1].raw, value),
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0x0400_0047 => bus.ppu.win.v[1].raw = setHi(u16, bus.ppu.win.v[1].raw, value),
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0x0400_0048 => bus.ppu.win.in.raw = setLo(u16, bus.ppu.win.in.raw, value),
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0x0400_0048 => bus.ppu.win.in.raw = setLo(u16, bus.ppu.win.in.raw, value),
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0x0400_0049 => bus.ppu.win.in.raw = setHi(u16, bus.ppu.win.in.raw, value),
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0x0400_0049 => bus.ppu.win.in.raw = setHi(u16, bus.ppu.win.in.raw, value),
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0x0400_004A => bus.ppu.win.out.raw = setLo(u16, bus.ppu.win.out.raw, value),
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0x0400_004A => bus.ppu.win.out.raw = setLo(u16, bus.ppu.win.out.raw, value),
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0x0400_0054 => bus.ppu.bldy.raw = setLo(u16, bus.ppu.bldy.raw, value),
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0x0400_0054 => bus.ppu.bldy.raw = setLo(u16, bus.ppu.bldy.raw, value),
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// Sound
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// Sound
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0x0400_0060...0x0400_00A7 => apu.write(T, &bus.apu, address, value),
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0x0400_0060...0x0400_00A7 => apu.write(T, &bus.apu, address, value),
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@ -462,8 +472,12 @@ pub const BldY = extern union {
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raw: u16,
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raw: u16,
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};
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};
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const u8WriteKind = enum { Hi, Lo };
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/// Write-only
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/// Write-only
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pub const WinH = extern union {
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pub const WinH = extern union {
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const Self = @This();
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x2: Bitfield(u16, 0, 8),
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x2: Bitfield(u16, 0, 8),
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x1: Bitfield(u16, 8, 8),
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x1: Bitfield(u16, 8, 8),
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raw: u16,
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raw: u16,
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@ -471,9 +485,18 @@ pub const WinH = extern union {
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/// Write-only
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/// Write-only
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pub const WinV = extern union {
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pub const WinV = extern union {
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const Self = @This();
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y2: Bitfield(u16, 0, 8),
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y2: Bitfield(u16, 0, 8),
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y1: Bitfield(u16, 8, 8),
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y1: Bitfield(u16, 8, 8),
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raw: u16,
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raw: u16,
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pub fn set(self: *Self, comptime K: u8WriteKind, value: u8) void {
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self.raw = switch (K) {
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.Hi => (@as(u16, value) << 8) | self.raw & 0xFF,
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.Lo => (self.raw & 0xFF00) | value,
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};
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}
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};
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};
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pub const WinIn = extern union {
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pub const WinIn = extern union {
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220
src/core/ppu.zig
220
src/core/ppu.zig
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@ -1,16 +1,19 @@
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const std = @import("std");
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const std = @import("std");
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const io = @import("bus/io.zig");
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const io = @import("bus/io.zig");
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const Bit = @import("bitfield").Bit;
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const Bitfield = @import("bitfield").Bitfield;
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const dma = @import("bus/dma.zig");
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const Oam = @import("ppu/Oam.zig");
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const Palette = @import("ppu/Palette.zig");
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const Vram = @import("ppu/Vram.zig");
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const EventKind = @import("scheduler.zig").EventKind;
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const EventKind = @import("scheduler.zig").EventKind;
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const Scheduler = @import("scheduler.zig").Scheduler;
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const Scheduler = @import("scheduler.zig").Scheduler;
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const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
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const Arm7tdmi = @import("cpu.zig").Arm7tdmi;
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const FrameBuffer = @import("../util.zig").FrameBuffer;
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const Bit = @import("bitfield").Bit;
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const Bitfield = @import("bitfield").Bitfield;
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const Allocator = std.mem.Allocator;
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const Allocator = std.mem.Allocator;
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const log = std.log.scoped(.PPU);
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const log = std.log.scoped(.PPU);
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const pollDmaOnBlank = @import("bus/dma.zig").pollDmaOnBlank;
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pub const width = 240;
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pub const width = 240;
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pub const height = 160;
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pub const height = 160;
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@ -48,14 +51,14 @@ pub const Ppu = struct {
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sched.push(.Draw, 240 * 4);
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sched.push(.Draw, 240 * 4);
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const sprites = try allocator.create([128]?Sprite);
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const sprites = try allocator.create([128]?Sprite);
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sprites.* = [_]?Sprite{null} ** 128;
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std.mem.set(?Sprite, sprites, null);
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return Self{
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return Self{
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.vram = try Vram.init(allocator),
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.vram = try Vram.init(allocator),
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.palette = try Palette.init(allocator),
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.palette = try Palette.init(allocator),
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.oam = try Oam.init(allocator),
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.oam = try Oam.init(allocator),
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.sched = sched,
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.sched = sched,
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.framebuf = try FrameBuffer.init(allocator),
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.framebuf = try FrameBuffer.init(allocator, framebuf_pitch * height),
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.allocator = allocator,
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.allocator = allocator,
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// Registers
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// Registers
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@ -485,7 +488,7 @@ pub const Ppu = struct {
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while (i < width) : (i += 1) {
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while (i < width) : (i += 1) {
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// If we're outside of the bounds of mode 5, draw the background colour
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// If we're outside of the bounds of mode 5, draw the background colour
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const bgr555 =
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const bgr555 =
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if (scanline < m5_height and i < m5_width) self.vram.read(u16, vram_base + i * @sizeOf(u16)) else self.palette.getBackdrop();
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if (scanline < m5_height and i < m5_width) self.vram.read(u16, vram_base + i * @sizeOf(u16)) else self.palette.backdrop();
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std.mem.writeIntNative(u32, self.framebuf.get(.Emulator)[fb_base + i * @sizeOf(u32) ..][0..@sizeOf(u32)], rgba888(bgr555));
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std.mem.writeIntNative(u32, self.framebuf.get(.Emulator)[fb_base + i * @sizeOf(u32) ..][0..@sizeOf(u32)], rgba888(bgr555));
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}
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}
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@ -529,7 +532,7 @@ pub const Ppu = struct {
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}
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}
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if (maybe_top) |top| return top;
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if (maybe_top) |top| return top;
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return self.palette.getBackdrop();
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return self.palette.backdrop();
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}
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}
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fn copyToBackgroundBuffer(self: *Self, comptime n: u2, bounds: ?WindowBounds, i: usize, bgr555: u16) void {
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fn copyToBackgroundBuffer(self: *Self, comptime n: u2, bounds: ?WindowBounds, i: usize, bgr555: u16) void {
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@ -658,7 +661,7 @@ pub const Ppu = struct {
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// See if HBlank DMA is present and not enabled
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// See if HBlank DMA is present and not enabled
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if (!self.dispstat.vblank.read())
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if (!self.dispstat.vblank.read())
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pollDmaOnBlank(cpu.bus, .HBlank);
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dma.onBlanking(cpu.bus, .HBlank);
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self.dispstat.hblank.set();
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self.dispstat.hblank.set();
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self.sched.push(.HBlank, 68 * 4 -| late);
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self.sched.push(.HBlank, 68 * 4 -| late);
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@ -700,7 +703,7 @@ pub const Ppu = struct {
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self.aff_bg[1].latchRefPoints();
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self.aff_bg[1].latchRefPoints();
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// See if Vblank DMA is present and not enabled
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// See if Vblank DMA is present and not enabled
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pollDmaOnBlank(cpu.bus, .VBlank);
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dma.onBlanking(cpu.bus, .VBlank);
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}
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}
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if (scanline == 227) self.dispstat.vblank.unset();
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if (scanline == 227) self.dispstat.vblank.unset();
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@ -709,158 +712,6 @@ pub const Ppu = struct {
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}
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}
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};
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};
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const Palette = struct {
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const palram_size = 0x400;
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const Self = @This();
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buf: []u8,
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allocator: Allocator,
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fn init(allocator: Allocator) !Self {
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const buf = try allocator.alloc(u8, palram_size);
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std.mem.set(u8, buf, 0);
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return Self{
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.buf = buf,
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.allocator = allocator,
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};
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}
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fn deinit(self: *Self) void {
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self.allocator.free(self.buf);
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self.* = undefined;
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}
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pub fn read(self: *const Self, comptime T: type, address: usize) T {
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const addr = address & 0x3FF;
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return switch (T) {
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u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
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else => @compileError("PALRAM: Unsupported read width"),
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};
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}
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pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
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const addr = address & 0x3FF;
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switch (T) {
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u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
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u8 => {
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const align_addr = addr & ~@as(u32, 1); // Aligned to Halfword boundary
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std.mem.writeIntSliceLittle(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
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},
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else => @compileError("PALRAM: Unsupported write width"),
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}
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}
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fn getBackdrop(self: *const Self) u16 {
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return self.read(u16, 0);
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}
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};
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const Vram = struct {
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const vram_size = 0x18000;
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const Self = @This();
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buf: []u8,
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allocator: Allocator,
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fn init(allocator: Allocator) !Self {
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const buf = try allocator.alloc(u8, vram_size);
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std.mem.set(u8, buf, 0);
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return Self{
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.buf = buf,
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.allocator = allocator,
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};
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}
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fn deinit(self: *Self) void {
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self.allocator.free(self.buf);
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self.* = undefined;
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}
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pub fn read(self: *const Self, comptime T: type, address: usize) T {
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const addr = Self.mirror(address);
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return switch (T) {
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u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
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else => @compileError("VRAM: Unsupported read width"),
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};
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}
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pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address: usize, value: T) void {
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const mode: u3 = dispcnt.bg_mode.read();
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const idx = Self.mirror(address);
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switch (T) {
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u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[idx..][0..@sizeOf(T)], value),
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u8 => {
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// Ignore write if it falls within the boundaries of OBJ VRAM
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switch (mode) {
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0, 1, 2 => if (0x0001_0000 <= idx) return,
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else => if (0x0001_4000 <= idx) return,
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}
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const align_idx = idx & ~@as(u32, 1); // Aligned to a halfword boundary
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std.mem.writeIntSliceLittle(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
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},
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else => @compileError("VRAM: Unsupported write width"),
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}
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}
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fn mirror(address: usize) usize {
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// Mirrored in steps of 128K (64K + 32K + 32K) (abcc)
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const addr = address & 0x1FFFF;
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// If the address is within 96K we don't do anything,
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// otherwise we want to mirror the last 32K (addresses between 64K and 96K)
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return if (addr < vram_size) addr else 0x10000 + (addr & 0x7FFF);
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}
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};
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const Oam = struct {
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const oam_size = 0x400;
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const Self = @This();
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buf: []u8,
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allocator: Allocator,
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|
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fn init(allocator: Allocator) !Self {
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const buf = try allocator.alloc(u8, oam_size);
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std.mem.set(u8, buf, 0);
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return Self{
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.buf = buf,
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.allocator = allocator,
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|
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};
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}
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fn deinit(self: *Self) void {
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|
||||||
self.allocator.free(self.buf);
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|
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self.* = undefined;
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}
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|
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|
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pub fn read(self: *const Self, comptime T: type, address: usize) T {
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const addr = address & 0x3FF;
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||||||
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||||||
return switch (T) {
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|
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u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
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else => @compileError("OAM: Unsupported read width"),
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|
||||||
};
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|
||||||
}
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pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
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|
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const addr = address & 0x3FF;
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|
||||||
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|
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switch (T) {
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|
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u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
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|
||||||
u8 => return, // 8-bit writes are explicitly ignored
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|
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else => @compileError("OAM: Unsupported write width"),
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|
||||||
}
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|
||||||
}
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|
||||||
};
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|
||||||
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|
||||||
const Window = struct {
|
const Window = struct {
|
||||||
const Self = @This();
|
const Self = @This();
|
||||||
|
|
||||||
|
@ -1261,48 +1112,3 @@ const Scanline = struct {
|
||||||
return self.layers[1];
|
return self.layers[1];
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
// Double Buffering Implementation
|
|
||||||
const FrameBuffer = struct {
|
|
||||||
const Self = @This();
|
|
||||||
|
|
||||||
layers: [2][]u8,
|
|
||||||
buf: []u8,
|
|
||||||
current: u1,
|
|
||||||
|
|
||||||
allocator: Allocator,
|
|
||||||
|
|
||||||
// TODO: Rename
|
|
||||||
const Device = enum {
|
|
||||||
Emulator,
|
|
||||||
Renderer,
|
|
||||||
};
|
|
||||||
|
|
||||||
pub fn init(allocator: Allocator) !Self {
|
|
||||||
const framebuf_len = framebuf_pitch * height;
|
|
||||||
const buf = try allocator.alloc(u8, framebuf_len * 2);
|
|
||||||
std.mem.set(u8, buf, 0);
|
|
||||||
|
|
||||||
return .{
|
|
||||||
// Front and Back Framebuffers
|
|
||||||
.layers = [_][]u8{ buf[0..][0..framebuf_len], buf[framebuf_len..][0..framebuf_len] },
|
|
||||||
.buf = buf,
|
|
||||||
.current = 0,
|
|
||||||
|
|
||||||
.allocator = allocator,
|
|
||||||
};
|
|
||||||
}
|
|
||||||
|
|
||||||
fn deinit(self: *Self) void {
|
|
||||||
self.allocator.free(self.buf);
|
|
||||||
self.* = undefined;
|
|
||||||
}
|
|
||||||
|
|
||||||
pub fn swap(self: *Self) void {
|
|
||||||
self.current = ~self.current;
|
|
||||||
}
|
|
||||||
|
|
||||||
pub fn get(self: *Self, comptime dev: Device) []u8 {
|
|
||||||
return self.layers[if (dev == .Emulator) self.current else ~self.current];
|
|
||||||
}
|
|
||||||
};
|
|
||||||
|
|
|
@ -0,0 +1,40 @@
|
||||||
|
const std = @import("std");
|
||||||
|
|
||||||
|
const Allocator = std.mem.Allocator;
|
||||||
|
|
||||||
|
const buf_len = 0x400;
|
||||||
|
const Self = @This();
|
||||||
|
|
||||||
|
buf: []u8,
|
||||||
|
allocator: Allocator,
|
||||||
|
|
||||||
|
pub fn read(self: *const Self, comptime T: type, address: usize) T {
|
||||||
|
const addr = address & 0x3FF;
|
||||||
|
|
||||||
|
return switch (T) {
|
||||||
|
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
|
||||||
|
else => @compileError("OAM: Unsupported read width"),
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
|
||||||
|
const addr = address & 0x3FF;
|
||||||
|
|
||||||
|
switch (T) {
|
||||||
|
u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
|
||||||
|
u8 => return, // 8-bit writes are explicitly ignored
|
||||||
|
else => @compileError("OAM: Unsupported write width"),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn init(allocator: Allocator) !Self {
|
||||||
|
const buf = try allocator.alloc(u8, buf_len);
|
||||||
|
std.mem.set(u8, buf, 0);
|
||||||
|
|
||||||
|
return Self{ .buf = buf, .allocator = allocator };
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn deinit(self: *Self) void {
|
||||||
|
self.allocator.free(self.buf);
|
||||||
|
self.* = undefined;
|
||||||
|
}
|
|
@ -0,0 +1,47 @@
|
||||||
|
const std = @import("std");
|
||||||
|
|
||||||
|
const Allocator = std.mem.Allocator;
|
||||||
|
|
||||||
|
const buf_len = 0x400;
|
||||||
|
const Self = @This();
|
||||||
|
|
||||||
|
buf: []u8,
|
||||||
|
allocator: Allocator,
|
||||||
|
|
||||||
|
pub fn read(self: *const Self, comptime T: type, address: usize) T {
|
||||||
|
const addr = address & 0x3FF;
|
||||||
|
|
||||||
|
return switch (T) {
|
||||||
|
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
|
||||||
|
else => @compileError("PALRAM: Unsupported read width"),
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
|
||||||
|
const addr = address & 0x3FF;
|
||||||
|
|
||||||
|
switch (T) {
|
||||||
|
u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)], value),
|
||||||
|
u8 => {
|
||||||
|
const align_addr = addr & ~@as(u32, 1); // Aligned to Halfword boundary
|
||||||
|
std.mem.writeIntSliceLittle(u16, self.buf[align_addr..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
|
||||||
|
},
|
||||||
|
else => @compileError("PALRAM: Unsupported write width"),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn init(allocator: Allocator) !Self {
|
||||||
|
const buf = try allocator.alloc(u8, buf_len);
|
||||||
|
std.mem.set(u8, buf, 0);
|
||||||
|
|
||||||
|
return Self{ .buf = buf, .allocator = allocator };
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn deinit(self: *Self) void {
|
||||||
|
self.allocator.free(self.buf);
|
||||||
|
self.* = undefined;
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn backdrop(self: *const Self) u16 {
|
||||||
|
return self.read(u16, 0);
|
||||||
|
}
|
|
@ -0,0 +1,60 @@
|
||||||
|
const std = @import("std");
|
||||||
|
const io = @import("../bus/io.zig");
|
||||||
|
|
||||||
|
const Allocator = std.mem.Allocator;
|
||||||
|
|
||||||
|
const buf_len = 0x18000;
|
||||||
|
const Self = @This();
|
||||||
|
|
||||||
|
buf: []u8,
|
||||||
|
allocator: Allocator,
|
||||||
|
|
||||||
|
pub fn read(self: *const Self, comptime T: type, address: usize) T {
|
||||||
|
const addr = Self.mirror(address);
|
||||||
|
|
||||||
|
return switch (T) {
|
||||||
|
u32, u16, u8 => std.mem.readIntSliceLittle(T, self.buf[addr..][0..@sizeOf(T)]),
|
||||||
|
else => @compileError("VRAM: Unsupported read width"),
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn write(self: *Self, comptime T: type, dispcnt: io.DisplayControl, address: usize, value: T) void {
|
||||||
|
const mode: u3 = dispcnt.bg_mode.read();
|
||||||
|
const idx = Self.mirror(address);
|
||||||
|
|
||||||
|
switch (T) {
|
||||||
|
u32, u16 => std.mem.writeIntSliceLittle(T, self.buf[idx..][0..@sizeOf(T)], value),
|
||||||
|
u8 => {
|
||||||
|
// Ignore write if it falls within the boundaries of OBJ VRAM
|
||||||
|
switch (mode) {
|
||||||
|
0, 1, 2 => if (0x0001_0000 <= idx) return,
|
||||||
|
else => if (0x0001_4000 <= idx) return,
|
||||||
|
}
|
||||||
|
|
||||||
|
const align_idx = idx & ~@as(u32, 1); // Aligned to a halfword boundary
|
||||||
|
std.mem.writeIntSliceLittle(u16, self.buf[align_idx..][0..@sizeOf(u16)], @as(u16, value) * 0x101);
|
||||||
|
},
|
||||||
|
else => @compileError("VRAM: Unsupported write width"),
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn init(allocator: Allocator) !Self {
|
||||||
|
const buf = try allocator.alloc(u8, buf_len);
|
||||||
|
std.mem.set(u8, buf, 0);
|
||||||
|
|
||||||
|
return Self{ .buf = buf, .allocator = allocator };
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn deinit(self: *Self) void {
|
||||||
|
self.allocator.free(self.buf);
|
||||||
|
self.* = undefined;
|
||||||
|
}
|
||||||
|
|
||||||
|
fn mirror(address: usize) usize {
|
||||||
|
// Mirrored in steps of 128K (64K + 32K + 32K) (abcc)
|
||||||
|
const addr = address & 0x1FFFF;
|
||||||
|
|
||||||
|
// If the address is within 96K we don't do anything,
|
||||||
|
// otherwise we want to mirror the last 32K (addresses between 64K and 96K)
|
||||||
|
return if (addr < buf_len) addr else 0x10000 + (addr & 0x7FFF);
|
||||||
|
}
|
46
src/util.zig
46
src/util.zig
|
@ -5,6 +5,8 @@ const config = @import("config.zig");
|
||||||
const Log2Int = std.math.Log2Int;
|
const Log2Int = std.math.Log2Int;
|
||||||
const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
|
const Arm7tdmi = @import("core/cpu.zig").Arm7tdmi;
|
||||||
|
|
||||||
|
const Allocator = std.mem.Allocator;
|
||||||
|
|
||||||
// Sign-Extend value of type `T` to type `U`
|
// Sign-Extend value of type `T` to type `U`
|
||||||
pub fn sext(comptime T: type, comptime U: type, value: T) T {
|
pub fn sext(comptime T: type, comptime U: type, value: T) T {
|
||||||
// U must have less bits than T
|
// U must have less bits than T
|
||||||
|
@ -165,6 +167,7 @@ pub const io = struct {
|
||||||
|
|
||||||
pub const Logger = struct {
|
pub const Logger = struct {
|
||||||
const Self = @This();
|
const Self = @This();
|
||||||
|
const FmtArgTuple = std.meta.Tuple(&.{ u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 });
|
||||||
|
|
||||||
buf: std.io.BufferedWriter(4096 << 2, std.fs.File.Writer),
|
buf: std.io.BufferedWriter(4096 << 2, std.fs.File.Writer),
|
||||||
|
|
||||||
|
@ -223,8 +226,6 @@ pub const Logger = struct {
|
||||||
}
|
}
|
||||||
};
|
};
|
||||||
|
|
||||||
const FmtArgTuple = std.meta.Tuple(&.{ u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32, u32 });
|
|
||||||
|
|
||||||
pub const audio = struct {
|
pub const audio = struct {
|
||||||
const _io = @import("core/bus/io.zig");
|
const _io = @import("core/bus/io.zig");
|
||||||
|
|
||||||
|
@ -302,3 +303,44 @@ fn HalfInt(comptime T: type) type {
|
||||||
|
|
||||||
return std.meta.Int(type_info.Int.signedness, type_info.Int.bits >> 1);
|
return std.meta.Int(type_info.Int.signedness, type_info.Int.bits >> 1);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
/// Double Buffering Implementation
|
||||||
|
pub const FrameBuffer = struct {
|
||||||
|
const Self = @This();
|
||||||
|
|
||||||
|
layers: [2][]u8,
|
||||||
|
buf: []u8,
|
||||||
|
current: u1,
|
||||||
|
|
||||||
|
allocator: Allocator,
|
||||||
|
|
||||||
|
// TODO: Rename
|
||||||
|
const Device = enum { Emulator, Renderer };
|
||||||
|
|
||||||
|
pub fn init(allocator: Allocator, comptime len: comptime_int) !Self {
|
||||||
|
const buf = try allocator.alloc(u8, len * 2);
|
||||||
|
std.mem.set(u8, buf, 0);
|
||||||
|
|
||||||
|
return .{
|
||||||
|
// Front and Back Framebuffers
|
||||||
|
.layers = [_][]u8{ buf[0..][0..len], buf[len..][0..len] },
|
||||||
|
.buf = buf,
|
||||||
|
.current = 0,
|
||||||
|
|
||||||
|
.allocator = allocator,
|
||||||
|
};
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn deinit(self: *Self) void {
|
||||||
|
self.allocator.free(self.buf);
|
||||||
|
self.* = undefined;
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn swap(self: *Self) void {
|
||||||
|
self.current = ~self.current;
|
||||||
|
}
|
||||||
|
|
||||||
|
pub fn get(self: *Self, comptime dev: Device) []u8 {
|
||||||
|
return self.layers[if (dev == .Emulator) self.current else ~self.current];
|
||||||
|
}
|
||||||
|
};
|
||||||
|
|
Loading…
Reference in New Issue