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472457b9f3
Author | SHA1 | Date |
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Rekai Nyangadzayi Musuka | 472457b9f3 | |
Rekai Nyangadzayi Musuka | 2ef4bb7dcc | |
Rekai Nyangadzayi Musuka | 9a732ea6f8 |
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@ -335,10 +335,10 @@ fn DmaController(comptime id: u2) type {
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}
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pub fn pollDmaOnBlank(bus: *Bus, comptime kind: DmaKind) void {
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bus.dma[0].poll(kind);
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bus.dma[1].poll(kind);
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bus.dma[2].poll(kind);
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bus.dma[3].poll(kind);
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comptime var i: usize = 0;
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inline while (i < 4) : (i += 1) {
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bus.dma[i].poll(kind);
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}
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}
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const Adjustment = enum(u2) {
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@ -9,6 +9,9 @@ const Bit = @import("bitfield").Bit;
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const Bitfield = @import("bitfield").Bitfield;
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const Bus = @import("../Bus.zig");
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const getHalf = util.getHalf;
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const setHalf = util.setHalf;
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const log = std.log.scoped(.@"I/O");
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pub const Io = struct {
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@ -19,6 +22,7 @@ pub const Io = struct {
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ie: InterruptEnable,
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irq: InterruptRequest,
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postflg: PostFlag,
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waitcnt: WaitControl,
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haltcnt: HaltControl,
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keyinput: KeyInput,
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@ -28,6 +32,7 @@ pub const Io = struct {
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.ie = .{ .raw = 0x0000 },
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.irq = .{ .raw = 0x0000 },
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.keyinput = .{ .raw = 0x03FF },
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.waitcnt = .{ .raw = 0x0000_0000 },
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.postflg = .FirstBoot,
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.haltcnt = .Execute,
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};
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@ -64,8 +69,10 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
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0x0400_0150 => util.io.read.todo(log, "Read {} from JOY_RECV", .{T}),
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// Interrupts
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0x0400_0200 => @as(T, bus.io.irq.raw) << 16 | bus.io.ie.raw,
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0x0400_0200 => @as(u32, bus.io.irq.raw) << 16 | bus.io.ie.raw,
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0x0400_0204 => bus.io.waitcnt.raw,
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0x0400_0208 => @boolToInt(bus.io.ime),
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0x0400_0300 => @enumToInt(bus.io.postflg),
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else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
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},
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u16 => switch (address) {
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@ -93,8 +100,11 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
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// Interrupts
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0x0400_0200 => bus.io.ie.raw,
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0x0400_0202 => bus.io.irq.raw,
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0x0400_0204 => util.io.read.todo(log, "Read {} from WAITCNT", .{T}),
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0x0400_0204 => bus.io.waitcnt.raw,
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0x0400_0206 => null,
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0x0400_0208 => @boolToInt(bus.io.ime),
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0x0400_020A => null,
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0x0400_0300 => @enumToInt(bus.io.postflg),
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else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
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},
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u8 => return switch (address) {
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@ -120,7 +130,12 @@ pub fn read(bus: *const Bus, comptime T: type, address: u32) ?T {
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0x0400_0135 => util.io.read.todo(log, "Read {} from RCNT_H", .{T}),
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// Interrupts
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0x0400_0200 => @truncate(T, bus.io.ie.raw),
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0x0400_0200, 0x0400_0201 => @truncate(T, bus.io.ie.raw >> getHalf(@truncate(u8, address))),
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0x0400_0202, 0x0400_0203 => @truncate(T, bus.io.irq.raw >> getHalf(@truncate(u8, address))),
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0x0400_0204, 0x0400_0205 => @truncate(T, bus.io.waitcnt.raw >> getHalf(@truncate(u8, address))),
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0x0400_0206, 0x0400_0207 => null,
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0x0400_0208, 0x0400_0209 => @truncate(T, @as(u16, @boolToInt(bus.io.ime)) >> getHalf(@truncate(u8, address))),
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0x0400_020A, 0x0400_020B => null,
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0x0400_0300 => @enumToInt(bus.io.postflg),
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else => util.io.read.undef(T, log, "Tried to perform a {} read to 0x{X:0>8}", .{ T, address }),
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},
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@ -168,9 +183,12 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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// Interrupts
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0x0400_0200 => bus.io.setIrqs(value),
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0x0400_0204 => log.debug("Wrote 0x{X:0>8} to WAITCNT", .{value}),
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0x0400_0204 => bus.io.waitcnt.raw = @truncate(u16, value),
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0x0400_0208 => bus.io.ime = value & 1 == 1,
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0x0400_020C...0x0400_021C => {}, // Unused
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0x0400_0300 => {
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bus.io.postflg = @intToEnum(PostFlag, value & 1);
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bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
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},
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else => util.io.write.undef(log, "Tried to write 0x{X:0>8}{} to 0x{X:0>8}", .{ value, T, address }),
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},
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u16 => switch (address) {
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@ -210,9 +228,14 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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// Interrupts
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0x0400_0200 => bus.io.ie.raw = value,
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0x0400_0202 => bus.io.irq.raw &= ~value,
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0x0400_0204 => log.debug("Wrote 0x{X:0>4} to WAITCNT", .{value}),
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0x0400_0204 => bus.io.waitcnt.raw = value,
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0x0400_0206 => {},
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0x0400_0208 => bus.io.ime = value & 1 == 1,
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0x0400_0206, 0x0400_020A => {}, // Not Used
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0x0400_020A => {},
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0x0400_0300 => {
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bus.io.postflg = @intToEnum(PostFlag, value & 1);
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bus.io.haltcnt = if (value >> 15 & 1 == 0) .Halt else @panic("TODO: Implement STOP");
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},
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else => util.io.write.undef(log, "Tried to write 0x{X:0>4}{} to 0x{X:0>8}", .{ value, T, address }),
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},
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u8 => switch (address) {
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@ -237,9 +260,16 @@ pub fn write(bus: *Bus, comptime T: type, address: u32, value: T) void {
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0x0400_0140 => log.debug("Wrote 0x{X:0>2} to JOYCNT_L", .{value}),
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// Interrupts
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0x0400_0200, 0x0400_0201 => bus.io.ie.raw = setHalf(u16, bus.io.ie.raw, @truncate(u8, address), value),
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0x0400_0202 => bus.io.irq.raw &= ~@as(u16, value),
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0x0400_0203 => bus.io.irq.raw &= ~@as(u16, value) << 8, // TODO: Is this good?
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0x0400_0204, 0x0400_0205 => bus.io.waitcnt.raw = setHalf(u16, @truncate(u16, bus.io.waitcnt.raw), @truncate(u8, address), value),
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0x0400_0206, 0x0400_0207 => {},
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0x0400_0208 => bus.io.ime = value & 1 == 1,
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0x0400_0300 => bus.io.postflg = std.meta.intToEnum(PostFlag, value & 1) catch unreachable,
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0x0400_0209 => {},
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0x0400_020A, 0x0400_020B => {},
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0x0400_0300 => bus.io.postflg = @intToEnum(PostFlag, value & 1),
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0x0400_0301 => bus.io.haltcnt = if (value >> 7 & 1 == 0) .Halt else std.debug.panic("TODO: Implement STOP", .{}),
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0x0400_0410 => log.debug("Wrote 0x{X:0>2} to the common yet undocumented 0x{X:0>8}", .{ value, address }),
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@ -576,3 +606,19 @@ pub const SoundBias = extern union {
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sampling_cycle: Bitfield(u16, 14, 2),
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raw: u16,
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};
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/// Read / Write
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pub const WaitControl = extern union {
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sram_cnt: Bitfield(u16, 0, 2),
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s0_first: Bitfield(u16, 2, 2),
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s0_second: Bit(u16, 4),
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s1_first: Bitfield(u16, 5, 2),
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s1_second: Bit(u16, 7),
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s2_first: Bitfield(u16, 8, 2),
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s2_second: Bit(u16, 10),
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phi_out: Bitfield(u16, 11, 2),
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prefetch_enable: Bit(u16, 14),
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pak_kind: Bit(u16, 15),
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raw: u16,
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};
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@ -190,19 +190,15 @@ fn Timer(comptime id: u2) type {
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// Perform Cascade Behaviour
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switch (id) {
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0 => if (cpu.bus.tim[1].cnt.cascade.read()) {
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cpu.bus.tim[1]._counter +%= 1;
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if (cpu.bus.tim[1]._counter == 0) cpu.bus.tim[1].onTimerExpire(cpu, late);
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inline 0, 1, 2 => |idx| {
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const next = idx + 1;
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if (cpu.bus.tim[next].cnt.cascade.read()) {
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cpu.bus.tim[next]._counter +%= 1;
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if (cpu.bus.tim[next]._counter == 0) cpu.bus.tim[next].onTimerExpire(cpu, late);
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}
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},
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1 => if (cpu.bus.tim[2].cnt.cascade.read()) {
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cpu.bus.tim[2]._counter +%= 1;
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if (cpu.bus.tim[2]._counter == 0) cpu.bus.tim[2].onTimerExpire(cpu, late);
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},
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2 => if (cpu.bus.tim[3].cnt.cascade.read()) {
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cpu.bus.tim[3]._counter +%= 1;
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if (cpu.bus.tim[3]._counter == 0) cpu.bus.tim[3].onTimerExpire(cpu, late);
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},
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3 => {}, // There is no Timer for TIM3 to "cascade" to,
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3 => {}, // THere is no timer for TIM3 to cascade to
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}
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// Reschedule Timer if we're not cascading
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@ -455,29 +455,12 @@ pub const Arm7tdmi = struct {
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}
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pub fn stepDmaTransfer(self: *Self) bool {
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const dma0 = &self.bus.dma[0];
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const dma1 = &self.bus.dma[1];
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const dma2 = &self.bus.dma[2];
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const dma3 = &self.bus.dma[3];
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if (dma0.in_progress) {
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dma0.step(self);
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return true;
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}
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if (dma1.in_progress) {
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dma1.step(self);
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return true;
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}
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if (dma2.in_progress) {
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dma2.step(self);
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return true;
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}
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if (dma3.in_progress) {
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dma3.step(self);
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return true;
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comptime var i: usize = 0;
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inline while (i < 4) : (i += 1) {
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if (self.bus.dma[i].in_progress) {
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self.bus.dma[i].step(self);
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return true;
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}
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}
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return false;
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@ -105,8 +105,8 @@ pub fn runFrame(sched: *Scheduler, cpu: *Arm7tdmi) void {
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}
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fn audioSync(audio_sync: bool, stream: *SDL.SDL_AudioStream, is_buffer_full: *bool) void {
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comptime std.debug.assert(@import("../platform.zig").sample_format == SDL.AUDIO_F32);
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const sample_size = 2 * @sizeOf(f32);
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comptime std.debug.assert(@import("../platform.zig").sample_format == SDL.AUDIO_U16);
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const sample_size = 2 * @sizeOf(u16);
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const max_buf_size: c_int = 0x400;
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// Determine whether the APU is busy right at this moment
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@ -46,10 +46,7 @@ pub const Scheduler = struct {
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},
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.TimerOverflow => |id| {
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switch (id) {
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0 => cpu.bus.tim[0].onTimerExpire(cpu, late),
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1 => cpu.bus.tim[1].onTimerExpire(cpu, late),
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2 => cpu.bus.tim[2].onTimerExpire(cpu, late),
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3 => cpu.bus.tim[3].onTimerExpire(cpu, late),
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inline 0...3 => |idx| cpu.bus.tim[idx].onTimerExpire(cpu, late),
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}
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},
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.ApuChannel => |id| {
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@ -14,8 +14,8 @@ const span = @import("util.zig").span;
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const gba_width = @import("core/ppu.zig").width;
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const gba_height = @import("core/ppu.zig").height;
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pub const sample_rate = 44100;
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pub const sample_format = SDL.AUDIO_F32;
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pub const sample_rate = 1 << 15;
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pub const sample_format = SDL.AUDIO_U16;
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const default_title: []const u8 = "ZBA";
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@ -203,8 +203,8 @@ pub const Gui = struct {
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SDL.SDLK_RETURN => io.keyinput.start.set(),
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SDL.SDLK_RSHIFT => io.keyinput.select.set(),
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SDL.SDLK_i => {
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comptime std.debug.assert(sample_format == SDL.AUDIO_F32);
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log.err("Sample Count: {}", .{@intCast(u32, SDL.SDL_AudioStreamAvailable(cpu.bus.apu.stream)) / (2 * @sizeOf(f32))});
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comptime std.debug.assert(sample_format == SDL.AUDIO_U16);
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log.err("Sample Count: {}", .{@intCast(u32, SDL.SDL_AudioStreamAvailable(cpu.bus.apu.stream)) / (2 * @sizeOf(u16))});
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},
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SDL.SDLK_j => log.err("Scheduler Capacity: {} | Scheduler Event Count: {}", .{ scheduler.queue.capacity(), scheduler.queue.count() }),
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SDL.SDLK_k => {
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@ -271,8 +271,8 @@ const Audio = struct {
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want.callback = Self.callback;
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want.userdata = apu;
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std.debug.assert(sample_format == SDL.AUDIO_F32);
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log.info("Host Sample Rate: {}Hz, Host Format: SDL.AUDIO_F32", .{sample_rate});
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std.debug.assert(sample_format == SDL.AUDIO_U16);
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log.info("Host Sample Rate: {}Hz, Host Format: SDL.AUDIO_U16", .{sample_rate});
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const device = SDL.SDL_OpenAudioDevice(null, 0, &want, &have, 0);
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if (device == 0) panic();
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