Rekai Nyangadzayi Musuka
1773a3acc8
fix(cpu): reimplement THUMB offset shifts
2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka
058c02150c
fix(cpu): op == 0b00 decodes to add in format 5
2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka
8d841ead50
fix(cpu): account for overflow in THUMB alu MUL
2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka
152dafbdf7
chore: use if-else when decoding THUMB instructions
2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka
7dbd2fc556
fix(cpu): account for rn in rlist in block data transfer
2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka
85e0924669
feat: implement LDM/STM behaviour when S is set
2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka
97919f646d
feat(cpu): Pass all LDR/STR ARMwrestler tests
2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka
696cc1b359
feat(cpu): decode and implement all necessary ARM CPU instructions
2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka
151de2eab4
feat(cpu): implement ARM SWP and SWPB
2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka
e7f6464564
fix: resolve off by n * 2 when accessing Palette during BG Mode 4
2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka
da681c946e
feat(cpu): Implement Multiply Long ARM instructions
2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka
e0e43eece5
fix: no buttons are pressed by default
2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka
7013389288
feat(cpu): implement format 18 THUMB instructions
2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka
443520ecae
chore: more detailed panic message
2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka
96d7285111
feat(cpu): implement format 10 THUMB instructions
2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka
7e6fc44191
feat(cpu): implement SWP
2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka
9cb4ebaa7f
fix(cpu): perform MUL with u64s, throw away upper 32 bits
2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka
3e4d7e7ed8
feat: implement keyboard input
2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka
3a6951d93d
chore: don't panic on unsupported BG mode
2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka
391096872e
chore: tempoarily disable fps counter
2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka
eebf6fcae4
chore: zero-initialize VRAM
2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka
8b7223cf35
chore: stub KeyInput I/O register
2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka
e1fec48a0e
fix(cpu): properly decode multiply instructions
2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka
0778ee8dd7
feat(cpu): implement ARM multiply instructions
2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka
14d5160674
fix: allow 32-bit writes to DISPCNT
2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka
eabf787305
fix(cpu): properly decode ldm stm thumb instructions
2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka
980e4ff5dd
fix(cpu): properly decode THUMB PUSH and POP at comptime
2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka
1ac193c506
fix(cpu): don't ignore 11th bit of THUMB BL offset
2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka
d6ed071bc6
feat(cpu): implement thumb push / pop and stub format 13 thumb instrs
2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka
a3d53d40fb
feat(cpu): implement THUMB format 9 loads / stores
2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka
a17dfbe41f
fix(cpu): resolve issues with unexpected PC value in THUMB
2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka
b9a81baa47
feat(cpu): implement THUMB ldmia stmia
2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka
97b236225e
chore: implement THUMB format 4 instructions
2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka
8113146b86
chore: dedup code in THUMB instructions
2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka
e6625113db
chore: refactor and genericize ARM data processing calculations
2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka
2643504eb5
chore: relocate barrel_shifter zig file
2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka
f7518d1bab
feat(cpu): implement format2 THUMB instructions
2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka
800ca798cd
feat(cpu): implement format19 THUMB instructions
2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka
d714ffb4f9
chore: account for THUMB BL instruction when mimicking mGBA logs
2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka
7bc186a03c
feat(cpu): implement format16 THUMB instructions
2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka
b94b87d186
feat(cpu): implement format 1 THUMB instructions
2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka
0289be60ef
fix: dont close file handle early
2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka
93922b65e3
feat(cpu): implement format 6 THUMB instructions
2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka
c6608748c6
chore: rename title
2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka
8e383d55d7
chore: refactor GBA Display Timings
...
This change should reflect that the Hblank bit of DISPSTAT is toggled on all scanlines
while also ensuring that the Vblank bit is set on all Vblank scanlines
2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka
8926026b5b
chore: move a single statement lol
2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka
464479b986
chore: mark indexing methods as inline
2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka
de1c84914c
feat: create emulator thread
2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka
8e7766e694
chore: disable logging by default
2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka
4858dbc5dc
chore: revert fastboot changes
2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka
c4e131b92d
chore: binary logging + file logging + DP chanes + fastBoot changes
2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka
2e54be76d6
chore: rename skipBios to fastBoot
2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka
7914268702
chore: set correct values for select banked registers on fast boot
2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka
4bdb85834c
feat(cpu): implement SWI
2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka
f89a37936f
chore(bios): allow reading from BIOS
2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka
8bb7ea6be6
fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction
2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka
60a1f7fa99
chore(cpu): implement behaviour for undefined test instruction
2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka
b3b8182f85
fix(cpu): fix PC offset when barrel shifter and bit 4 of DP is set
2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka
56e660714c
fix(cpu): implement S set + rd == 15 case for data processing
2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka
eb632056a2
feat(cpu): implement banked registers
2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka
fbc9de0335
fix(cpu): improve MRS and MSR instructions
2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka
5c7539cd26
feat(cpu): implement CMN
2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka
7c20e5fdb5
fix(barrel_shifter): fix PC being 1 word ahead in barrel shifter
2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka
f79e7126ee
feat(cpu): Implement RSC
2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka
15e92bc6af
feat(cpu): implement RSB
2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka
47fc96fe00
feat(cpu): implement BIC
2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka
4ac5ad42c6
feat(cpu): implement EOR
2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka
c93153672f
feat(cpu): implement ADD
2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka
a46dd448f4
feat(cpu): implement fix for ADC and implement SBC
2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka
01f75112ce
chore(barrel_shifter): remove panic from ASR
2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka
051b98bc02
fix(barrel_shifter): should not modify cpsr when amount == 0
2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka
5d0bc1b335
chore(cpu): refactor the barrel shifter once again
2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka
43d011538e
feat(cpu): implement ADC
...
ADC interacting w/ the Barrel Shifter is not working though
2022-10-21 05:11:59 -03:00
Rekai Nyangadzayi Musuka
f3ad5e90ff
feat(cpu): implement RRX for Barrel Shifter
2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka
9b867c02e0
feat(cpu): implement SUB in THUMB format 3
2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka
2ba09868ba
feat(cpu): implement ARM SUB in data processing
2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka
9394754593
feat(cpu): implement MVN
2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka
41bab3d6ba
chore(cpu): refactor barrel shifter
2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka
99b686b2d7
fix(cpu): use barrel shifter in data processing immediates
2022-10-21 05:11:58 -03:00
Rekai Nyangadzayi Musuka
daad98bbfe
feat(cpu): implement format 12 thumb instructions
2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka
2fb01577af
feat(cpu): implement some already decoded format 3 instructions
2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka
96d21f27a5
feat(cpu): implement THUMB format 5 instructions
2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka
793110f315
chore: mgba log now supports printing THUMB instructions
2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka
5ed5c5d52d
feat(cpu): implement like 1 THUMB instruction
2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka
01385ee46b
chore: distinguish between undefined ARM and THUMB instr
2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka
0eba3aca1f
chore(cpu): lay groundwork for THUMB instruction decoding and execution
2022-10-21 05:11:57 -03:00
Rekai Nyangadzayi Musuka
83a5370196
chore(cpu): refactor ARM functions to make room for THUMB
2022-10-21 05:11:56 -03:00
Rekai Nyangadzayi Musuka
b0b6247f06
fix(cpu): fix conditions for GT cond
2022-10-21 05:11:56 -03:00
Rekai Nyangadzayi Musuka
2a33716166
fix(cpu): fix imm value calculation in MSR
2022-10-21 05:11:56 -03:00
Rekai Nyangadzayi Musuka
9b26454c72
fix(cpu): resolve off-by-one error when executing LDM
2022-10-21 05:11:56 -03:00
Rekai Nyangadzayi Musuka
97b933d9ea
feat(cpu): implement branch and exchange
...
If I want to continue with armwrestler, I'll have to implement
THUMB instructions now
2022-10-21 05:11:56 -03:00
Rekai Nyangadzayi Musuka
ff70aadfdb
fix(cpu): make Data Processing instructions r15-aware
2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka
ae53f92d40
fix(cpu): make LDRH and STRH aware of r15
2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka
f51e1d3154
fix(cpu): account for r15 in LDR and STR instructions
2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka
a21f94569f
fix(cpu): flip two branches in PSR Transfer execution
2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka
b9255bffe7
feat(cpu): implement MSR and MRS
2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka
e1f8400343
feat(cpu): stub PSR Transfer instructions
2022-10-21 05:11:55 -03:00
Rekai Nyangadzayi Musuka
52493831cc
chore(io): implement IE and IME
2022-10-21 05:11:54 -03:00
Rekai Nyangadzayi Musuka
00ba7afac4
chore: remove some magic constants
2022-10-21 05:11:54 -03:00
Rekai Nyangadzayi Musuka
97e663febf
fix(bus): remove accidental recursion
2022-10-21 05:11:54 -03:00
