Commit Graph

211 Commits

Author SHA1 Message Date
Rekai Nyangadzayi Musuka 784bc81a4a fix(cpu): account for overflow in THUMB alu MUL 2022-02-02 18:57:33 -04:00
Rekai Nyangadzayi Musuka 045c98de1f chore: use if-else when decoding THUMB instructions 2022-02-02 18:48:47 -04:00
Rekai Nyangadzayi Musuka c2901ee0d8 fix(cpu): account for rn in rlist in block data transfer 2022-02-02 17:35:33 -04:00
Rekai Nyangadzayi Musuka d95efa5b12 feat: implement LDM/STM behaviour when S is set 2022-02-02 16:12:47 -04:00
Rekai Nyangadzayi Musuka 237beb9caa feat(cpu): Pass all LDR/STR ARMwrestler tests 2022-02-02 14:07:18 -04:00
Rekai Nyangadzayi Musuka 30bad76e44 feat(cpu): decode and implement all necessary ARM CPU instructions 2022-02-02 12:06:41 -04:00
Rekai Nyangadzayi Musuka c34c2ee6eb feat(cpu): implement ARM SWP and SWPB 2022-02-02 08:44:33 -04:00
Rekai Nyangadzayi Musuka 6c7934be70 fix: resolve off by n * 2 when accessing Palette during BG Mode 4 2022-02-01 22:56:53 -04:00
Rekai Nyangadzayi Musuka 48017b45f5 feat(cpu): Implement Multiply Long ARM instructions 2022-02-01 22:09:38 -04:00
Rekai Nyangadzayi Musuka 28c81f79ae fix: no buttons are pressed by default 2022-02-01 20:52:01 -04:00
Rekai Nyangadzayi Musuka a80600156d feat(cpu): implement format 18 THUMB instructions 2022-02-01 19:12:01 -04:00
Rekai Nyangadzayi Musuka 0d7600ed7a chore: more detailed panic message 2022-02-01 19:11:56 -04:00
Rekai Nyangadzayi Musuka ca41f6a85c feat(cpu): implement format 10 THUMB instructions 2022-02-01 17:56:11 -04:00
Rekai Nyangadzayi Musuka 85927a943f feat(cpu): implement SWP 2022-02-01 16:30:55 -04:00
Rekai Nyangadzayi Musuka b27bf4a85c fix(cpu): perform MUL with u64s, throw away upper 32 bits 2022-02-01 16:15:08 -04:00
Rekai Nyangadzayi Musuka b07eb22b86 feat: implement keyboard input 2022-02-01 16:11:59 -04:00
Rekai Nyangadzayi Musuka f6e4b4931f chore: don't panic on unsupported BG mode 2022-01-30 02:43:11 -04:00
Rekai Nyangadzayi Musuka e35d81eeb8 chore: tempoarily disable fps counter 2022-01-30 02:42:01 -04:00
Rekai Nyangadzayi Musuka 8c248ffb11 chore: zero-initialize VRAM 2022-01-30 02:39:16 -04:00
Rekai Nyangadzayi Musuka b0332e6eb8 chore: stub KeyInput I/O register 2022-01-30 02:38:29 -04:00
Rekai Nyangadzayi Musuka dd632975f8 fix(cpu): properly decode multiply instructions 2022-01-30 02:16:12 -04:00
Rekai Nyangadzayi Musuka a459d4b433 feat(cpu): implement ARM multiply instructions 2022-01-30 02:04:24 -04:00
Rekai Nyangadzayi Musuka 6c008ce950 fix: allow 32-bit writes to DISPCNT 2022-01-30 01:42:54 -04:00
Rekai Nyangadzayi Musuka 8d1df7ae43 fix(cpu): properly decode ldm stm thumb instructions 2022-01-30 01:12:34 -04:00
Rekai Nyangadzayi Musuka 6ffaf12804 fix(cpu): properly decode THUMB PUSH and POP at comptime 2022-01-30 00:16:13 -04:00
Rekai Nyangadzayi Musuka dc6931639f fix(cpu): don't ignore 11th bit of THUMB BL offset 2022-01-29 23:53:40 -04:00
Rekai Nyangadzayi Musuka e18f10126e feat(cpu): implement thumb push / pop and stub format 13 thumb instrs 2022-01-29 23:22:10 -04:00
Rekai Nyangadzayi Musuka 0598ba402d feat(cpu): implement THUMB format 9 loads / stores 2022-01-29 22:34:40 -04:00
Rekai Nyangadzayi Musuka b8a9aaee86 fix(cpu): resolve issues with unexpected PC value in THUMB 2022-01-29 22:07:36 -04:00
Rekai Nyangadzayi Musuka 00058f6094 feat(cpu): implement THUMB ldmia stmia 2022-01-29 21:10:14 -04:00
Rekai Nyangadzayi Musuka 2dde47318c chore: implement THUMB format 4 instructions 2022-01-29 20:42:13 -04:00
Rekai Nyangadzayi Musuka ae4023e51c chore: dedup code in THUMB instructions 2022-01-29 20:05:27 -04:00
Rekai Nyangadzayi Musuka bce067557f chore: refactor and genericize ARM data processing calculations 2022-01-29 19:40:58 -04:00
Rekai Nyangadzayi Musuka e0acabf050 chore: relocate barrel_shifter zig file 2022-01-29 18:52:16 -04:00
Rekai Nyangadzayi Musuka 599e068c7e feat(cpu): implement format2 THUMB instructions 2022-01-29 18:46:27 -04:00
Rekai Nyangadzayi Musuka 4ca65caef0 feat(cpu): implement format19 THUMB instructions 2022-01-29 18:25:50 -04:00
Rekai Nyangadzayi Musuka 0c49bf2288 chore: account for THUMB BL instruction when mimicking mGBA logs 2022-01-29 18:14:00 -04:00
Rekai Nyangadzayi Musuka 44dbdba48c feat(cpu): implement format16 THUMB instructions 2022-01-29 17:44:04 -04:00
Rekai Nyangadzayi Musuka d85e0c8d05 feat(cpu): implement format 1 THUMB instructions 2022-01-29 17:29:30 -04:00
Rekai Nyangadzayi Musuka 995633e9e8 fix: dont close file handle early 2022-01-29 01:18:45 -04:00
Rekai Nyangadzayi Musuka cfbd292edc feat(cpu): implement format 6 THUMB instructions 2022-01-29 01:18:41 -04:00
Rekai Nyangadzayi Musuka 95efb3f35d chore: rename title 2022-01-28 23:27:03 -04:00
Rekai Nyangadzayi Musuka 6a6dccf4d8 chore: refactor GBA Display Timings
This change should reflect that the Hblank bit of DISPSTAT is toggled on all scanlines
while also ensuring that the Vblank bit is set on all Vblank scanlines
2022-01-28 22:58:19 -04:00
Rekai Nyangadzayi Musuka ad1db4dc2e chore: move a single statement lol 2022-01-28 22:57:48 -04:00
Rekai Nyangadzayi Musuka 19359f7ee4 chore: mark indexing methods as inline 2022-01-28 17:11:29 -04:00
Rekai Nyangadzayi Musuka 24f0922f86 feat: create emulator thread 2022-01-28 16:33:38 -04:00
Rekai Nyangadzayi Musuka b1cc985230 chore: disable logging by default 2022-01-25 18:20:30 -04:00
Rekai Nyangadzayi Musuka e5c8f0ce07 chore: revert fastboot changes 2022-01-25 18:20:01 -04:00
Rekai Nyangadzayi Musuka fbc5b309b0 chore: binary logging + file logging + DP chanes + fastBoot changes 2022-01-25 18:18:52 -04:00
Rekai Nyangadzayi Musuka 540fbf739a chore: rename skipBios to fastBoot 2022-01-25 11:15:17 -04:00
Rekai Nyangadzayi Musuka 0546b1c308 chore: set correct values for select banked registers on fast boot 2022-01-25 11:14:15 -04:00
Rekai Nyangadzayi Musuka 997dc1314c feat(cpu): implement SWI 2022-01-25 10:34:21 -04:00
Rekai Nyangadzayi Musuka 1456d0f317 chore(bios): allow reading from BIOS 2022-01-25 10:32:28 -04:00
Rekai Nyangadzayi Musuka 6257418405 fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction 2022-01-25 09:23:32 -04:00
Rekai Nyangadzayi Musuka 985fefb9f6 chore(cpu): implement behaviour for undefined test instruction 2022-01-25 08:05:42 -04:00
Rekai Nyangadzayi Musuka 95dd3e3df8 fix(cpu): fix PC offset when barrel shifter and bit 4 of DP is set 2022-01-24 17:52:01 -04:00
Rekai Nyangadzayi Musuka 702ff288d8 fix(cpu): implement S set + rd == 15 case for data processing 2022-01-19 07:46:49 -04:00
Rekai Nyangadzayi Musuka bf36a23722 feat(cpu): implement banked registers 2022-01-19 07:29:49 -04:00
Rekai Nyangadzayi Musuka fc5a3460dd fix(cpu): improve MRS and MSR instructions 2022-01-18 20:17:00 -04:00
Rekai Nyangadzayi Musuka 6177927049 feat(cpu): implement CMN 2022-01-18 15:09:25 -04:00
Rekai Nyangadzayi Musuka 903b75c7c4 fix(barrel_shifter): fix PC being 1 word ahead in barrel shifter 2022-01-18 15:08:29 -04:00
Rekai Nyangadzayi Musuka 8d786cbe25 feat(cpu): Implement RSC 2022-01-18 14:46:57 -04:00
Rekai Nyangadzayi Musuka 212bc9e11d feat(cpu): implement RSB 2022-01-18 14:36:03 -04:00
Rekai Nyangadzayi Musuka 63a57ac954 feat(cpu): implement BIC 2022-01-18 14:28:47 -04:00
Rekai Nyangadzayi Musuka 85dae5e1d7 feat(cpu): implement EOR 2022-01-18 14:27:07 -04:00
Rekai Nyangadzayi Musuka 6189bf0315 feat(cpu): implement ADD 2022-01-18 14:25:29 -04:00
Rekai Nyangadzayi Musuka 2f3213f693 feat(cpu): implement fix for ADC and implement SBC 2022-01-18 14:20:01 -04:00
Rekai Nyangadzayi Musuka a62cd9aa40 chore(barrel_shifter): remove panic from ASR 2022-01-18 14:19:58 -04:00
Rekai Nyangadzayi Musuka 25c57a4cc7 fix(barrel_shifter): should not modify cpsr when amount == 0 2022-01-18 13:30:41 -04:00
Rekai Nyangadzayi Musuka a7a44c4463 chore(cpu): refactor the barrel shifter once again 2022-01-17 15:55:55 -04:00
Rekai Nyangadzayi Musuka d4d2fedfbe feat(cpu): implement ADC
ADC interacting w/ the Barrel Shifter is not working though
2022-01-17 14:29:34 -04:00
Rekai Nyangadzayi Musuka 483e149b32 feat(cpu): implement RRX for Barrel Shifter 2022-01-17 14:19:40 -04:00
Rekai Nyangadzayi Musuka 85ffdf44f5 feat(cpu): implement SUB in THUMB format 3 2022-01-17 11:36:02 -04:00
Rekai Nyangadzayi Musuka 9098a55ae3 feat(cpu): implement ARM SUB in data processing 2022-01-17 11:35:41 -04:00
Rekai Nyangadzayi Musuka c0d956ea95 feat(cpu): implement MVN 2022-01-17 11:30:59 -04:00
Rekai Nyangadzayi Musuka 1025500407 chore(cpu): refactor barrel shifter 2022-01-17 11:17:04 -04:00
Rekai Nyangadzayi Musuka d05a924420 fix(cpu): use barrel shifter in data processing immediates 2022-01-17 11:02:34 -04:00
Rekai Nyangadzayi Musuka 2a416fb2c6 feat(cpu): implement format 12 thumb instructions 2022-01-17 10:07:50 -04:00
Rekai Nyangadzayi Musuka ea5f0ce552 feat(cpu): implement some already decoded format 3 instructions 2022-01-17 09:29:11 -04:00
Rekai Nyangadzayi Musuka e55d2dc323 feat(cpu): implement THUMB format 5 instructions 2022-01-17 09:28:46 -04:00
Rekai Nyangadzayi Musuka 3037407ebe chore: mgba log now supports printing THUMB instructions 2022-01-17 07:18:44 -04:00
Rekai Nyangadzayi Musuka 1915d98bdd feat(cpu): implement like 1 THUMB instruction 2022-01-16 12:46:59 -04:00
Rekai Nyangadzayi Musuka 4606a1ab25 chore: distinguish between undefined ARM and THUMB instr 2022-01-14 05:30:32 -04:00
Rekai Nyangadzayi Musuka 0cf052838d chore(cpu): lay groundwork for THUMB instruction decoding and execution 2022-01-14 05:23:16 -04:00
Rekai Nyangadzayi Musuka ae37b1218b chore(cpu): refactor ARM functions to make room for THUMB 2022-01-14 04:26:09 -04:00
Rekai Nyangadzayi Musuka 070322064d fix(cpu): fix conditions for GT cond 2022-01-14 04:19:54 -04:00
Rekai Nyangadzayi Musuka 37bd6758fb fix(cpu): fix imm value calculation in MSR 2022-01-14 04:08:04 -04:00
Rekai Nyangadzayi Musuka 7f6ab626d9 fix(cpu): resolve off-by-one error when executing LDM 2022-01-14 03:43:03 -04:00
Rekai Nyangadzayi Musuka 77dba68a0b feat(cpu): implement branch and exchange
If I want to continue with armwrestler, I'll have to implement
THUMB instructions now
2022-01-12 07:20:24 -04:00
Rekai Nyangadzayi Musuka 7adc7c8802 fix(cpu): make Data Processing instructions r15-aware 2022-01-12 07:20:24 -04:00
Rekai Nyangadzayi Musuka 229f7c3388 fix(cpu): make LDRH and STRH aware of r15 2022-01-12 07:20:21 -04:00
Rekai Nyangadzayi Musuka 5812b9713c fix(cpu): account for r15 in LDR and STR instructions 2022-01-12 06:16:59 -04:00
Rekai Nyangadzayi Musuka 98c5803208 fix(cpu): flip two branches in PSR Transfer execution 2022-01-12 06:16:34 -04:00
Rekai Nyangadzayi Musuka 74abd3df4d feat(cpu): implement MSR and MRS 2022-01-12 04:48:57 -04:00
Rekai Nyangadzayi Musuka 7531af7f2b feat(cpu): stub PSR Transfer instructions 2022-01-12 03:40:51 -04:00
Rekai Nyangadzayi Musuka 1c173eb4b8 chore(io): implement IE and IME 2022-01-12 02:19:26 -04:00
Rekai Nyangadzayi Musuka 769c67b9d4 chore: remove some magic constants 2022-01-12 00:46:20 -04:00
Rekai Nyangadzayi Musuka c1be53bcb2 fix(bus): remove accidental recursion 2022-01-10 21:25:45 -04:00
Rekai Nyangadzayi Musuka 072a66cfdb fix(cpu): write results of ORR to destination register 2022-01-10 10:56:41 -04:00
Rekai Nyangadzayi Musuka ed3bdd90fb feat(cpu): implement TEQ 2022-01-10 08:09:02 -04:00