112 Commits

Author SHA1 Message Date
c52dc5adb1 fix: PC is 12 ahead when it is rd in str and strb 2022-02-05 21:42:04 -04:00
7bfb87a859 fix: listen to my past self
By deleting this line I go from test 234 to test 355 in arm.gba
2022-02-05 21:35:26 -04:00
2842345111 chore: remove unnecessary @as calls 2022-02-05 21:01:39 -04:00
aa6f3c7a92 feat: pass thumb.gba 2022-02-05 20:39:15 -04:00
3ae24d6977 chore: account for empty rlist in THUMB LDM/STM 2022-02-05 18:03:39 -04:00
0a22730479 fix(cpu): handle edge case in LDRSH 2022-02-05 17:12:25 -04:00
5ec8d4b0a5 fix: resolve decoding mixup in THUMB format 8 instructions 2022-02-05 14:50:34 -04:00
b233981a34 feat: rename ARM and THUMB SWI functions 2022-02-04 04:34:47 -04:00
1b8db0c427 chore: group THUMB and select ARM instructions together (same file) 2022-02-04 04:18:20 -04:00
91384a7c68 fix(cpu): resolve edge cases in THUMB Format 5 2022-02-03 00:55:57 -04:00
c6bb4bf8e1 fix(cpu): allow for select values to overflow
FuzzARM found these operations which panicked, when they should
have overflowed. These are now fixed

n = 8000
2022-02-02 22:49:33 -04:00
800ed6f1a7 feat(cpu): implement format 13
While bugs do exist, at this point all THUMB and ARMv4 instructions
have been implemented! Yay!
2022-02-02 22:31:21 -04:00
027e4fb57b feat(cpu): implement THUMB format 17 2022-02-02 22:31:08 -04:00
1378c809e6 feat(cpu): implement THUMB format11 2022-02-02 22:30:46 -04:00
99492a6782 chore: progress towards passing ldr/str thumb in armwrestler 2022-02-02 21:14:46 -04:00
8b574efe85 fix(cpu): properly negate in NEG 2022-02-02 20:12:20 -04:00
9fd03d2a92 fix(cpu): reimplement THUMB offset shifts 2022-02-02 20:12:07 -04:00
9affe01da8 fix(cpu): op == 0b00 decodes to add in format 5 2022-02-02 18:58:06 -04:00
784bc81a4a fix(cpu): account for overflow in THUMB alu MUL 2022-02-02 18:57:33 -04:00
c2901ee0d8 fix(cpu): account for rn in rlist in block data transfer 2022-02-02 17:35:33 -04:00
d95efa5b12 feat: implement LDM/STM behaviour when S is set 2022-02-02 16:12:47 -04:00
237beb9caa feat(cpu): Pass all LDR/STR ARMwrestler tests 2022-02-02 14:07:18 -04:00
c34c2ee6eb feat(cpu): implement ARM SWP and SWPB 2022-02-02 08:44:33 -04:00
48017b45f5 feat(cpu): Implement Multiply Long ARM instructions 2022-02-01 22:09:38 -04:00
a80600156d feat(cpu): implement format 18 THUMB instructions 2022-02-01 19:12:01 -04:00
0d7600ed7a chore: more detailed panic message 2022-02-01 19:11:56 -04:00
ca41f6a85c feat(cpu): implement format 10 THUMB instructions 2022-02-01 17:56:11 -04:00
85927a943f feat(cpu): implement SWP 2022-02-01 16:30:55 -04:00
b27bf4a85c fix(cpu): perform MUL with u64s, throw away upper 32 bits 2022-02-01 16:15:08 -04:00
dd632975f8 fix(cpu): properly decode multiply instructions 2022-01-30 02:16:12 -04:00
a459d4b433 feat(cpu): implement ARM multiply instructions 2022-01-30 02:04:24 -04:00
6ffaf12804 fix(cpu): properly decode THUMB PUSH and POP at comptime 2022-01-30 00:16:13 -04:00
dc6931639f fix(cpu): don't ignore 11th bit of THUMB BL offset 2022-01-29 23:53:40 -04:00
e18f10126e feat(cpu): implement thumb push / pop and stub format 13 thumb instrs 2022-01-29 23:22:10 -04:00
0598ba402d feat(cpu): implement THUMB format 9 loads / stores 2022-01-29 22:34:40 -04:00
b8a9aaee86 fix(cpu): resolve issues with unexpected PC value in THUMB 2022-01-29 22:07:36 -04:00
00058f6094 feat(cpu): implement THUMB ldmia stmia 2022-01-29 21:10:14 -04:00
2dde47318c chore: implement THUMB format 4 instructions 2022-01-29 20:42:13 -04:00
ae4023e51c chore: dedup code in THUMB instructions 2022-01-29 20:05:27 -04:00
bce067557f chore: refactor and genericize ARM data processing calculations 2022-01-29 19:40:58 -04:00
e0acabf050 chore: relocate barrel_shifter zig file 2022-01-29 18:52:16 -04:00
599e068c7e feat(cpu): implement format2 THUMB instructions 2022-01-29 18:46:27 -04:00
4ca65caef0 feat(cpu): implement format19 THUMB instructions 2022-01-29 18:25:50 -04:00
44dbdba48c feat(cpu): implement format16 THUMB instructions 2022-01-29 17:44:04 -04:00
d85e0c8d05 feat(cpu): implement format 1 THUMB instructions 2022-01-29 17:29:30 -04:00
cfbd292edc feat(cpu): implement format 6 THUMB instructions 2022-01-29 01:18:41 -04:00
fbc5b309b0 chore: binary logging + file logging + DP chanes + fastBoot changes 2022-01-25 18:18:52 -04:00
997dc1314c feat(cpu): implement SWI 2022-01-25 10:34:21 -04:00
6257418405 fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction 2022-01-25 09:23:32 -04:00
985fefb9f6 chore(cpu): implement behaviour for undefined test instruction 2022-01-25 08:05:42 -04:00