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109 Commits

Author SHA1 Message Date
Rekai Nyangadzayi Musuka 7d79361aca chore(cpu): add inline fn isHalted() 2022-10-21 05:12:50 -03:00
Rekai Nyangadzayi Musuka bf8521eb5e chore: use stdlib endian-aware integer read/write functions 2022-10-21 05:12:47 -03:00
Rekai Nyangadzayi Musuka db064d2321 chore: misc style improvements 2022-10-21 05:12:47 -03:00
Rekai Nyangadzayi Musuka 9f69b122d0 chore: remove awful ptr casts in backup.zig and bios.zig 2022-10-21 05:12:46 -03:00
Rekai Nyangadzayi Musuka 2664f5cf20 chore: improve APU accuracy + scheduler refactoring 2022-10-21 05:12:43 -03:00
Rekai Nyangadzayi Musuka ff002f18c6 feat: handle DMA IRQs (maybe?) 2022-10-21 05:12:42 -03:00
Rekai Nyangadzayi Musuka cb74bfd280 chore: pass destoer's cond_invalid test 2022-10-21 05:12:40 -03:00
Rekai Nyangadzayi Musuka 1a23073424 fix: incorrect order-of-operations in ARM BL impl 2022-10-21 05:12:39 -03:00
Rekai Nyangadzayi Musuka e690f88cda chore: misc improvements 2022-10-21 05:12:37 -03:00
Rekai Nyangadzayi Musuka c7f537959b fix: improper lifetime for *Arm7tdmi ptr in Bus 
*Arm7tdmi ptr is now assigned one scope up so that it lives as least
as long as Bus does
 2022-10-21 05:12:37 -03:00
Rekai Nyangadzayi Musuka c03c142b14 feat: implement ARM read open bus 2022-10-21 05:12:35 -03:00
Rekai Nyangadzayi Musuka f039c891c7 feat: Initial Implementation of DMA Audio 2022-10-21 05:12:33 -03:00
Rekai Nyangadzayi Musuka e69f4cfafe chore: tick scheduler on memory access 2022-10-21 05:12:33 -03:00
Rekai Nyangadzayi Musuka 601e717850 chore: reimplement bus read/writes 2022-10-21 05:12:33 -03:00
Rekai Nyangadzayi Musuka 20f39176c6 feat: minor performance improvements 2022-10-21 05:12:29 -03:00
Rekai Nyangadzayi Musuka 2d16e4a4e6 chore: move DMA and Timers from io to bus 2022-10-21 05:12:28 -03:00
Rekai Nyangadzayi Musuka 6723bfb364 feat: improve DMA Transfer support 2022-10-21 05:12:25 -03:00
Rekai Nyangadzayi Musuka 02572dd15c feat: DMA Transfer MVP 2022-10-21 05:12:23 -03:00
Rekai Nyangadzayi Musuka 4885a86833 chore(io): replace some bitfields with enums 2022-10-21 05:12:23 -03:00
Rekai Nyangadzayi Musuka 4d75d156e5 feat: pass retAddr.gba 2022-10-21 05:12:22 -03:00
Rekai Nyangadzayi Musuka d30a4d7ee5 feat: implement Hblank and Vcount Interrupts 
Also implemented unique behaviour when writing to IF
 2022-10-21 05:12:22 -03:00
Rekai Nyangadzayi Musuka acf1a10f91 chore: don't panic on 32-bit I/O 2022-10-21 05:12:21 -03:00
Rekai Nyangadzayi Musuka 606f9b959a chore: stub CPU HALTing 2022-10-21 05:12:21 -03:00
Rekai Nyangadzayi Musuka c143aefb01 chore(cpu): reimplement bank switching logic 2022-10-21 05:12:19 -03:00
Rekai Nyangadzayi Musuka f9e7128061 fix: properly decode format 11 instructions 2022-10-21 05:12:18 -03:00
Rekai Nyangadzayi Musuka 599a1f2973 chore: remove TODOs and some useless imports 2022-10-21 05:12:18 -03:00
Rekai Nyangadzayi Musuka 22424ca69c fix: improper condition check and initialization of register 2022-10-21 05:12:18 -03:00
Rekai Nyangadzayi Musuka 8006ca31e6 chore: remove unnecessary @as calls 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 06e20666bd chore: refactor ARMv4 decoding 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka 36687c5c67 chore: add more debug information to CPU panic method 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka dd9b20030a chore: give more descriptive panic messages when changing mode fails 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka c0db2a987b chore: clean up THUMB instruction decoding 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 271f42cf0e feat: rename ARM and THUMB SWI functions 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 01e15584da chore: group THUMB and select ARM instructions together (same file) 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 3e786d02ac fix(cpu): properly decode format 7 and 8 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka e6a0eab667 feat(cpu): implement THUMB format 17 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka 523b9d2736 feat(cpu): implement THUMB format11 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka c37546d273 chore: progress towards passing ldr/str thumb in armwrestler 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka 152dafbdf7 chore: use if-else when decoding THUMB instructions 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 85e0924669 feat: implement LDM/STM behaviour when S is set 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 696cc1b359 feat(cpu): decode and implement all necessary ARM CPU instructions 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 151de2eab4 feat(cpu): implement ARM SWP and SWPB 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka da681c946e feat(cpu): Implement Multiply Long ARM instructions 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka 7013389288 feat(cpu): implement format 18 THUMB instructions 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka 443520ecae chore: more detailed panic message 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka 96d7285111 feat(cpu): implement format 10 THUMB instructions 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka e1fec48a0e fix(cpu): properly decode multiply instructions 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka 0778ee8dd7 feat(cpu): implement ARM multiply instructions 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka eabf787305 fix(cpu): properly decode ldm stm thumb instructions 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka 980e4ff5dd fix(cpu): properly decode THUMB PUSH and POP at comptime 2022-10-21 05:12:06 -03:00