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247 Commits

Author SHA1 Message Date
Rekai Nyangadzayi Musuka 1ee8b51b2b chore: reimplement ARM LDM/STM 2022-10-21 05:12:17 -03:00
Rekai Nyangadzayi Musuka 130310e5cc chore: improve arm ldm/stm 2022-10-21 05:12:17 -03:00
Rekai Nyangadzayi Musuka e933d7e5c7 fix(cpu): force-align SWP reads and writes 2022-10-21 05:12:17 -03:00
Rekai Nyangadzayi Musuka 44e8b5b882 fix: force-align ARM STRH reads 2022-10-21 05:12:17 -03:00
Rekai Nyangadzayi Musuka 28361e8b7d fix: implement the same LDRSH logic as THUMB LDRSH 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 75921d6413 fix: PC is 12 ahead when it is rd in str and strb 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 17226d8f75 fix: listen to my past self 
By deleting this line I go from test 234 to test 355 in arm.gba
 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 2cb1bf834a chore: dont use std.mem.bytesToValue 
the stdlib accounts for endianness, which isn't something we want.
 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 8006ca31e6 chore: remove unnecessary @as calls 2022-10-21 05:12:16 -03:00
Rekai Nyangadzayi Musuka 82b92b4733 feat: pass thumb.gba 2022-10-21 05:12:15 -03:00
Rekai Nyangadzayi Musuka bf42d3ae2f chore: account for empty rlist in THUMB LDM/STM 2022-10-21 05:12:15 -03:00
Rekai Nyangadzayi Musuka f63ae76931 fix(cpu): handle edge case in LDRSH 2022-10-21 05:12:15 -03:00
Rekai Nyangadzayi Musuka f046787523 chore: reorganize util.zig 2022-10-21 05:12:15 -03:00
Rekai Nyangadzayi Musuka bbd73550e8 fix: zero initialize all allocated memory 2022-10-21 05:12:15 -03:00
Rekai Nyangadzayi Musuka 4776dc0788 Revert "fix: allow for 32-bit reads to KEYINPUT" 
This reverts commit 3a51707280.
 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka d8bd6da563 fix: resolve decoding mixup in THUMB format 8 instructions 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka b569a32170 fix: allow for 32-bit reads to KEYINPUT 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka 06e20666bd chore: refactor ARMv4 decoding 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka 36687c5c67 chore: add more debug information to CPU panic method 2022-10-21 05:12:14 -03:00
Rekai Nyangadzayi Musuka dd9b20030a chore: give more descriptive panic messages when changing mode fails 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka c0db2a987b chore: clean up THUMB instruction decoding 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka c3ff2ed6c1 feat: parse cartridge header 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 271f42cf0e feat: rename ARM and THUMB SWI functions 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 01e15584da chore: group THUMB and select ARM instructions together (same file) 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 17b91db2ef feat: integrate zig-clap with ZBA 2022-10-21 05:12:13 -03:00
Rekai Nyangadzayi Musuka 3e786d02ac fix(cpu): properly decode format 7 and 8 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka c8f2db69df fix(cpu): resolve edge cases in THUMB Format 5 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka b4e0682801 fix(cpu): allow for select values to overflow 
FuzzARM found these operations which panicked, when they should
have overflowed. These are now fixed

n = 8000
 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka af10c1b076 feat(cpu): implement format 13 
While bugs do exist, at this point all THUMB and ARMv4 instructions
have been implemented! Yay!
 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka e6a0eab667 feat(cpu): implement THUMB format 17 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka 523b9d2736 feat(cpu): implement THUMB format11 2022-10-21 05:12:12 -03:00
Rekai Nyangadzayi Musuka 011d2f2f2a chore: update to latest zig nightly 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka c37546d273 chore: progress towards passing ldr/str thumb in armwrestler 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka fbedebb938 fix(cpu): properly negate in NEG 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka 1773a3acc8 fix(cpu): reimplement THUMB offset shifts 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka 058c02150c fix(cpu): op == 0b00 decodes to add in format 5 2022-10-21 05:12:11 -03:00
Rekai Nyangadzayi Musuka 8d841ead50 fix(cpu): account for overflow in THUMB alu MUL 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 152dafbdf7 chore: use if-else when decoding THUMB instructions 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 7dbd2fc556 fix(cpu): account for rn in rlist in block data transfer 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 85e0924669 feat: implement LDM/STM behaviour when S is set 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 97919f646d feat(cpu): Pass all LDR/STR ARMwrestler tests 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 696cc1b359 feat(cpu): decode and implement all necessary ARM CPU instructions 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka 151de2eab4 feat(cpu): implement ARM SWP and SWPB 2022-10-21 05:12:10 -03:00
Rekai Nyangadzayi Musuka e7f6464564 fix: resolve off by n * 2 when accessing Palette during BG Mode 4 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka da681c946e feat(cpu): Implement Multiply Long ARM instructions 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka e0e43eece5 fix: no buttons are pressed by default 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka 7013389288 feat(cpu): implement format 18 THUMB instructions 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka 443520ecae chore: more detailed panic message 2022-10-21 05:12:09 -03:00
Rekai Nyangadzayi Musuka 96d7285111 feat(cpu): implement format 10 THUMB instructions 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka 7e6fc44191 feat(cpu): implement SWP 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka 9cb4ebaa7f fix(cpu): perform MUL with u64s, throw away upper 32 bits 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka 3e4d7e7ed8 feat: implement keyboard input 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka 3a6951d93d chore: don't panic on unsupported BG mode 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka 391096872e chore: tempoarily disable fps counter 2022-10-21 05:12:08 -03:00
Rekai Nyangadzayi Musuka eebf6fcae4 chore: zero-initialize VRAM 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka 8b7223cf35 chore: stub KeyInput I/O register 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka e1fec48a0e fix(cpu): properly decode multiply instructions 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka 0778ee8dd7 feat(cpu): implement ARM multiply instructions 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka 14d5160674 fix: allow 32-bit writes to DISPCNT 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka eabf787305 fix(cpu): properly decode ldm stm thumb instructions 2022-10-21 05:12:07 -03:00
Rekai Nyangadzayi Musuka 980e4ff5dd fix(cpu): properly decode THUMB PUSH and POP at comptime 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka 1ac193c506 fix(cpu): don't ignore 11th bit of THUMB BL offset 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka d6ed071bc6 feat(cpu): implement thumb push / pop and stub format 13 thumb instrs 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka a3d53d40fb feat(cpu): implement THUMB format 9 loads / stores 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka a17dfbe41f fix(cpu): resolve issues with unexpected PC value in THUMB 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka b9a81baa47 feat(cpu): implement THUMB ldmia stmia 2022-10-21 05:12:06 -03:00
Rekai Nyangadzayi Musuka 97b236225e chore: implement THUMB format 4 instructions 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka 8113146b86 chore: dedup code in THUMB instructions 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka e6625113db chore: refactor and genericize ARM data processing calculations 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka 2643504eb5 chore: relocate barrel_shifter zig file 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka f7518d1bab feat(cpu): implement format2 THUMB instructions 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka 800ca798cd feat(cpu): implement format19 THUMB instructions 2022-10-21 05:12:05 -03:00
Rekai Nyangadzayi Musuka d714ffb4f9 chore: account for THUMB BL instruction when mimicking mGBA logs 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka 7bc186a03c feat(cpu): implement format16 THUMB instructions 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka b94b87d186 feat(cpu): implement format 1 THUMB instructions 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka 0289be60ef fix: dont close file handle early 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka 93922b65e3 feat(cpu): implement format 6 THUMB instructions 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka c6608748c6 chore: rename title 2022-10-21 05:12:04 -03:00
Rekai Nyangadzayi Musuka 8e383d55d7 chore: refactor GBA Display Timings 
This change should reflect that the Hblank bit of DISPSTAT is toggled on all scanlines
while also ensuring that the Vblank bit is set on all Vblank scanlines
 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka 8926026b5b chore: move a single statement lol 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka 464479b986 chore: mark indexing methods as inline 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka de1c84914c feat: create emulator thread 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka 8e7766e694 chore: disable logging by default 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka 4858dbc5dc chore: revert fastboot changes 2022-10-21 05:12:03 -03:00
Rekai Nyangadzayi Musuka c4e131b92d chore: binary logging + file logging + DP chanes + fastBoot changes 2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka 2e54be76d6 chore: rename skipBios to fastBoot 2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka 7914268702 chore: set correct values for select banked registers on fast boot 2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka 4bdb85834c feat(cpu): implement SWI 2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka f89a37936f chore(bios): allow reading from BIOS 2022-10-21 05:12:02 -03:00
Rekai Nyangadzayi Musuka 8bb7ea6be6 fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka 60a1f7fa99 chore(cpu): implement behaviour for undefined test instruction 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka b3b8182f85 fix(cpu): fix PC offset when barrel shifter and bit 4 of DP is set 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka 56e660714c fix(cpu): implement S set + rd == 15 case for data processing 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka eb632056a2 feat(cpu): implement banked registers 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka fbc9de0335 fix(cpu): improve MRS and MSR instructions 2022-10-21 05:12:01 -03:00
Rekai Nyangadzayi Musuka 5c7539cd26 feat(cpu): implement CMN 2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka 7c20e5fdb5 fix(barrel_shifter): fix PC being 1 word ahead in barrel shifter 2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka f79e7126ee feat(cpu): Implement RSC 2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka 15e92bc6af feat(cpu): implement RSB 2022-10-21 05:12:00 -03:00
Rekai Nyangadzayi Musuka 47fc96fe00 feat(cpu): implement BIC 2022-10-21 05:12:00 -03:00