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chore: modify type signature of util.sext

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This commit is contained in:
Rekai Nyangadzayi Musuka
2022-05-23 12:58:31 -03:00
parent f130d1991c
commit ff3f79801c
5 changed files with 19 additions and 14 deletions
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2
src/cpu/arm/branch.zig
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@@ -10,7 +10,7 @@ pub fn branch(comptime L: bool) InstrFn {
return struct {
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
if (L) cpu.r[14] = cpu.r[15];
cpu.r[15] = cpu.fakePC() +% (sext(24, opcode) << 2);
cpu.r[15] = cpu.fakePC() +% (sext(u32, u24, opcode) << 2);
}
}.inner;
}

6
src/cpu/arm/half_signed_data_transfer.zig
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@@ -43,14 +43,14 @@ pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I:
},
0b10 => {
// LDRSB
result = sext(8, bus.read(u8, address));
result = sext(u32, u8, bus.read(u8, address));
},
0b11 => {
// LDRSH
result = if (address & 1 == 1) blk: {
break :blk sext(8, bus.read(u8, address));
break :blk sext(u32, u8, bus.read(u8, address));
} else blk: {
break :blk sext(16, bus.read(u16, address));
break :blk sext(u32, u16, bus.read(u16, address));
};
},
0b00 => unreachable, // SWP

6
src/cpu/thumb/branch.zig
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@@ -9,7 +9,7 @@ pub fn format16(comptime cond: u4) InstrFn {
return struct {
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
// B
const offset = sext(8, opcode & 0xFF) << 1;
const offset = sext(u32, u8, opcode & 0xFF) << 1;
const should_execute = switch (cond) {
0xE, 0xF => cpu.panic("[CPU/THUMB.16] Undefined conditional branch with condition {}", .{cond}),
@@ -27,7 +27,7 @@ pub fn format18() InstrFn {
return struct {
// B but conditional
fn inner(cpu: *Arm7tdmi, _: *Bus, opcode: u16) void {
const offset = sext(11, opcode & 0x7FF) << 1;
const offset = sext(u32, u11, opcode & 0x7FF) << 1;
cpu.r[15] = (cpu.r[15] + 2) +% offset;
}
}.inner;
@@ -47,7 +47,7 @@ pub fn format19(comptime is_low: bool) InstrFn {
cpu.r[14] = old_pc | 1;
} else {
// Instruction 1
cpu.r[14] = (cpu.r[15] + 2) +% (sext(11, offset) << 12);
cpu.r[14] = (cpu.r[15] + 2) +% (sext(u32, u11, offset) << 12);
}
}
}.inner;

6
src/cpu/thumb/data_transfer.zig
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@@ -36,7 +36,7 @@ pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
},
0b01 => {
// LDSB
cpu.r[rd] = sext(8, bus.read(u8, address));
cpu.r[rd] = sext(u32, u8, bus.read(u8, address));
},
0b10 => {
// LDRH
@@ -46,9 +46,9 @@ pub fn format78(comptime op: u2, comptime T: bool) InstrFn {
0b11 => {
// LDRSH
cpu.r[rd] = if (address & 1 == 1) blk: {
break :blk sext(8, bus.read(u8, address));
break :blk sext(u32, u8, bus.read(u8, address));
} else blk: {
break :blk sext(16, bus.read(u16, address));
break :blk sext(u32, u16, bus.read(u16, address));
};
},
}