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chore: conform to zig style guides

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This commit is contained in:
Rekai Nyangadzayi Musuka
2022-01-01 21:08:36 -06:00
parent f2cc0721c7
commit c40a1af534
9 changed files with 95 additions and 102 deletions
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99
src/cpu.zig
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@@ -7,10 +7,10 @@ const comptimeDataProcessing = @import("cpu/data_processing.zig").comptimeDataPr
const comptimeSingleDataTransfer = @import("cpu/single_data_transfer.zig").comptimeSingleDataTransfer;
const comptimeHalfSignedDataTransfer = @import("cpu/half_signed_data_transfer.zig").comptimeHalfSignedDataTransfer;
pub const InstrFn = fn (*ARM7TDMI, *Bus, u32) void;
const ARM_LUT: [0x1000]InstrFn = populate();
pub const InstrFn = fn (*Arm7tdmi, *Bus, u32) void;
const arm_lut: [0x1000]InstrFn = populate();
pub const ARM7TDMI = struct {
pub const Arm7tdmi = struct {
r: [16]u32,
sch: *Scheduler,
bus: *Bus,
@@ -27,11 +27,9 @@ pub const ARM7TDMI = struct {
pub inline fn step(self: *@This()) u64 {
const opcode = self.fetch();
std.debug.print("opcode: 0x{X:}\n", .{opcode}); // Debug
std.debug.print("R15: 0x{X:}\n", .{opcode}); // Debug
ARM_LUT[armIdx(opcode)](self, self.bus, opcode);
arm_lut[armIdx(opcode)](self, self.bus, opcode);
return 1;
}
@@ -52,43 +50,42 @@ fn armIdx(opcode: u32) u12 {
fn populate() [0x1000]InstrFn {
return comptime {
@setEvalBranchQuota(0x5000);
var lut = [_]InstrFn{undefined_instr} ** 0x1000;
@setEvalBranchQuota(0x5000); // TODO: Figure out exact size
var lut = [_]InstrFn{undefinedInstruction} ** 0x1000;
var i: usize = 0;
while (i < lut.len) : (i += 1) {
if (i >> 10 & 0x3 == 0b00) {
const I = i >> 9 & 0x01 == 0x01;
const S = i >> 4 & 0x01 == 0x01;
const instrKind = i >> 5 & 0x0F;
const I = i >> 9 & 1 == 1;
const S = i >> 4 & 1 == 1;
const instrKind = i >> 5 & 0xF;
lut[i] = comptimeDataProcessing(I, S, instrKind);
}
if (i >> 9 & 0x7 == 0b000 and i >> 3 & 0x01 == 0x01 and i & 0x01 == 0x01) {
// Halfword and Signed Data Transfer with register offset
const P = i >> 8 & 0x01 == 0x01;
const U = i >> 7 & 0x01 == 0x01;
const I = i >> 6 & 0x01 == 0x01;
const W = i >> 5 & 0x01 == 0x01;
const L = i >> 4 & 0x01 == 0x01;
if (i >> 9 & 0x7 == 0b000 and i >> 3 & 1 == 1 and i & 1 == 1) {
const P = i >> 8 & 1 == 1;
const U = i >> 7 & 1 == 1;
const I = i >> 6 & 1 == 1;
const W = i >> 5 & 1 == 1;
const L = i >> 4 & 1 == 1;
lut[i] = comptimeHalfSignedDataTransfer(P, U, I, W, L);
}
if (i >> 10 & 0x3 == 0b01) {
const I = i >> 9 & 0x01 == 0x01;
const P = i >> 8 & 0x01 == 0x01;
const U = i >> 7 & 0x01 == 0x01;
const B = i >> 6 & 0x01 == 0x01;
const W = i >> 5 & 0x01 == 0x01;
const L = i >> 4 & 0x01 == 0x01;
const I = i >> 9 & 1 == 1;
const P = i >> 8 & 1 == 1;
const U = i >> 7 & 1 == 1;
const B = i >> 6 & 1 == 1;
const W = i >> 5 & 1 == 1;
const L = i >> 4 & 1 == 1;
lut[i] = comptimeSingleDataTransfer(I, P, U, B, W, L);
}
if (i >> 9 & 0x7 == 0b101) {
const L = i >> 8 & 0x01 == 0x01;
const L = i >> 8 & 1 == 1;
lut[i] = comptimeBranch(L);
}
}
@@ -101,70 +98,70 @@ const CPSR = struct {
inner: u32,
pub fn n(self: *const @This()) bool {
return self.inner >> 31 & 0x01 == 0x01;
return self.inner >> 31 & 1 == 1;
}
pub fn set_n(self: *@This(), set: bool) void {
self.set_bit(31, set);
pub fn setN(self: *@This(), set: bool) void {
self.setBit(31, set);
}
pub fn z(self: *const @This()) bool {
return self.inner >> 30 & 0x01 == 0x01;
return self.inner >> 30 & 1 == 1;
}
pub fn set_z(self: *@This(), set: bool) void {
self.set_bit(30, set);
pub fn setZ(self: *@This(), set: bool) void {
self.setBit(30, set);
}
pub fn c(self: *const @This()) bool {
return self.inner >> 29 & 0x01 == 0x01;
return self.inner >> 29 & 1 == 1;
}
pub fn set_c(self: *@This(), set: bool) void {
self.set_bit(29, set);
pub fn setC(self: *@This(), set: bool) void {
self.setBit(29, set);
}
pub fn v(self: *const @This()) bool {
return self.inner >> 28 & 0x01 == 0x01;
return self.inner >> 28 & 1 == 1;
}
pub fn set_v(self: *@This(), set: bool) void {
self.set_bit(28, set);
pub fn setV(self: *@This(), set: bool) void {
self.setBit(28, set);
}
pub fn i(self: *const @This()) bool {
return self.inner >> 7 & 0x01 == 0x01;
return self.inner >> 7 & 1 == 1;
}
pub fn set_i(self: *@This(), set: bool) void {
self.set_bit(7, set);
pub fn setI(self: *@This(), set: bool) void {
self.setBit(7, set);
}
pub fn f(self: *const @This()) bool {
return self.inner >> 6 & 0x01 == 0x01;
return self.inner >> 6 & 1 == 1;
}
pub fn set_f(self: *@This(), set: bool) void {
self.set_bit(6, set);
pub fn setF(self: *@This(), set: bool) void {
self.setBit(6, set);
}
pub fn t(self: *const @This()) bool {
return self.inner >> 5 & 0x01 == 0x01;
return self.inner >> 5 & 1 == 1;
}
pub fn set_t(self: *@This(), set: bool) void {
self.set_bit(5, set);
pub fn setT(self: *@This(), set: bool) void {
self.setBit(5, set);
}
pub fn mode(self: *const @This()) Mode {
return self.inner & 0x1F;
}
pub fn set_mode(_: *@This(), _: Mode) void {
pub fn setMode(_: *@This(), _: Mode) void {
std.debug.panic("TODO: Implement set_mode for CPSR", .{});
}
fn set_bit(self: *@This(), comptime bit: usize, set: bool) void {
fn setBit(self: *@This(), comptime bit: usize, set: bool) void {
const set_val = @as(u32, @boolToInt(set)) << bit;
const mask = ~(@as(u32, 1) << bit);
@@ -182,14 +179,14 @@ const Mode = enum(u5) {
System = 0b11111,
};
fn undefined_instr(_: *ARM7TDMI, _: *Bus, opcode: u32) void {
fn undefinedInstruction(_: *Arm7tdmi, _: *Bus, opcode: u32) void {
const id = armIdx(opcode);
std.debug.panic("[0x{X:}] 0x{X:} is an illegal opcode", .{ id, opcode });
}
fn comptimeBranch(comptime L: bool) InstrFn {
return struct {
fn branch(cpu: *ARM7TDMI, _: *Bus, opcode: u32) void {
fn branch(cpu: *Arm7tdmi, _: *Bus, opcode: u32) void {
if (L) {
cpu.r[14] = cpu.r[15] - 4;
}