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fix(cpu): fix PC offset when barrel shifter and bit 4 of DP is set

This commit is contained in:
Rekai Nyangadzayi Musuka 2022-10-21 05:12:01 -03:00
parent 19094b492e
commit b3b8182f85
2 changed files with 7 additions and 1 deletions
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2
src/cpu/arm/barrel_shifter.zig
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@ -19,7 +19,7 @@ fn registerShift(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
const rs = @truncate(u8, cpu.r[rs_idx]);
const rm_idx = opcode & 0xF;
const rm = if (rm_idx == 0xF) cpu.fakePC() + 4 else cpu.r[rm_idx];
const rm = if (rm_idx == 0xF) cpu.fakePC() else cpu.r[rm_idx];
return switch (@truncate(u2, opcode >> 5)) {
0b00 => logicalLeft(S, &cpu.cpsr, rm, rs),

6
src/cpu/arm/data_processing.zig
View File

@ -12,6 +12,9 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
const rn = opcode >> 16 & 0xF;
const old_carry = @boolToInt(cpu.cpsr.c.read());
// If certain conditions are met, PC is 12 ahead instead of 8
if (!I and opcode >> 4 & 1 == 1) cpu.r[15] += 4;
const op1 = if (rn == 0xF) cpu.fakePC() else cpu.r[rn];
var op2: u32 = undefined;
@ -22,6 +25,9 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
op2 = shifter.execute(S, cpu, opcode);
}
// Undo special condition from above
if (!I and opcode >> 4 & 1 == 1) cpu.r[15] -= 4;
switch (instrKind) {
0x0 => {
// AND