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chore: rewrite read/write methods for remainig Bus devices

This commit is contained in:
Rekai Nyangadzayi Musuka 2022-04-08 01:18:58 -03:00
parent 5310c12669
commit aac01b0bfe
7 changed files with 176 additions and 163 deletions
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72
src/Bus.zig
View File

@ -54,20 +54,20 @@ pub fn deinit(self: Self) void {
pub fn read32(self: *const Self, addr: u32) u32 { pub fn read32(self: *const Self, addr: u32) u32 {
return switch (addr) { return switch (addr) {
// General Internal Memory // General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get32(addr), 0x0000_0000...0x0000_3FFF => self.bios.read(u32, addr),
0x0200_0000...0x02FF_FFFF => self.ewram.get32(addr & 0x3FFFF), 0x0200_0000...0x02FF_FFFF => self.ewram.read(u32, addr),
0x0300_0000...0x03FF_FFFF => self.iwram.get32(addr & 0x7FFF), 0x0300_0000...0x03FF_FFFF => self.iwram.read(u32, addr),
0x0400_0000...0x0400_03FE => io.read32(self, addr), 0x0400_0000...0x0400_03FE => io.read32(self, addr),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.get32(addr & 0x3FF), 0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u32, addr),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u32, addr), 0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u32, addr),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.get32(addr & 0x3FF), 0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u32, addr),
// External Memory (Game Pak) // External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get32(addr - 0x0800_0000), 0x0800_0000...0x09FF_FFFF => self.pak.read(u32, addr),
0x0A00_0000...0x0BFF_FFFF => self.pak.get32(addr - 0x0A00_0000), 0x0A00_0000...0x0BFF_FFFF => self.pak.read(u32, addr),
0x0C00_0000...0x0DFF_FFFF => self.pak.get32(addr - 0x0C00_0000), 0x0C00_0000...0x0DFF_FFFF => self.pak.read(u32, addr),
else => undRead("Tried to read from 0x{X:0>8}", .{addr}), else => undRead("Tried to read from 0x{X:0>8}", .{addr}),
}; };
@ -78,14 +78,14 @@ pub fn write32(self: *Self, addr: u32, word: u32) void {
switch (addr) { switch (addr) {
// General Internal Memory // General Internal Memory
0x0200_0000...0x02FF_FFFF => self.ewram.set32(addr & 0x3FFFF, word), 0x0200_0000...0x02FF_FFFF => self.ewram.write(u32, addr, word),
0x0300_0000...0x03FF_FFFF => self.iwram.set32(addr & 0x7FFF, word), 0x0300_0000...0x03FF_FFFF => self.iwram.write(u32, addr, word),
0x0400_0000...0x0400_03FE => io.write32(self, addr, word), 0x0400_0000...0x0400_03FE => io.write32(self, addr, word),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.set32(addr & 0x3FF, word), 0x0500_0000...0x05FF_FFFF => self.ppu.palette.write(u32, addr, word),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u32, addr, word), 0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u32, addr, word),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.set32(addr & 0x3FF, word), 0x0700_0000...0x07FF_FFFF => self.ppu.oam.write(u32, addr, word),
else => undWrite("Tried to write 0x{X:0>8} to 0x{X:0>8}", .{ word, addr }), else => undWrite("Tried to write 0x{X:0>8} to 0x{X:0>8}", .{ word, addr }),
} }
@ -94,20 +94,20 @@ pub fn write32(self: *Self, addr: u32, word: u32) void {
pub fn read16(self: *const Self, addr: u32) u16 { pub fn read16(self: *const Self, addr: u32) u16 {
return switch (addr) { return switch (addr) {
// General Internal Memory // General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get16(addr), 0x0000_0000...0x0000_3FFF => self.bios.read(u16, addr),
0x0200_0000...0x02FF_FFFF => self.ewram.get16(addr & 0x3FFFF), 0x0200_0000...0x02FF_FFFF => self.ewram.read(u16, addr),
0x0300_0000...0x03FF_FFFF => self.iwram.get16(addr & 0x7FFF), 0x0300_0000...0x03FF_FFFF => self.iwram.read(u16, addr),
0x0400_0000...0x0400_03FE => io.read16(self, addr), 0x0400_0000...0x0400_03FE => io.read16(self, addr),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.get16(addr & 0x3FF), 0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u16, addr),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u16, addr), 0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u16, addr),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.get16(addr & 0x3FF), 0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u16, addr),
// External Memory (Game Pak) // External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get16(addr - 0x0800_0000), 0x0800_0000...0x09FF_FFFF => self.pak.read(u16, addr),
0x0A00_0000...0x0BFF_FFFF => self.pak.get16(addr - 0x0A00_0000), 0x0A00_0000...0x0BFF_FFFF => self.pak.read(u16, addr),
0x0C00_0000...0x0DFF_FFFF => self.pak.get16(addr - 0x0C00_0000), 0x0C00_0000...0x0DFF_FFFF => self.pak.read(u16, addr),
else => undRead("Tried to read from 0x{X:0>8}", .{addr}), else => undRead("Tried to read from 0x{X:0>8}", .{addr}),
}; };
@ -117,14 +117,14 @@ pub fn write16(self: *Self, addr: u32, halfword: u16) void {
// TODO: write16 can write to GamePak Flash // TODO: write16 can write to GamePak Flash
switch (addr) { switch (addr) {
// General Internal Memory // General Internal Memory
0x0200_0000...0x02FF_FFFF => self.ewram.set16(addr & 0x3FFFF, halfword), 0x0200_0000...0x02FF_FFFF => self.ewram.write(u16, addr, halfword),
0x0300_0000...0x03FF_FFFF => self.iwram.set16(addr & 0x7FFF, halfword), 0x0300_0000...0x03FF_FFFF => self.iwram.write(u16, addr, halfword),
0x0400_0000...0x0400_03FE => io.write16(self, addr, halfword), 0x0400_0000...0x0400_03FE => io.write16(self, addr, halfword),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.set16(addr & 0x3FF, halfword), 0x0500_0000...0x05FF_FFFF => self.ppu.palette.write(u16, addr, halfword),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u16, addr, halfword), 0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u16, addr, halfword),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.set16(addr & 0x3FF, halfword), 0x0700_0000...0x07FF_FFFF => self.ppu.oam.write(u16, addr, halfword),
0x0800_00C4, 0x0800_00C6, 0x0800_00C8 => log.warn("Tried to write 0x{X:0>4} to GPIO", .{halfword}), 0x0800_00C4, 0x0800_00C6, 0x0800_00C8 => log.warn("Tried to write 0x{X:0>4} to GPIO", .{halfword}),
else => undWrite("Tried to write 0x{X:0>4} to 0x{X:0>8}", .{ halfword, addr }), else => undWrite("Tried to write 0x{X:0>4} to 0x{X:0>8}", .{ halfword, addr }),
@ -134,21 +134,21 @@ pub fn write16(self: *Self, addr: u32, halfword: u16) void {
pub fn read8(self: *const Self, addr: u32) u8 { pub fn read8(self: *const Self, addr: u32) u8 {
return switch (addr) { return switch (addr) {
// General Internal Memory // General Internal Memory
0x0000_0000...0x0000_3FFF => self.bios.get8(addr), 0x0000_0000...0x0000_3FFF => self.bios.read(u8, addr),
0x0200_0000...0x02FF_FFFF => self.ewram.get8(addr & 0x3FFFF), 0x0200_0000...0x02FF_FFFF => self.ewram.read(u8, addr),
0x0300_0000...0x03FF_FFFF => self.iwram.get8(addr & 0x7FFF), 0x0300_0000...0x03FF_FFFF => self.iwram.read(u8, addr),
0x0400_0000...0x0400_03FE => io.read8(self, addr), 0x0400_0000...0x0400_03FE => io.read8(self, addr),
// Internal Display Memory // Internal Display Memory
0x0500_0000...0x05FF_FFFF => self.ppu.palette.get8(addr & 0x3FF), 0x0500_0000...0x05FF_FFFF => self.ppu.palette.read(u8, addr),
0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u8, addr), 0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u8, addr),
0x0700_0000...0x07FF_FFFF => self.ppu.oam.get8(addr & 0x3FF), 0x0700_0000...0x07FF_FFFF => self.ppu.oam.read(u8, addr),
// External Memory (Game Pak) // External Memory (Game Pak)
0x0800_0000...0x09FF_FFFF => self.pak.get8(addr - 0x0800_0000), 0x0800_0000...0x09FF_FFFF => self.pak.read(u8, addr),
0x0A00_0000...0x0BFF_FFFF => self.pak.get8(addr - 0x0A00_0000), 0x0A00_0000...0x0BFF_FFFF => self.pak.read(u8, addr),
0x0C00_0000...0x0DFF_FFFF => self.pak.get8(addr - 0x0C00_0000), 0x0C00_0000...0x0DFF_FFFF => self.pak.read(u8, addr),
0x0E00_0000...0x0E00_FFFF => self.pak.backup.get8(addr & 0xFFFF), 0x0E00_0000...0x0E00_FFFF => self.pak.backup.read(addr),
else => undRead("Tried to read from 0x{X:0>2}", .{addr}), else => undRead("Tried to read from 0x{X:0>2}", .{addr}),
}; };
@ -157,13 +157,13 @@ pub fn read8(self: *const Self, addr: u32) u8 {
pub fn write8(self: *Self, addr: u32, byte: u8) void { pub fn write8(self: *Self, addr: u32, byte: u8) void {
switch (addr) { switch (addr) {
// General Internal Memory // General Internal Memory
0x0200_0000...0x02FF_FFFF => self.ewram.set8(addr & 0x3FFFF, byte), 0x0200_0000...0x02FF_FFFF => self.ewram.write(u8, addr, byte),
0x0300_0000...0x03FF_FFFF => self.iwram.set8(addr & 0x7FFF, byte), 0x0300_0000...0x03FF_FFFF => self.iwram.write(u8, addr, byte),
0x0400_0000...0x0400_03FE => io.write8(self, addr, byte), 0x0400_0000...0x0400_03FE => io.write8(self, addr, byte),
0x0400_0410 => log.info("Ignored write of 0x{X:0>2} to 0x{X:0>8}", .{ byte, addr }), 0x0400_0410 => log.info("Ignored write of 0x{X:0>2} to 0x{X:0>8}", .{ byte, addr }),
// External Memory (Game Pak) // External Memory (Game Pak)
0x0E00_0000...0x0E00_FFFF => self.pak.backup.set8(addr & 0xFFFF, byte), 0x0E00_0000...0x0E00_FFFF => self.pak.backup.write(addr, byte),
else => undWrite("Tried to write 0x{X:0>2} to 0x{X:0>8}", .{ byte, addr }), else => undWrite("Tried to write 0x{X:0>2} to 0x{X:0>8}", .{ byte, addr }),
} }
} }

28
src/bus/Bios.zig
View File

@ -26,23 +26,15 @@ pub fn deinit(self: Self) void {
if (self.buf) |buf| self.alloc.free(buf); if (self.buf) |buf| self.alloc.free(buf);
} }
pub fn get32(self: *const Self, idx: usize) u32 { pub fn read(self: *const Self, comptime T: type, addr: usize) T {
if (self.buf) |buf| if (self.buf) |buf| {
return (@as(u32, buf[idx + 3]) << 24) | (@as(u32, buf[idx + 2]) << 16) | (@as(u32, buf[idx + 1]) << 8) | (@as(u32, buf[idx])); return switch (T) {
u32 => (@as(u32, buf[addr + 3]) << 24) | (@as(u32, buf[addr + 2]) << 16) | (@as(u32, buf[addr + 1]) << 8) | (@as(u32, buf[addr])),
u16 => (@as(u16, buf[addr + 1]) << 8) | @as(u16, buf[addr]),
u8 => buf[addr],
else => @compileError("BIOS: Unsupported read width"),
};
}
std.debug.panic("[CPU/BIOS:32] ZBA tried to read from 0x{X:0>8} but no BIOS was provided.", .{idx}); std.debug.panic("[BIOS] ZBA tried to read {} from 0x{X:0>8} but not BIOS was present", .{ T, addr });
}
pub fn get16(self: *const Self, idx: usize) u16 {
if (self.buf) |buf|
return (@as(u16, buf[idx + 1]) << 8) | @as(u16, buf[idx]);
std.debug.panic("[CPU/BIOS:16] ZBA tried to read from 0x{X:0>8} but no BIOS was provided.", .{idx});
}
pub fn get8(self: *const Self, idx: usize) u8 {
if (self.buf) |buf|
return buf[idx];
std.debug.panic("[CPU/BIOS:8] ZBA tried to read from 0x{X:0>8} but no BIOS was provided.", .{idx});
} }

46
src/bus/Ewram.zig
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@ -20,28 +20,32 @@ pub fn deinit(self: Self) void {
self.alloc.free(self.buf); self.alloc.free(self.buf);
} }
pub fn get32(self: *const Self, idx: usize) u32 { pub fn read(self: *const Self, comptime T: type, address: usize) T {
return (@as(u32, self.get16(idx + 2)) << 16) | @as(u32, self.get16(idx)); const addr = address & 0x3FFFF;
return switch (T) {
u32 => (@as(u32, self.buf[addr + 3]) << 24) | (@as(u32, self.buf[addr + 2]) << 16) | (@as(u32, self.buf[addr + 1]) << 8) | (@as(u32, self.buf[addr])),
u16 => (@as(u16, self.buf[addr + 1]) << 8) | @as(u16, self.buf[addr]),
u8 => self.buf[addr],
else => @compileError("EWRAM: Unsupported read width"),
};
} }
pub fn set32(self: *Self, idx: usize, word: u32) void { pub fn write(self: *const Self, comptime T: type, address: usize, value: T) void {
self.set16(idx + 2, @truncate(u16, word >> 16)); const addr = address & 0x3FFFF;
self.set16(idx, @truncate(u16, word));
}
pub fn get16(self: *const Self, idx: usize) u16 { return switch (T) {
return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]); u32 => {
} self.buf[addr + 3] = @truncate(u8, value >> 24);
self.buf[addr + 2] = @truncate(u8, value >> 16);
pub fn set16(self: *Self, idx: usize, halfword: u16) void { self.buf[addr + 1] = @truncate(u8, value >> 8);
self.buf[idx + 1] = @truncate(u8, halfword >> 8); self.buf[addr + 0] = @truncate(u8, value >> 0);
self.buf[idx] = @truncate(u8, halfword); },
} u16 => {
self.buf[addr + 1] = @truncate(u8, value >> 8);
pub fn get8(self: *const Self, idx: usize) u8 { self.buf[addr + 0] = @truncate(u8, value >> 0);
return self.buf[idx]; },
} u8 => self.buf[addr] = value,
else => @compileError("EWRAM: Unsupported write width"),
pub fn set8(self: *Self, idx: usize, byte: u8) void { };
self.buf[idx] = byte;
} }

17
src/bus/GamePak.zig
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@ -60,14 +60,13 @@ pub fn deinit(self: Self) void {
self.backup.deinit(); self.backup.deinit();
} }
pub fn get32(self: *const Self, idx: usize) u32 { pub fn read(self: *const Self, comptime T: type, address: u32) T {
return (@as(u32, self.get16(idx + 2)) << 16) | @as(u32, self.get16(idx)); const addr = address & 0x1FF_FFFF;
}
pub fn get16(self: *const Self, idx: usize) u16 { return switch (T) {
return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]); u32 => (@as(T, self.buf[addr + 3]) << 24) | (@as(T, self.buf[addr + 2]) << 16) | (@as(T, self.buf[addr + 1]) << 8) | (@as(T, self.buf[addr])),
} u16 => (@as(T, self.buf[addr + 1]) << 8) | @as(T, self.buf[addr]),
u8 => self.buf[addr],
pub fn get8(self: *const Self, idx: usize) u8 { else => @compileError("GamePak: Unsupported read width"),
return self.buf[idx]; };
} }

48
src/bus/Iwram.zig
View File

@ -20,30 +20,32 @@ pub fn deinit(self: Self) void {
self.alloc.free(self.buf); self.alloc.free(self.buf);
} }
pub fn get32(self: *const Self, idx: usize) u32 { pub fn read(self: *const Self, comptime T: type, address: usize) T {
return (@as(u32, self.buf[idx + 3]) << 24) | (@as(u32, self.buf[idx + 2]) << 16) | (@as(u32, self.buf[idx + 1]) << 8) | (@as(u32, self.buf[idx])); const addr = address & 0x7FFF;
return switch (T) {
u32 => (@as(u32, self.buf[addr + 3]) << 24) | (@as(u32, self.buf[addr + 2]) << 16) | (@as(u32, self.buf[addr + 1]) << 8) | (@as(u32, self.buf[addr])),
u16 => (@as(u16, self.buf[addr + 1]) << 8) | @as(u16, self.buf[addr]),
u8 => self.buf[addr],
else => @compileError("IWRAM: Unsupported read width"),
};
} }
pub fn set32(self: *Self, idx: usize, word: u32) void { pub fn write(self: *const Self, comptime T: type, address: usize, value: T) void {
self.buf[idx + 3] = @truncate(u8, word >> 24); const addr = address & 0x7FFF;
self.buf[idx + 2] = @truncate(u8, word >> 16);
self.buf[idx + 1] = @truncate(u8, word >> 8);
self.buf[idx] = @truncate(u8, word);
}
pub fn get16(self: *const Self, idx: usize) u16 { return switch (T) {
return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]); u32 => {
} self.buf[addr + 3] = @truncate(u8, value >> 24);
self.buf[addr + 2] = @truncate(u8, value >> 16);
pub fn set16(self: *Self, idx: usize, halfword: u16) void { self.buf[addr + 1] = @truncate(u8, value >> 8);
self.buf[idx + 1] = @truncate(u8, halfword >> 8); self.buf[addr + 0] = @truncate(u8, value >> 0);
self.buf[idx] = @truncate(u8, halfword); },
} u16 => {
self.buf[addr + 1] = @truncate(u8, value >> 8);
pub fn get8(self: *const Self, idx: usize) u8 { self.buf[addr + 0] = @truncate(u8, value >> 0);
return self.buf[idx]; },
} u8 => self.buf[addr] = value,
else => @compileError("IWRAM: Unsupported write width"),
pub fn set8(self: *Self, idx: usize, byte: u8) void { };
self.buf[idx] = byte;
} }

30
src/bus/backup.zig
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@ -115,38 +115,42 @@ pub const Backup = struct {
} }
} }
pub fn get8(self: *const Self, idx: usize) u8 { pub fn read(self: *const Self, address: usize) u8 {
const addr = address & 0xFFFF;
switch (self.kind) { switch (self.kind) {
.Flash => { .Flash => {
switch (idx) { switch (addr) {
0x0000 => if (self.flash.id_mode) return 0x32, // Panasonic manufacturer ID 0x0000 => if (self.flash.id_mode) return 0x32, // Panasonic manufacturer ID
0x0001 => if (self.flash.id_mode) return 0x1B, // Panasonic device ID 0x0001 => if (self.flash.id_mode) return 0x1B, // Panasonic device ID
else => {}, else => {},
} }
return self.flash.read(self.buf, idx); return self.flash.read(self.buf, addr);
}, },
.Flash1M => { .Flash1M => {
switch (idx) { switch (addr) {
0x0000 => if (self.flash.id_mode) return 0x62, // Sanyo manufacturer ID 0x0000 => if (self.flash.id_mode) return 0x62, // Sanyo manufacturer ID
0x0001 => if (self.flash.id_mode) return 0x13, // Sanyo device ID 0x0001 => if (self.flash.id_mode) return 0x13, // Sanyo device ID
else => {}, else => {},
} }
return self.flash.read(self.buf, idx); return self.flash.read(self.buf, addr);
}, },
.Eeprom => return self.buf[idx], .Eeprom => return self.buf[addr],
.Sram => return self.buf[idx & 0x7FFF], // 32K SRAM chip is mirrored .Sram => return self.buf[addr & 0x7FFF], // 32K SRAM chip is mirrored
} }
} }
pub fn set8(self: *Self, idx: usize, byte: u8) void { pub fn write(self: *Self, address: usize, byte: u8) void {
const addr = address & 0xFFFF;
switch (self.kind) { switch (self.kind) {
.Flash, .Flash1M => { .Flash, .Flash1M => {
if (self.flash.prep_write) return self.flash.write(self.buf, idx, byte); if (self.flash.prep_write) return self.flash.write(self.buf, addr, byte);
if (self.flash.shouldEraseSector(idx, byte)) return self.flash.eraseSector(self.buf, idx); if (self.flash.shouldEraseSector(addr, byte)) return self.flash.eraseSector(self.buf, addr);
switch (idx) { switch (addr) {
0x0000 => if (self.kind == .Flash1M and self.flash.set_bank) { 0x0000 => if (self.kind == .Flash1M and self.flash.set_bank) {
self.flash.bank = @truncate(u1, byte); self.flash.bank = @truncate(u1, byte);
}, },
@ -165,8 +169,8 @@ pub const Backup = struct {
else => {}, else => {},
} }
}, },
.Eeprom => self.buf[idx] = byte, .Eeprom => self.buf[addr] = byte,
.Sram => self.buf[idx & 0x7FFF] = byte, .Sram => self.buf[addr & 0x7FFF] = byte,
} }
} }
}; };

98
src/ppu.zig
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@ -92,11 +92,11 @@ pub const Ppu = struct {
search: while (i < self.oam.buf.len) : (i += 8) { search: while (i < self.oam.buf.len) : (i += 8) {
// Attributes in OAM are 6 bytes long, with 2 bytes of padding // Attributes in OAM are 6 bytes long, with 2 bytes of padding
// Grab Attributes from OAM // Grab Attributes from OAM
const attr0 = @bitCast(Attr0, self.oam.get16(i)); const attr0 = @bitCast(Attr0, self.oam.read(u16, i));
// Only consider enabled Sprites // Only consider enabled Sprites
if (!attr0.disabled.read()) { if (!attr0.disabled.read()) {
const attr1 = @bitCast(Attr1, self.oam.get16(i + 2)); const attr1 = @bitCast(Attr1, self.oam.read(u16, i + 2));
// When fetching sprites we only care about ones that could be rendered // When fetching sprites we only care about ones that could be rendered
// on this scanline // on this scanline
@ -113,7 +113,7 @@ pub const Ppu = struct {
if ((start <= y and y < end) or (istart <= iy and iy < iend)) { if ((start <= y and y < end) or (istart <= iy and iy < iend)) {
for (self.scanline_sprites) |*maybe_sprite| { for (self.scanline_sprites) |*maybe_sprite| {
if (maybe_sprite.* == null) { if (maybe_sprite.* == null) {
maybe_sprite.* = Sprite.init(attr0, attr1, @bitCast(Attr2, self.oam.get16(i + 4))); maybe_sprite.* = Sprite.init(attr0, attr1, @bitCast(Attr2, self.oam.read(u16, i + 4)));
continue :search; continue :search;
} }
} }
@ -205,7 +205,7 @@ pub const Ppu = struct {
} else tile; } else tile;
// Sprite Palette starts at 0x0500_0200 // Sprite Palette starts at 0x0500_0200
if (pal_id != 0) self.scanline_buf[@bitCast(u9, x)] = self.palette.get16(0x200 + pal_id * 2); if (pal_id != 0) self.scanline_buf[@bitCast(u9, x)] = self.palette.read(u16, 0x200 + pal_id * 2);
} }
fn drawBackround(self: *Self, comptime n: u3) void { fn drawBackround(self: *Self, comptime n: u3) void {
@ -266,7 +266,7 @@ pub const Ppu = struct {
break :blk pal_bank | nybble_tile; break :blk pal_bank | nybble_tile;
} else tile; } else tile;
if (pal_id != 0) self.scanline_buf[i] = self.palette.get16(pal_id * 2); if (pal_id != 0) self.scanline_buf[i] = self.palette.read(u16, pal_id * 2);
} }
} }
@ -321,7 +321,7 @@ pub const Ppu = struct {
// Render Current Scanline // Render Current Scanline
for (self.vram.buf[vram_base .. vram_base + width]) |byte, i| { for (self.vram.buf[vram_base .. vram_base + width]) |byte, i| {
const pal_id = @as(u16, byte) * @sizeOf(u16); const pal_id = @as(u16, byte) * @sizeOf(u16);
const bgr555 = self.palette.get16(pal_id); const bgr555 = self.palette.read(u16, pal_id);
std.mem.copy(u8, self.framebuf[fb_base + i * @sizeOf(u32) ..][0..4], &intToBytes(u32, toRgba8888(bgr555))); std.mem.copy(u8, self.framebuf[fb_base + i * @sizeOf(u32) ..][0..4], &intToBytes(u32, toRgba8888(bgr555)));
} }
@ -432,30 +432,37 @@ const Palette = struct {
self.alloc.free(self.buf); self.alloc.free(self.buf);
} }
pub fn get32(self: *const Self, idx: usize) u32 { pub fn read(self: *const Self, comptime T: type, address: usize) T {
return (@as(u32, self.get16(idx + 2)) << 16) | @as(u32, self.get16(idx)); const addr = address & 0x3FF;
return switch (T) {
u32 => (@as(T, self.buf[addr + 3]) << 24) | (@as(T, self.buf[addr + 2]) << 16) | (@as(T, self.buf[addr + 1]) << 8) | (@as(T, self.buf[addr])),
u16 => (@as(T, self.buf[addr + 1]) << 8) | @as(T, self.buf[addr]),
u8 => self.buf[addr],
else => @compileError("PALRAM: Unsupported read width"),
};
} }
pub fn set32(self: *Self, idx: usize, word: u32) void { pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
self.set16(idx + 2, @truncate(u16, word >> 16)); const addr = address & 0x3FF;
self.set16(idx, @truncate(u16, word));
}
pub fn get16(self: *const Self, idx: usize) u16 { switch (T) {
return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]); u32 => {
} self.buf[addr + 3] = @truncate(u8, value >> 24);
self.buf[addr + 2] = @truncate(u8, value >> 16);
pub fn set16(self: *Self, idx: usize, halfword: u16) void { self.buf[addr + 1] = @truncate(u8, value >> 8);
self.buf[idx + 1] = @truncate(u8, halfword >> 8); self.buf[addr + 0] = @truncate(u8, value >> 0);
self.buf[idx] = @truncate(u8, halfword); },
} u16 => {
self.buf[addr + 1] = @truncate(u8, value >> 8);
pub fn get8(self: *const Self, idx: usize) u8 { self.buf[addr + 0] = @truncate(u8, value >> 0);
return self.buf[idx]; },
else => @compileError("PALRAM: Unsupported write width"),
}
} }
fn getBackdrop(self: *const Self) u16 { fn getBackdrop(self: *const Self) u16 {
return self.get16(0); return self.read(u16, 0);
} }
}; };
@ -534,28 +541,33 @@ const Oam = struct {
self.alloc.free(self.buf); self.alloc.free(self.buf);
} }
pub fn get32(self: *const Self, idx: usize) u32 { pub fn read(self: *const Self, comptime T: type, address: usize) T {
return (@as(u32, self.buf[idx + 3]) << 24) | (@as(u32, self.buf[idx + 2]) << 16) | (@as(u32, self.buf[idx + 1]) << 8) | (@as(u32, self.buf[idx])); const addr = address & 0x3FF;
return switch (T) {
u32 => (@as(T, self.buf[addr + 3]) << 24) | (@as(T, self.buf[addr + 2]) << 16) | (@as(T, self.buf[addr + 1]) << 8) | (@as(T, self.buf[addr])),
u16 => (@as(T, self.buf[addr + 1]) << 8) | @as(T, self.buf[addr]),
u8 => self.buf[addr],
else => @compileError("OAM: Unsupported read width"),
};
} }
pub fn set32(self: *Self, idx: usize, word: u32) void { pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
self.buf[idx + 3] = @truncate(u8, word >> 24); const addr = address & 0x3FF;
self.buf[idx + 2] = @truncate(u8, word >> 16);
self.buf[idx + 1] = @truncate(u8, word >> 8);
self.buf[idx] = @truncate(u8, word);
}
pub fn get16(self: *const Self, idx: usize) u16 { switch (T) {
return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]); u32 => {
} self.buf[addr + 3] = @truncate(u8, value >> 24);
self.buf[addr + 2] = @truncate(u8, value >> 16);
pub fn set16(self: *Self, idx: usize, halfword: u16) void { self.buf[addr + 1] = @truncate(u8, value >> 8);
self.buf[idx + 1] = @truncate(u8, halfword >> 8); self.buf[addr + 0] = @truncate(u8, value >> 0);
self.buf[idx] = @truncate(u8, halfword); },
} u16 => {
self.buf[addr + 1] = @truncate(u8, value >> 8);
pub fn get8(self: *const Self, idx: usize) u8 { self.buf[addr + 0] = @truncate(u8, value >> 0);
return self.buf[idx]; },
else => @compileError("OAM: Unsupported write width"),
}
} }
}; };