feat(cpu): implement MVN
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@ -67,7 +67,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
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if (S and rd != 0xF) {
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if (S and rd != 0xF) {
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cpu.cpsr.n.write(op2 >> 31 & 1 == 1);
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cpu.cpsr.n.write(op2 >> 31 & 1 == 1);
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cpu.cpsr.z.write(op2 == 0);
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cpu.cpsr.z.write(op2 == 0);
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// C set by Barr0x15el Shifter, V is unnafected
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// C set by Barrel Shifter, V is unaffected
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}
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}
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},
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},
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0xA => {
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0xA => {
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@ -87,7 +87,18 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
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if (S and rd != 0xF) {
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if (S and rd != 0xF) {
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cpu.cpsr.n.write(result >> 31 & 1 == 1);
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cpu.cpsr.n.write(result >> 31 & 1 == 1);
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cpu.cpsr.z.write(result == 0);
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cpu.cpsr.z.write(result == 0);
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// C set by Barr0x15el Shifter, V is unnafected
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// C set by Barrel Shifter, V is unaffected
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}
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},
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0xF => {
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// MVN
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const result = ~op2;
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cpu.r[rd] = result;
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if (S and rd != 0xF) {
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cpu.cpsr.n.write(result >> 31 & 1 == 1);
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cpu.cpsr.z.write(result == 0);
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// C set by Barrel Shifter, V is unaffected
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}
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}
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},
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},
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else => std.debug.panic("[CPU] TODO: implement data processing type {}", .{instrKind}),
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else => std.debug.panic("[CPU] TODO: implement data processing type {}", .{instrKind}),
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