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fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction

This commit is contained in:
Rekai Nyangadzayi Musuka 2022-10-21 05:12:01 -03:00
parent 60a1f7fa99
commit 8bb7ea6be6
1 changed files with 4 additions and 0 deletions
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4
src/cpu/arm/data_processing.zig
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@ -85,6 +85,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
// TST // TST
if (rd == 0xF) { if (rd == 0xF) {
undefinedTestBehaviour(cpu); undefinedTestBehaviour(cpu);
cpu.r[15] += 4; // FIXME: This is objectively wrong I think
return; return;
} }
@ -95,6 +96,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
// TEQ // TEQ
if (rd == 0xF) { if (rd == 0xF) {
undefinedTestBehaviour(cpu); undefinedTestBehaviour(cpu);
cpu.r[15] += 4; // FIXME: This is objectively wrong I think
return; return;
} }
@ -105,6 +107,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
// CMP // CMP
if (rd == 0xF) { if (rd == 0xF) {
undefinedTestBehaviour(cpu); undefinedTestBehaviour(cpu);
cpu.r[15] += 4; // FIXME: This is objectively wrong I think
return; return;
} }
@ -119,6 +122,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4
// CMN // CMN
if (rd == 0xF) { if (rd == 0xF) {
undefinedTestBehaviour(cpu); undefinedTestBehaviour(cpu);
cpu.r[15] += 4; // FIXME: This is objectively wrong I think
return; return;
} }