From 8bb7ea6be619a4e0c174e0f7e41b0fbbceda3a65 Mon Sep 17 00:00:00 2001 From: Rekai Musuka Date: Fri, 21 Oct 2022 05:12:01 -0300 Subject: [PATCH] fix(cpu): interim solution to weird program counter behaviour on illegal tst instruction --- src/cpu/arm/data_processing.zig | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/cpu/arm/data_processing.zig b/src/cpu/arm/data_processing.zig index e1d953c..06cc5ee 100644 --- a/src/cpu/arm/data_processing.zig +++ b/src/cpu/arm/data_processing.zig @@ -85,6 +85,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4 // TST if (rd == 0xF) { undefinedTestBehaviour(cpu); + cpu.r[15] += 4; // FIXME: This is objectively wrong I think return; } @@ -95,6 +96,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4 // TEQ if (rd == 0xF) { undefinedTestBehaviour(cpu); + cpu.r[15] += 4; // FIXME: This is objectively wrong I think return; } @@ -105,6 +107,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4 // CMP if (rd == 0xF) { undefinedTestBehaviour(cpu); + cpu.r[15] += 4; // FIXME: This is objectively wrong I think return; } @@ -119,6 +122,7 @@ pub fn dataProcessing(comptime I: bool, comptime S: bool, comptime instrKind: u4 // CMN if (rd == 0xF) { undefinedTestBehaviour(cpu); + cpu.r[15] += 4; // FIXME: This is objectively wrong I think return; }