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feat(cpu): implement SWP

This commit is contained in:
Rekai Nyangadzayi Musuka 2022-10-21 05:12:08 -03:00
parent 9cb4ebaa7f
commit 7e6fc44191
1 changed files with 5 additions and 3 deletions
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8
src/cpu/arm/half_signed_data_transfer.zig
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@ -35,7 +35,9 @@ pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I:
switch (@truncate(u2, opcode >> 5)) { switch (@truncate(u2, opcode >> 5)) {
0b00 => { 0b00 => {
// SWP // SWP
std.debug.panic("[CPU] TODO: Implement SWP", .{}); const value = bus.read32(cpu.r[rn]);
const tmp = std.math.rotr(u32, value, 8 * (cpu.r[rn] & 0x3));
bus.write32(cpu.r[rm], tmp);
}, },
0b01 => { 0b01 => {
// LDRH // LDRH
@ -45,12 +47,12 @@ pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I:
0b10 => { 0b10 => {
// LDRSB // LDRSB
cpu.r[rd] = util.u32SignExtend(8, @as(u32, bus.read8(address))); cpu.r[rd] = util.u32SignExtend(8, @as(u32, bus.read8(address)));
std.debug.panic("TODO: Affect the CPSR", .{}); std.debug.panic("[CPU|ARM|LDRSB] TODO: Affect the CPSR", .{});
}, },
0b11 => { 0b11 => {
// LDRSH // LDRSH
cpu.r[rd] = util.u32SignExtend(16, @as(u32, bus.read16(address))); cpu.r[rd] = util.u32SignExtend(16, @as(u32, bus.read16(address)));
std.debug.panic("TODO: Affect the CPSR", .{}); std.debug.panic("[CPU|ARM|LDRSH] TODO: Affect the CPSR", .{});
}, },
} }
} else { } else {