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chore: run zig fmt

This commit is contained in:
Rekai Nyangadzayi Musuka 2021-12-29 15:13:50 -06:00
parent ff7bf4eaa7
commit 7cc3f40a85
4 changed files with 13 additions and 17 deletions
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5
src/cpu.zig
View File

@ -28,7 +28,7 @@ pub const ARM7TDMI = struct {
pub inline fn step(self: *@This()) u64 {
const opcode = self.fetch();
// Debug
std.debug.print("R15: 0x{X:}\n", .{ opcode });
std.debug.print("R15: 0x{X:}\n", .{opcode});
ARM_LUT[armIdx(opcode)](self, self.bus, opcode);
@ -130,9 +130,6 @@ const Mode = enum(u5) {
System = 0b11111,
};
fn undefined_instr(_: *ARM7TDMI, _: *Bus, opcode: u32) void {
const id = armIdx(opcode);
std.debug.panic("[0x{X:}] 0x{X:} is an illegal opcode", .{ id, opcode });

4
src/cpu/half_signed_data_transfer.zig
View File

@ -27,7 +27,7 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
var address = if (P) modified_base else base;
if (L) {
switch(@truncate(u2, opcode >> 5)) {
switch (@truncate(u2, opcode >> 5)) {
0b00 => {
// SWP
std.debug.panic("TODO: Implement SWP", .{});
@ -46,7 +46,7 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
// LDRSH
const halfword = bus.readHalfWord(address);
cpu.r[rd] = util.u32_sign_extend(@as(u32, halfword), 16);
}
},
}
} else {
if (opcode >> 5 & 0x01 == 0x01) {

1
src/util.zig
View File

@ -1,6 +1,5 @@
const std = @import("std");
pub fn u32_sign_extend(value: u32, bitSize: anytype) u32 {
const amount: u5 = 32 - bitSize;
return @bitCast(u32, @bitCast(i32, value << amount) >> amount);