chore: run zig fmt
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@ -28,7 +28,7 @@ pub const ARM7TDMI = struct {
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pub inline fn step(self: *@This()) u64 {
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pub inline fn step(self: *@This()) u64 {
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const opcode = self.fetch();
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const opcode = self.fetch();
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// Debug
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// Debug
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std.debug.print("R15: 0x{X:}\n", .{ opcode });
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std.debug.print("R15: 0x{X:}\n", .{opcode});
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ARM_LUT[armIdx(opcode)](self, self.bus, opcode);
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ARM_LUT[armIdx(opcode)](self, self.bus, opcode);
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@ -130,9 +130,6 @@ const Mode = enum(u5) {
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System = 0b11111,
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System = 0b11111,
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};
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};
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fn undefined_instr(_: *ARM7TDMI, _: *Bus, opcode: u32) void {
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fn undefined_instr(_: *ARM7TDMI, _: *Bus, opcode: u32) void {
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const id = armIdx(opcode);
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const id = armIdx(opcode);
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std.debug.panic("[0x{X:}] 0x{X:} is an illegal opcode", .{ id, opcode });
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std.debug.panic("[0x{X:}] 0x{X:} is an illegal opcode", .{ id, opcode });
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@ -27,7 +27,7 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
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var address = if (P) modified_base else base;
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var address = if (P) modified_base else base;
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if (L) {
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if (L) {
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switch(@truncate(u2, opcode >> 5)) {
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switch (@truncate(u2, opcode >> 5)) {
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0b00 => {
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0b00 => {
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// SWP
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// SWP
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std.debug.panic("TODO: Implement SWP", .{});
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std.debug.panic("TODO: Implement SWP", .{});
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@ -46,7 +46,7 @@ pub fn comptimeHalfSignedDataTransfer(comptime P: bool, comptime U: bool, compti
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// LDRSH
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// LDRSH
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const halfword = bus.readHalfWord(address);
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const halfword = bus.readHalfWord(address);
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cpu.r[rd] = util.u32_sign_extend(@as(u32, halfword), 16);
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cpu.r[rd] = util.u32_sign_extend(@as(u32, halfword), 16);
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}
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},
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}
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}
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} else {
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} else {
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if (opcode >> 5 & 0x01 == 0x01) {
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if (opcode >> 5 & 0x01 == 0x01) {
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@ -1,6 +1,5 @@
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const std = @import("std");
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const std = @import("std");
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pub fn u32_sign_extend(value: u32, bitSize: anytype) u32 {
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pub fn u32_sign_extend(value: u32, bitSize: anytype) u32 {
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const amount: u5 = 32 - bitSize;
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const amount: u5 = 32 - bitSize;
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return @bitCast(u32, @bitCast(i32, value << amount) >> amount);
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return @bitCast(u32, @bitCast(i32, value << amount) >> amount);
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