chore: mirror VRAM
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parent
9b9de11e0c
commit
5310c12669
10
src/Bus.zig
10
src/Bus.zig
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@ -61,7 +61,7 @@ pub fn read32(self: *const Self, addr: u32) u32 {
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// Internal Display Memory
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// Internal Display Memory
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.get32(addr & 0x3FF),
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.get32(addr & 0x3FF),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.read(u32, addr - 0x0600_0000),
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0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u32, addr),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.get32(addr & 0x3FF),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.get32(addr & 0x3FF),
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// External Memory (Game Pak)
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// External Memory (Game Pak)
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@ -84,7 +84,7 @@ pub fn write32(self: *Self, addr: u32, word: u32) void {
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// Internal Display Memory
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// Internal Display Memory
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.set32(addr & 0x3FF, word),
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.set32(addr & 0x3FF, word),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.write(u32, addr - 0x0600_0000, word),
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0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u32, addr, word),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.set32(addr & 0x3FF, word),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.set32(addr & 0x3FF, word),
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else => undWrite("Tried to write 0x{X:0>8} to 0x{X:0>8}", .{ word, addr }),
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else => undWrite("Tried to write 0x{X:0>8} to 0x{X:0>8}", .{ word, addr }),
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@ -101,7 +101,7 @@ pub fn read16(self: *const Self, addr: u32) u16 {
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// Internal Display Memory
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// Internal Display Memory
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.get16(addr & 0x3FF),
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.get16(addr & 0x3FF),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.read(u16, addr - 0x0600_0000),
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0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u16, addr),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.get16(addr & 0x3FF),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.get16(addr & 0x3FF),
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// External Memory (Game Pak)
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// External Memory (Game Pak)
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@ -123,7 +123,7 @@ pub fn write16(self: *Self, addr: u32, halfword: u16) void {
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// Internal Display Memory
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// Internal Display Memory
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.set16(addr & 0x3FF, halfword),
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.set16(addr & 0x3FF, halfword),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.write(u16, addr - 0x0600_0000, halfword),
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0x0600_0000...0x06FF_FFFF => self.ppu.vram.write(u16, addr, halfword),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.set16(addr & 0x3FF, halfword),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.set16(addr & 0x3FF, halfword),
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0x0800_00C4, 0x0800_00C6, 0x0800_00C8 => log.warn("Tried to write 0x{X:0>4} to GPIO", .{halfword}),
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0x0800_00C4, 0x0800_00C6, 0x0800_00C8 => log.warn("Tried to write 0x{X:0>4} to GPIO", .{halfword}),
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@ -141,7 +141,7 @@ pub fn read8(self: *const Self, addr: u32) u8 {
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// Internal Display Memory
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// Internal Display Memory
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.get8(addr & 0x3FF),
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.get8(addr & 0x3FF),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.read(u8, addr - 0x0600_0000),
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0x0600_0000...0x06FF_FFFF => self.ppu.vram.read(u8, addr),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.get8(addr & 0x3FF),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.get8(addr & 0x3FF),
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// External Memory (Game Pak)
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// External Memory (Game Pak)
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23
src/ppu.zig
23
src/ppu.zig
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@ -479,16 +479,20 @@ const Vram = struct {
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self.alloc.free(self.buf);
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self.alloc.free(self.buf);
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}
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}
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pub fn read(self: *const Self, comptime T: type, addr: usize) T {
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pub fn read(self: *const Self, comptime T: type, address: usize) T {
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switch (T) {
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const addr = Self.mirror(address);
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u32 => return (@as(T, self.buf[addr + 3]) << 24) | (@as(T, self.buf[addr + 2]) << 16) | (@as(T, self.buf[addr + 1]) << 8) | (@as(T, self.buf[addr])),
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u16 => return (@as(T, self.buf[addr + 1]) << 8) | @as(T, self.buf[addr]),
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return switch (T) {
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u8 => return self.buf[addr],
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u32 => (@as(T, self.buf[addr + 3]) << 24) | (@as(T, self.buf[addr + 2]) << 16) | (@as(T, self.buf[addr + 1]) << 8) | (@as(T, self.buf[addr])),
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u16 => (@as(T, self.buf[addr + 1]) << 8) | @as(T, self.buf[addr]),
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u8 => self.buf[addr],
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else => @compileError("VRAM: Unsupported read width"),
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else => @compileError("VRAM: Unsupported read width"),
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}
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};
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}
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}
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pub fn write(self: *Self, comptime T: type, addr: usize, value: T) void {
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pub fn write(self: *Self, comptime T: type, address: usize, value: T) void {
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const addr = Self.mirror(address);
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switch (T) {
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switch (T) {
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u32 => {
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u32 => {
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self.buf[addr + 3] = @truncate(u8, value >> 24);
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self.buf[addr + 3] = @truncate(u8, value >> 24);
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@ -503,6 +507,11 @@ const Vram = struct {
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else => @compileError("VRAM: Unsupported write width"),
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else => @compileError("VRAM: Unsupported write width"),
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}
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}
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}
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}
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fn mirror(address: usize) usize {
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const addr = address & 0x1FFFF; // repeated in steps of 128KiB
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return if (addr >= 0x18000) addr & 0x7FFF else addr; // 64K + 32K + 32K (abcc)
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}
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};
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};
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const Oam = struct {
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const Oam = struct {
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