chore: write generic read/write for VRAM
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parent
f8018854be
commit
9b9de11e0c
10
src/Bus.zig
10
src/Bus.zig
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@ -61,7 +61,7 @@ pub fn read32(self: *const Self, addr: u32) u32 {
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// Internal Display Memory
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.get32(addr & 0x3FF),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.get32(addr - 0x0600_0000),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.read(u32, addr - 0x0600_0000),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.get32(addr & 0x3FF),
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// External Memory (Game Pak)
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@ -84,7 +84,7 @@ pub fn write32(self: *Self, addr: u32, word: u32) void {
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// Internal Display Memory
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.set32(addr & 0x3FF, word),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.set32(addr - 0x0600_0000, word),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.write(u32, addr - 0x0600_0000, word),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.set32(addr & 0x3FF, word),
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else => undWrite("Tried to write 0x{X:0>8} to 0x{X:0>8}", .{ word, addr }),
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@ -101,7 +101,7 @@ pub fn read16(self: *const Self, addr: u32) u16 {
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// Internal Display Memory
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.get16(addr & 0x3FF),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.get16(addr - 0x0600_0000),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.read(u16, addr - 0x0600_0000),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.get16(addr & 0x3FF),
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// External Memory (Game Pak)
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@ -123,7 +123,7 @@ pub fn write16(self: *Self, addr: u32, halfword: u16) void {
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// Internal Display Memory
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.set16(addr & 0x3FF, halfword),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.set16(addr - 0x0600_0000, halfword),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.write(u16, addr - 0x0600_0000, halfword),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.set16(addr & 0x3FF, halfword),
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0x0800_00C4, 0x0800_00C6, 0x0800_00C8 => log.warn("Tried to write 0x{X:0>4} to GPIO", .{halfword}),
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@ -141,7 +141,7 @@ pub fn read8(self: *const Self, addr: u32) u8 {
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// Internal Display Memory
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0x0500_0000...0x05FF_FFFF => self.ppu.palette.get8(addr & 0x3FF),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.get8(addr - 0x0600_0000),
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0x0600_0000...0x0601_7FFF => self.ppu.vram.read(u8, addr - 0x0600_0000),
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0x0700_0000...0x07FF_FFFF => self.ppu.oam.get8(addr & 0x3FF),
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// External Memory (Game Pak)
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43
src/ppu.zig
43
src/ppu.zig
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@ -241,7 +241,7 @@ pub const Ppu = struct {
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// Grab the Screen Entry from VRAM
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const entry_addr = screen_base + tilemapOffset(size, x, y);
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const entry = @bitCast(ScreenEntry, self.vram.get16(entry_addr));
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const entry = @bitCast(ScreenEntry, self.vram.read(u16, entry_addr));
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// Calculate the Address of the Tile in the designated Charblock
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// We also take this opportunity to flip tiles if necessary
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@ -309,7 +309,7 @@ pub const Ppu = struct {
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var i: usize = 0;
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while (i < width) : (i += 1) {
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const bgr555 = self.vram.get16(vram_base + i * @sizeOf(u16));
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const bgr555 = self.vram.read(u16, vram_base + i * @sizeOf(u16));
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std.mem.copy(u8, self.framebuf[fb_base + i * @sizeOf(u32) ..][0..4], &intToBytes(u32, toRgba8888(bgr555)));
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}
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},
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@ -479,26 +479,29 @@ const Vram = struct {
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self.alloc.free(self.buf);
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}
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pub fn get32(self: *const Self, idx: usize) u32 {
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return (@as(u32, self.get16(idx + 2)) << 16) | @as(u32, self.get16(idx));
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pub fn read(self: *const Self, comptime T: type, addr: usize) T {
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switch (T) {
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u32 => return (@as(T, self.buf[addr + 3]) << 24) | (@as(T, self.buf[addr + 2]) << 16) | (@as(T, self.buf[addr + 1]) << 8) | (@as(T, self.buf[addr])),
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u16 => return (@as(T, self.buf[addr + 1]) << 8) | @as(T, self.buf[addr]),
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u8 => return self.buf[addr],
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else => @compileError("VRAM: Unsupported read width"),
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}
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}
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pub fn set32(self: *Self, idx: usize, word: u32) void {
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self.set16(idx + 2, @truncate(u16, word >> 16));
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self.set16(idx, @truncate(u16, word));
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}
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pub fn get16(self: *const Self, idx: usize) u16 {
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return (@as(u16, self.buf[idx + 1]) << 8) | @as(u16, self.buf[idx]);
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}
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pub fn set16(self: *Self, idx: usize, halfword: u16) void {
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self.buf[idx + 1] = @truncate(u8, halfword >> 8);
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self.buf[idx] = @truncate(u8, halfword);
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}
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pub fn get8(self: *const Self, idx: usize) u8 {
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return self.buf[idx];
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pub fn write(self: *Self, comptime T: type, addr: usize, value: T) void {
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switch (T) {
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u32 => {
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self.buf[addr + 3] = @truncate(u8, value >> 24);
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self.buf[addr + 2] = @truncate(u8, value >> 16);
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self.buf[addr + 1] = @truncate(u8, value >> 8);
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self.buf[addr + 0] = @truncate(u8, value >> 0);
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},
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u16 => {
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self.buf[addr + 1] = @truncate(u8, value >> 8);
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self.buf[addr + 0] = @truncate(u8, value >> 0);
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},
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else => @compileError("VRAM: Unsupported write width"),
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}
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}
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};
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