fix(dma): implement obscure behaviour for DMAs from ROM
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@ -256,11 +256,16 @@ fn DmaController(comptime id: u2) type {
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cpu.bus.write(u16, dad_addr, @truncate(u16, rotr(u32, self.data_latch, 8 * (dad_addr & 3))));
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cpu.bus.write(u16, dad_addr, @truncate(u16, rotr(u32, self.data_latch, 8 * (dad_addr & 3))));
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}
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}
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switch (sad_adj) {
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switch (@truncate(u8, sad_addr >> 24)) {
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// according to fleroviux, DMAs with a source address in ROM misbehave
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// the resultant behaviour is that the source address will increment despite what DMAXCNT says
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0x08...0x0D => self.sad_latch +%= offset, // obscure behaviour
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else => switch (sad_adj) {
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.Increment => self.sad_latch +%= offset,
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.Increment => self.sad_latch +%= offset,
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.Decrement => self.sad_latch -%= offset,
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.Decrement => self.sad_latch -%= offset,
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.IncrementReload => log.err("{} is a prohibited adjustment on SAD", .{sad_adj}),
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.IncrementReload => log.err("{} is a prohibited adjustment on SAD", .{sad_adj}),
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.Fixed => {},
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.Fixed => {},
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},
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}
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}
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switch (dad_adj) {
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switch (dad_adj) {
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