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chore: make use of comptime control flow when working with tuples

This commit is contained in:
Rekai Nyangadzayi Musuka 2022-10-31 03:22:08 -03:00
parent 2ef4bb7dcc
commit 472457b9f3
4 changed files with 19 additions and 43 deletions
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8
src/core/bus/dma.zig
View File

@ -335,10 +335,10 @@ fn DmaController(comptime id: u2) type {
}
pub fn pollDmaOnBlank(bus: *Bus, comptime kind: DmaKind) void {
bus.dma[0].poll(kind);
bus.dma[1].poll(kind);
bus.dma[2].poll(kind);
bus.dma[3].poll(kind);
comptime var i: usize = 0;
inline while (i < 4) : (i += 1) {
bus.dma[i].poll(kind);
}
}
const Adjustment = enum(u2) {

20
src/core/bus/timer.zig
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@ -190,19 +190,15 @@ fn Timer(comptime id: u2) type {
// Perform Cascade Behaviour
switch (id) {
0 => if (cpu.bus.tim[1].cnt.cascade.read()) {
cpu.bus.tim[1]._counter +%= 1;
if (cpu.bus.tim[1]._counter == 0) cpu.bus.tim[1].onTimerExpire(cpu, late);
inline 0, 1, 2 => |idx| {
const next = idx + 1;
if (cpu.bus.tim[next].cnt.cascade.read()) {
cpu.bus.tim[next]._counter +%= 1;
if (cpu.bus.tim[next]._counter == 0) cpu.bus.tim[next].onTimerExpire(cpu, late);
}
},
1 => if (cpu.bus.tim[2].cnt.cascade.read()) {
cpu.bus.tim[2]._counter +%= 1;
if (cpu.bus.tim[2]._counter == 0) cpu.bus.tim[2].onTimerExpire(cpu, late);
},
2 => if (cpu.bus.tim[3].cnt.cascade.read()) {
cpu.bus.tim[3]._counter +%= 1;
if (cpu.bus.tim[3]._counter == 0) cpu.bus.tim[3].onTimerExpire(cpu, late);
},
3 => {}, // There is no Timer for TIM3 to "cascade" to,
3 => {}, // THere is no timer for TIM3 to cascade to
}
// Reschedule Timer if we're not cascading

25
src/core/cpu.zig
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@ -455,29 +455,12 @@ pub const Arm7tdmi = struct {
}
pub fn stepDmaTransfer(self: *Self) bool {
const dma0 = &self.bus.dma[0];
const dma1 = &self.bus.dma[1];
const dma2 = &self.bus.dma[2];
const dma3 = &self.bus.dma[3];
if (dma0.in_progress) {
dma0.step(self);
comptime var i: usize = 0;
inline while (i < 4) : (i += 1) {
if (self.bus.dma[i].in_progress) {
self.bus.dma[i].step(self);
return true;
}
if (dma1.in_progress) {
dma1.step(self);
return true;
}
if (dma2.in_progress) {
dma2.step(self);
return true;
}
if (dma3.in_progress) {
dma3.step(self);
return true;
}
return false;

5
src/core/scheduler.zig
View File

@ -46,10 +46,7 @@ pub const Scheduler = struct {
},
.TimerOverflow => |id| {
switch (id) {
0 => cpu.bus.tim[0].onTimerExpire(cpu, late),
1 => cpu.bus.tim[1].onTimerExpire(cpu, late),
2 => cpu.bus.tim[2].onTimerExpire(cpu, late),
3 => cpu.bus.tim[3].onTimerExpire(cpu, late),
inline 0...3 => |idx| cpu.bus.tim[idx].onTimerExpire(cpu, late),
}
},
.ApuChannel => |id| {