chore: introduce zba-util

In an effort to reuse code between zba and zba-gdbstub, move common util
code (like the SPSC Channel I implemented in this commit) in a new lib

src/core/Bus.zig

@@ -19,7 +19,7 @@ const log = std.log.scoped(.Bus);
 
 const createDmaTuple = @import("bus/dma.zig").create;
 const createTimerTuple = @import("bus/timer.zig").create;
-const rotr = @import("../util.zig").rotr;
+const rotr = @import("zba-util").rotr;
 
 const timings: [2][0x10]u8 = [_][0x10]u8{
     // BIOS, Unused, EWRAM, IWRAM, I/0, PALRAM, VRAM, OAM, ROM0, ROM0, ROM1, ROM1, ROM2, ROM2, SRAM, Unused

src/core/apu.zig

@@ -14,7 +14,6 @@ const SoundFifo = std.fifo.LinearFifo(u8, .{ .Static = 0x20 });
 
 const getHalf = util.getHalf;
 const setHalf = util.setHalf;
-const intToBytes = util.intToBytes;
 
 const log = std.log.scoped(.APU);
 
@@ -557,7 +556,7 @@ pub fn DmaSound(comptime kind: DmaSoundKind) type {
         pub fn push(self: *Self, value: u32) void {
             if (!self.enabled) self.enable();
 
-            self.fifo.write(&intToBytes(u32, value)) catch |e| log.err("{} Error: {}", .{ kind, e });
+            self.fifo.write(std.mem.asBytes(&value)) catch |e| log.err("{} Error: {}", .{ kind, e });
         }
 
         fn enable(self: *Self) void {

src/core/bus/Bios.zig

@@ -3,7 +3,7 @@ const std = @import("std");
 const Allocator = std.mem.Allocator;
 const log = std.log.scoped(.Bios);
 
-const rotr = @import("../../util.zig").rotr;
+const rotr = @import("zba-util").rotr;
 const forceAlign = @import("../Bus.zig").forceAlign;
 
 /// Size of the BIOS in bytes

src/core/bus/dma.zig

@@ -12,7 +12,7 @@ const getHalf = util.getHalf;
 const setHalf = util.setHalf;
 const setQuart = util.setQuart;
 
-const rotr = @import("../../util.zig").rotr;
+const rotr = @import("zba-util").rotr;
 
 pub fn create() DmaTuple {
     return .{ DmaController(0).init(), DmaController(1).init(), DmaController(2).init(), DmaController(3).init() };

src/core/cpu/arm/branch.zig

@@ -2,7 +2,7 @@ const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").arm.InstrFn;
 
-const sext = @import("../../../util.zig").sext;
+const sext = @import("zba-util").sext;
 
 pub fn branch(comptime L: bool) InstrFn {
     return struct {

src/core/cpu/arm/half_signed_data_transfer.zig

@@ -2,8 +2,8 @@ const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").arm.InstrFn;
 
-const sext = @import("../../../util.zig").sext;
-const rotr = @import("../../../util.zig").rotr;
+const sext = @import("zba-util").sext;
+const rotr = @import("zba-util").rotr;
 
 pub fn halfAndSignedDataTransfer(comptime P: bool, comptime U: bool, comptime I: bool, comptime W: bool, comptime L: bool) InstrFn {
     return struct {

src/core/cpu/arm/psr_transfer.zig

@@ -7,7 +7,7 @@ const PSR = @import("../../cpu.zig").PSR;
 
 const log = std.log.scoped(.PsrTransfer);
 
-const rotr = @import("../../../util.zig").rotr;
+const rotr = @import("zba-util").rotr;
 
 pub fn psrTransfer(comptime I: bool, comptime R: bool, comptime kind: u2) InstrFn {
     return struct {

src/core/cpu/arm/single_data_swap.zig

@@ -2,7 +2,7 @@ const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").arm.InstrFn;
 
-const rotr = @import("../../../util.zig").rotr;
+const rotr = @import("zba-util").rotr;
 
 pub fn singleDataSwap(comptime B: bool) InstrFn {
     return struct {

src/core/cpu/arm/single_data_transfer.zig

@@ -3,7 +3,7 @@ const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").arm.InstrFn;
 
-const rotr = @import("../../../util.zig").rotr;
+const rotr = @import("zba-util").rotr;
 
 pub fn singleDataTransfer(comptime I: bool, comptime P: bool, comptime U: bool, comptime B: bool, comptime W: bool, comptime L: bool) InstrFn {
     return struct {

src/core/cpu/barrel_shifter.zig

@@ -1,7 +1,7 @@
 const Arm7tdmi = @import("../cpu.zig").Arm7tdmi;
 const CPSR = @import("../cpu.zig").PSR;
 
-const rotr = @import("../../util.zig").rotr;
+const rotr = @import("zba-util").rotr;
 
 pub fn exec(comptime S: bool, cpu: *Arm7tdmi, opcode: u32) u32 {
     var result: u32 = undefined;

src/core/cpu/thumb/branch.zig

@@ -3,7 +3,7 @@ const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
 
 const checkCond = @import("../../cpu.zig").checkCond;
-const sext = @import("../../../util.zig").sext;
+const sext = @import("zba-util").sext;
 
 pub fn fmt16(comptime cond: u4) InstrFn {
     return struct {

src/core/cpu/thumb/data_transfer.zig

@@ -2,8 +2,8 @@ const Bus = @import("../../Bus.zig");
 const Arm7tdmi = @import("../../cpu.zig").Arm7tdmi;
 const InstrFn = @import("../../cpu.zig").thumb.InstrFn;
 
-const rotr = @import("../../../util.zig").rotr;
-const sext = @import("../../../util.zig").sext;
+const rotr = @import("zba-util").rotr;
+const sext = @import("zba-util").sext;
 
 pub fn fmt6(comptime rd: u3) InstrFn {
     return struct {