76 lines
2.2 KiB
Zig
76 lines
2.2 KiB
Zig
const std = @import("std");
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const Arm7tdmi = @import("arm32").Arm7tdmi;
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const Bank = @import("arm32").Arm7tdmi.Bank;
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const Bus = @import("Bus.zig");
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pub inline fn isHalted(cpu: *const Arm7tdmi) bool {
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const bus_ptr = @ptrCast(*Bus, @alignCast(@alignOf(Bus), cpu.bus.ptr));
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return bus_ptr.io.haltcnt == .Halt;
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}
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pub fn stepDmaTransfer(cpu: *Arm7tdmi) bool {
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const bus_ptr = @ptrCast(*Bus, @alignCast(@alignOf(Bus), cpu.bus.ptr));
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inline for (0..4) |i| {
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if (bus_ptr.dma[i].in_progress) {
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bus_ptr.dma[i].step(cpu);
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return true;
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}
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}
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return false;
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}
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pub fn handleInterrupt(cpu: *Arm7tdmi) void {
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const bus_ptr = @ptrCast(*Bus, @alignCast(@alignOf(Bus), cpu.bus.ptr));
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const should_handle = bus_ptr.io.ie.raw & bus_ptr.io.irq.raw;
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// Return if IME is disabled, CPSR I is set or there is nothing to handle
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if (!bus_ptr.io.ime or cpu.cpsr.i.read() or should_handle == 0) return;
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// If Pipeline isn't full, we have a bug
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std.debug.assert(cpu.pipe.isFull());
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// log.debug("Handling Interrupt!", .{});
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bus_ptr.io.haltcnt = .Execute;
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// FIXME: This seems weird, but retAddr.gba suggests I need to make these changes
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const ret_addr = cpu.r[15] - if (cpu.cpsr.t.read()) 0 else @as(u32, 4);
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const new_spsr = cpu.cpsr.raw;
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cpu.changeMode(.Irq);
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cpu.cpsr.t.write(false);
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cpu.cpsr.i.write(true);
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cpu.r[14] = ret_addr;
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cpu.spsr.raw = new_spsr;
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cpu.r[15] = 0x0000_0018;
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cpu.pipe.reload(cpu);
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}
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/// Advances state so that the BIOS is skipped
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///
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/// Note: This accesses the CPU's bus ptr so it only may be called
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/// once the Bus has been properly initialized
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///
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/// TODO: Make above notice impossible to do in code
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pub fn fastBoot(cpu: *Arm7tdmi) void {
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const bus_ptr = @ptrCast(*Bus, @alignCast(@alignOf(Bus), cpu.bus.ptr));
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cpu.r = std.mem.zeroes([16]u32);
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// cpu.r[0] = 0x08000000;
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// cpu.r[1] = 0x000000EA;
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cpu.r[13] = 0x0300_7F00;
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cpu.r[15] = 0x0800_0000;
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cpu.bank.r[Bank.regIdx(.Irq, .R13)] = 0x0300_7FA0;
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cpu.bank.r[Bank.regIdx(.Supervisor, .R13)] = 0x0300_7FE0;
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// cpu.cpsr.raw = 0x6000001F;
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cpu.cpsr.raw = 0x0000_001F;
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bus_ptr.bios.addr_latch = 0x0000_00DC + 8;
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}
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